From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by dpdk.org (Postfix) with ESMTP id C58B02BAE for ; Mon, 11 Dec 2017 09:51:33 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 11 Dec 2017 00:51:32 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,391,1508828400"; d="scan'208";a="480213" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by fmsmga002.fm.intel.com with ESMTP; 11 Dec 2017 00:51:32 -0800 Received: from fmsmsx112.amr.corp.intel.com (10.18.116.6) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 11 Dec 2017 00:51:32 -0800 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by FMSMSX112.amr.corp.intel.com (10.18.116.6) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 11 Dec 2017 00:51:31 -0800 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.213]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.93]) with mapi id 14.03.0319.002; Mon, 11 Dec 2017 16:51:31 +0800 From: "Zhang, Qi Z" To: "Xing, Beilei" CC: "dev@dpdk.org" Thread-Topic: [PATCH] net/i40e: exclude LLDP packet count Thread-Index: AQHTbaSCFUMiz565Zk2JeE9ia28b+qM9WKEAgACGYGA= Date: Mon, 11 Dec 2017 08:51:31 +0000 Message-ID: <039ED4275CED7440929022BC67E706115311D8A4@SHSMSX103.ccr.corp.intel.com> References: <1512437375-17322-1-git-send-email-qi.z.zhang@intel.com> <94479800C636CB44BD422CB454846E013207E1D4@SHSMSX101.ccr.corp.intel.com> In-Reply-To: <94479800C636CB44BD422CB454846E013207E1D4@SHSMSX101.ccr.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.0.0.116 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH] net/i40e: exclude LLDP packet count X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 11 Dec 2017 08:51:34 -0000 Thanks will fix. > -----Original Message----- > From: Xing, Beilei > Sent: Monday, December 11, 2017 4:50 PM > To: Zhang, Qi Z > Cc: dev@dpdk.org > Subject: RE: [PATCH] net/i40e: exclude LLDP packet count >=20 >=20 > > -----Original Message----- > > From: Zhang, Qi Z > > Sent: Tuesday, December 5, 2017 9:30 AM > > To: Xing, Beilei > > Cc: dev@dpdk.org; Zhang, Qi Z > > Subject: [PATCH] net/i40e: exclude LLDP packet count > > > > When use port stats register to calcuate the packet count, LLDP > > packets are >=20 > Patch looks OK for me except some typos. > calcuate -> calculate >=20 > > counted in statistics which is not expected, the patch exclude this > > number from total number. > > > > Fixes: 763de290cbd1 ("net/i40e: fix packet count for PF") Cc > > stable@dpdk.org > > > > Signed-off-by: Qi Zhang > > --- > > drivers/net/i40e/i40e_ethdev.c | 58 > > +++++++++++++++++++++++++++++++++++++++--- > > 1 file changed, 55 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/net/i40e/i40e_ethdev.c > > b/drivers/net/i40e/i40e_ethdev.c index 811cc9f..4cbb259 100644 > > --- a/drivers/net/i40e/i40e_ethdev.c > > +++ b/drivers/net/i40e/i40e_ethdev.c > > @@ -2531,6 +2531,22 @@ i40e_read_stats_registers(struct i40e_pf *pf, > > struct i40e_hw *hw) > > pf->offset_loaded, > > &pf->internal_stats_offset.rx_broadcast, > > &pf->internal_stats.rx_broadcast); > > + /* Get total internal tx packet count */ > > + i40e_stat_update_48(hw, I40E_GLV_UPTCH(hw->port), > > + I40E_GLV_UPTCL(hw->port), > > + pf->offset_loaded, > > + &pf->internal_stats_offset.tx_unicast, > > + &pf->internal_stats.tx_unicast); > > + i40e_stat_update_48(hw, I40E_GLV_MPTCH(hw->port), > > + I40E_GLV_MPTCL(hw->port), > > + pf->offset_loaded, > > + &pf->internal_stats_offset.tx_multicast, > > + &pf->internal_stats.tx_multicast); > > + i40e_stat_update_48(hw, I40E_GLV_BPTCH(hw->port), > > + I40E_GLV_BPTCL(hw->port), > > + pf->offset_loaded, > > + &pf->internal_stats_offset.tx_broadcast, > > + &pf->internal_stats.tx_broadcast); > > > > /* exclude CRC size */ > > pf->internal_stats.rx_bytes -=3D (pf->internal_stats.rx_unicast + @@ = - > > 2560,16 +2576,32 @@ i40e_read_stats_registers(struct i40e_pf *pf, > > struct i40e_hw *hw) > > ns->eth.rx_bytes -=3D (ns->eth.rx_unicast + ns->eth.rx_multicast + > > ns->eth.rx_broadcast) * ETHER_CRC_LEN; > > > > - /* Workaround: it is possible I40E_GLV_GORCH[H/L] is updated > > before > > + /* exlude internal rx bytes >=20 > exclude >=20 > > + * Workaround: it is possible I40E_GLV_GORCH[H/L] is updated > > before > > * I40E_GLPRT_GORCH[H/L], so there is a small window that cause > > negtive >=20 > negative >=20 > > * value. > > + * same to I40E_GLV_UPRC[H/L], I40E_GLV_MPRC[H/L], > > I40E_GLV_BPRC[H/L]. > > */ > > if (ns->eth.rx_bytes < pf->internal_stats.rx_bytes) > > ns->eth.rx_bytes =3D 0; > > - /* exlude internal rx bytes */ > > else > > ns->eth.rx_bytes -=3D pf->internal_stats.rx_bytes; > > > > + if (ns->eth.rx_unicast < pf->internal_stats.rx_unicast) > > + ns->eth.rx_unicast =3D 0; > > + else > > + ns->eth.rx_unicast -=3D pf->internal_stats.rx_unicast; > > + > > + if (ns->eth.rx_multicast < pf->internal_stats.rx_multicast) > > + ns->eth.rx_multicast =3D 0; > > + else > > + ns->eth.rx_multicast -=3D pf->internal_stats.rx_multicast; > > + > > + if (ns->eth.rx_broadcast < pf->internal_stats.rx_broadcast) > > + ns->eth.rx_broadcast =3D 0; > > + else > > + ns->eth.rx_broadcast -=3D pf->internal_stats.rx_broadcast; > > + > > i40e_stat_update_32(hw, I40E_GLPRT_RDPC(hw->port), > > pf->offset_loaded, &os->eth.rx_discards, > > &ns->eth.rx_discards); > > @@ -2598,12 +2630,32 @@ i40e_read_stats_registers(struct i40e_pf *pf, > > struct i40e_hw *hw) > > ns->eth.tx_bytes -=3D (ns->eth.tx_unicast + ns->eth.tx_multicast + > > ns->eth.tx_broadcast) * ETHER_CRC_LEN; > > > > - /* exclude internal tx bytes */ > > + /* exlude internal tx bytes >=20 > exclude >=20 > > + * Workaround: it is possible I40E_GLV_GOTCH[H/L] is updated > > before > > + * I40E_GLPRT_GOTCH[H/L], so there is a small window that cause > > negtive >=20 > negative. >=20 > > + * value. > > + * same to I40E_GLV_UPTC[H/L], I40E_GLV_MPTC[H/L], > > I40E_GLV_BPTC[H/L]. > > + */ > > if (ns->eth.tx_bytes < pf->internal_stats.tx_bytes) > > ns->eth.tx_bytes =3D 0; > > else > > ns->eth.tx_bytes -=3D pf->internal_stats.tx_bytes; > > > > + if (ns->eth.tx_unicast < pf->internal_stats.tx_unicast) > > + ns->eth.tx_unicast =3D 0; > > + else > > + ns->eth.tx_unicast -=3D pf->internal_stats.tx_unicast; > > + > > + if (ns->eth.tx_multicast < pf->internal_stats.tx_multicast) > > + ns->eth.tx_multicast =3D 0; > > + else > > + ns->eth.tx_multicast -=3D pf->internal_stats.tx_multicast; > > + > > + if (ns->eth.tx_broadcast < pf->internal_stats.tx_broadcast) > > + ns->eth.tx_broadcast =3D 0; > > + else > > + ns->eth.tx_broadcast -=3D pf->internal_stats.tx_broadcast; > > + > > /* GLPRT_TEPC not supported */ > > > > /* additional port specific stats */ > > -- > > 2.7.4