From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id 5491E1B2FE for ; Fri, 22 Dec 2017 08:03:08 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 21 Dec 2017 23:03:07 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,439,1508828400"; d="scan'208";a="14375077" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by orsmga003.jf.intel.com with ESMTP; 21 Dec 2017 23:03:06 -0800 Received: from fmsmsx155.amr.corp.intel.com (10.18.116.71) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 21 Dec 2017 23:02:34 -0800 Received: from shsmsx101.ccr.corp.intel.com (10.239.4.153) by FMSMSX155.amr.corp.intel.com (10.18.116.71) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 21 Dec 2017 23:02:33 -0800 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.213]) by SHSMSX101.ccr.corp.intel.com ([169.254.1.159]) with mapi id 14.03.0319.002; Fri, 22 Dec 2017 15:02:31 +0800 From: "Zhang, Qi Z" To: "Zhao1, Wei" , "dev@dpdk.org" Thread-Topic: [PATCH v2] net/ixgbe: fix parsing fdir nvgre issue Thread-Index: AQHTeulCuK2oT/AlM06J+VaCA2JA3aNO4WVggAAMyGA= Date: Fri, 22 Dec 2017 07:02:31 +0000 Message-ID: <039ED4275CED7440929022BC67E7061153123ED1@SHSMSX103.ccr.corp.intel.com> References: <20171201055150.108730-1-wei.zhao1@intel.com> <20171222054559.54207-1-wei.zhao1@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.0.0.116 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2] net/ixgbe: fix parsing fdir nvgre issue X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 22 Dec 2017 07:03:08 -0000 > -----Original Message----- > From: Zhang, Qi Z > Sent: Friday, December 22, 2017 2:32 PM > To: Zhao1, Wei ; dev@dpdk.org > Subject: RE: [PATCH v2] net/ixgbe: fix parsing fdir nvgre issue >=20 >=20 >=20 > > -----Original Message----- > > From: Zhao1, Wei > > Sent: Friday, December 22, 2017 1:46 PM > > To: dev@dpdk.org > > Cc: Zhang, Qi Z ; Zhao1, Wei > > > > Subject: [PATCH v2] net/ixgbe: fix parsing fdir nvgre issue > > > > There is some wrong of mask check in nvgre parser for flow API. > > > > Fixes: 11777435c727 ("net/ixgbe: parse flow director filter") > > > > Signed-off-by: Wei Zhao > > > > --- > > > > V2: > > -change c_k_s_rsvd0_ver mask check to 0xFFFF. > > --- > > drivers/net/ixgbe/ixgbe_flow.c | 22 +++++++++++++++++++--- > > 1 file changed, 19 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/net/ixgbe/ixgbe_flow.c > > b/drivers/net/ixgbe/ixgbe_flow.c index 19c2d47..887d933 100644 > > --- a/drivers/net/ixgbe/ixgbe_flow.c > > +++ b/drivers/net/ixgbe/ixgbe_flow.c > > @@ -2466,8 +2466,7 @@ ixgbe_parse_fdir_filter_tunnel(const struct > > rte_flow_attr *attr, > > item, "Not supported by fdir filter"); > > return -rte_errno; > > } > > - if (nvgre_mask->c_k_s_rsvd0_ver !=3D > > - rte_cpu_to_be_16(0x3000) || > > + if (nvgre_mask->protocol && > > nvgre_mask->protocol !=3D 0xFFFF) { > > memset(rule, 0, sizeof(struct ixgbe_fdir_rule)); > > rte_flow_error_set(error, EINVAL, > > @@ -2475,6 +2474,15 @@ ixgbe_parse_fdir_filter_tunnel(const struct > > rte_flow_attr *attr, > > item, "Not supported by fdir filter"); > > return -rte_errno; > > } > > + if (nvgre_mask->c_k_s_rsvd0_ver && > > + nvgre_mask->c_k_s_rsvd0_ver !=3D > > + rte_cpu_to_be_16(0xFFFF)) { > > + memset(rule, 0, sizeof(struct ixgbe_fdir_rule)); > > + rte_flow_error_set(error, EINVAL, > > + RTE_FLOW_ERROR_TYPE_ITEM, > > + item, "Not supported by fdir filter"); > > + return -rte_errno; > > + } > > /* TNI must be totally masked or not. */ > > if (nvgre_mask->tni[0] && > > ((nvgre_mask->tni[0] !=3D 0xFF) || @@ -2496,7 +2504,15 @@ > > ixgbe_parse_fdir_filter_tunnel(const struct rte_flow_attr *attr, > > nvgre_spec =3D > > (const struct rte_flow_item_nvgre *)item->spec; > > if (nvgre_spec->c_k_s_rsvd0_ver !=3D > > - rte_cpu_to_be_16(0x2000) || > > + rte_cpu_to_be_16(0x2000) && > > + nvgre_mask->c_k_s_rsvd0_ver) { >=20 > It's not necessary to && with a 0xffff, why not just keep consistent with= how > you handle the protocol field. > BTW, I missed the issue on the i40e patch, its better if you can also cap= ture it. OK, it's necessary to consider a 0 mask, so please ignore above comment. >=20 >=20 > > + memset(rule, 0, sizeof(struct ixgbe_fdir_rule)); > > + rte_flow_error_set(error, EINVAL, > > + RTE_FLOW_ERROR_TYPE_ITEM, > > + item, "Not supported by fdir filter"); > > + return -rte_errno; > > + } > > + if (nvgre_mask->protocol && > > nvgre_spec->protocol !=3D > > rte_cpu_to_be_16(NVGRE_PROTOCOL)) { > > memset(rule, 0, sizeof(struct ixgbe_fdir_rule)); > > -- > > 2.9.3