From: "Zhang, Qi Z" <qi.z.zhang@intel.com>
To: "Lu, Wenzhuo" <wenzhuo.lu@intel.com>,
"Zhao1, Wei" <wei.zhao1@intel.com>,
"dev@dpdk.org" <dev@dpdk.org>
Cc: "stable@dpdk.org" <stable@dpdk.org>
Subject: Re: [dpdk-dev] [PATCH v5] net/ixgbe: fix mask bits register set error for FDIR
Date: Thu, 21 Jun 2018 14:12:49 +0000 [thread overview]
Message-ID: <039ED4275CED7440929022BC67E706115323B4D4@SHSMSX103.ccr.corp.intel.com> (raw)
In-Reply-To: <6A0DE07E22DDAD4C9103DF62FEBC09093B7EB613@shsmsx102.ccr.corp.intel.com>
> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Lu, Wenzhuo
> Sent: Tuesday, June 19, 2018 8:57 AM
> To: Zhao1, Wei <wei.zhao1@intel.com>; dev@dpdk.org
> Cc: stable@dpdk.org
> Subject: Re: [dpdk-dev] [PATCH v5] net/ixgbe: fix mask bits register set error
> for FDIR
>
> Hi,
>
>
> > -----Original Message-----
> > From: Zhao1, Wei
> > Sent: Friday, June 15, 2018 2:08 PM
> > To: dev@dpdk.org
> > Cc: Lu, Wenzhuo <wenzhuo.lu@intel.com>; stable@dpdk.org; Zhao1, Wei
> > <wei.zhao1@intel.com>
> > Subject: [PATCH v5] net/ixgbe: fix mask bits register set error for
> > FDIR
> >
> > MAC address bits in mask registers should be set to zero when the is
> > mac mask is 0xFF, otherwise if it is 0x0 these bits should be to 0x3F.
> >
> > Fixes: 82fb702077f6 ("ixgbe: support new flow director modes for
> > X550")
> >
> > Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
> Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Applied to dpdk-next-net-intel
Thanks!
Qi
prev parent reply other threads:[~2018-06-21 14:12 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-13 8:12 [dpdk-dev] [PATCH] " Wei Zhao
2018-06-14 0:52 ` Lu, Wenzhuo
2018-06-14 1:52 ` Zhao1, Wei
2018-06-14 7:21 ` [dpdk-dev] [PATCH v2] " Wei Zhao
2018-06-15 2:30 ` [dpdk-dev] [PATCH v3] " Wei Zhao
2018-06-15 3:10 ` [dpdk-dev] [PATCH v4] " Wei Zhao
2018-06-15 6:08 ` [dpdk-dev] [PATCH v5] " Wei Zhao
2018-06-19 0:57 ` Lu, Wenzhuo
2018-06-21 14:12 ` Zhang, Qi Z [this message]
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