From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id 0B8D21BDF9 for ; Wed, 27 Jun 2018 14:50:04 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 27 Jun 2018 05:50:02 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,278,1526367600"; d="scan'208";a="70421084" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by orsmga002.jf.intel.com with ESMTP; 27 Jun 2018 05:50:02 -0700 Received: from fmsmsx112.amr.corp.intel.com (10.18.116.6) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 27 Jun 2018 05:50:02 -0700 Received: from shsmsx102.ccr.corp.intel.com (10.239.4.154) by FMSMSX112.amr.corp.intel.com (10.18.116.6) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 27 Jun 2018 05:50:01 -0700 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.51]) by shsmsx102.ccr.corp.intel.com ([169.254.2.223]) with mapi id 14.03.0319.002; Wed, 27 Jun 2018 20:49:59 +0800 From: "Zhang, Qi Z" To: "Zhao1, Wei" , "dev@dpdk.org" CC: "Lu, Wenzhuo" Thread-Topic: [PATCH v4] net/fm10k: add support for check descriptor status APIs Thread-Index: AQHUCgTI0OObUFShl0GBXSOBy20mSaRzx3HwgAADGxCAAEtWoA== Date: Wed, 27 Jun 2018 12:49:59 +0000 Message-ID: <039ED4275CED7440929022BC67E706115323F3A3@SHSMSX103.ccr.corp.intel.com> References: <1529653997-59726-1-git-send-email-wei.zhao1@intel.com> <1529655607-38664-1-git-send-email-wei.zhao1@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNzliNDM1MzgtZTNkZS00YjIxLWI4NDMtNjZjMDFlNjA0ZjIxIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoieWhsYk1uZ3RpY0FRTUx3aThVXC9MeDhzTng1U29pOHB5M1NEcWhtQVBYU0RkU2x1MjI3cHZWSXVBUm83Y0htbjcifQ== x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.200.100 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v4] net/fm10k: add support for check descriptor status APIs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 27 Jun 2018 12:50:05 -0000 > > > diff --git a/doc/guides/rel_notes/release_18_08.rst > > > b/doc/guides/rel_notes/release_18_08.rst > > > index 5bc23c5..5baa09e 100644 > > > --- a/doc/guides/rel_notes/release_18_08.rst > > > +++ b/doc/guides/rel_notes/release_18_08.rst > > > @@ -41,6 +41,12 @@ New Features > > > Also, make sure to start the actual text at the margin. > > > > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D > > > > > > +* **Added fm10k ethernet driver to support check descriptor status > > > +APIs.** > > > + > > > + Fm10k nic need to support check descriptor status APIs, they are > > > + rte_eth_rx_descriptor_status and rte_eth_tx_descriptor_status. > > > + add ops pointer with new function which enable feature. Sorry, I think the description in release note also nee be changed. Btw, could you rebase to dpdk-next-net-intel? Thanks! Qi > > > + > > > > > > API Changes > > > ----------- > > > diff --git a/drivers/net/fm10k/fm10k.h b/drivers/net/fm10k/fm10k.h > > > index > > > ef30780..1bc2c18 100644 > > > --- a/drivers/net/fm10k/fm10k.h > > > +++ b/drivers/net/fm10k/fm10k.h > > > @@ -329,6 +329,13 @@ uint16_t fm10k_recv_scattered_pkts(void > > > *rx_queue, int fm10k_dev_rx_descriptor_done(void *rx_queue, > > > uint16_t offset); > > > > > > +int > > > +fm10k_dev_rx_descriptor_status(void *rx_queue, uint16_t offset); > > > + > > > +int > > > +fm10k_dev_tx_descriptor_status(void *rx_queue, uint16_t offset); > > > + > > > + > > > uint16_t fm10k_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, > > > uint16_t nb_pkts); > > > > > > diff --git a/drivers/net/fm10k/fm10k_ethdev.c > > > b/drivers/net/fm10k/fm10k_ethdev.c > > > index 3ff1b0e..ea2f2bf 100644 > > > --- a/drivers/net/fm10k/fm10k_ethdev.c > > > +++ b/drivers/net/fm10k/fm10k_ethdev.c > > > @@ -2837,6 +2837,8 @@ static const struct eth_dev_ops > > > fm10k_eth_dev_ops =3D { > > > .tx_queue_setup =3D fm10k_tx_queue_setup, > > > .tx_queue_release =3D fm10k_tx_queue_release, > > > .rx_descriptor_done =3D fm10k_dev_rx_descriptor_done, > > > + .rx_descriptor_status =3D fm10k_dev_rx_descriptor_status, > > > + .tx_descriptor_status =3D fm10k_dev_tx_descriptor_status, > > > .rx_queue_intr_enable =3D fm10k_dev_rx_queue_intr_enable, > > > .rx_queue_intr_disable =3D fm10k_dev_rx_queue_intr_disable, > > > .reta_update =3D fm10k_reta_update, > > > diff --git a/drivers/net/fm10k/fm10k_rxtx.c > > > b/drivers/net/fm10k/fm10k_rxtx.c index 9320748..daa2b32 100644 > > > --- a/drivers/net/fm10k/fm10k_rxtx.c > > > +++ b/drivers/net/fm10k/fm10k_rxtx.c > > > @@ -389,6 +389,84 @@ fm10k_dev_rx_descriptor_done(void *rx_queue, > > > uint16_t offset) > > > return ret; > > > } > > > > > > +int > > > +fm10k_dev_rx_descriptor_status(void *rx_queue, uint16_t offset) { > > > + volatile union fm10k_rx_desc *rxdp; > > > + struct fm10k_rx_queue *rxq =3D rx_queue; > > > + uint16_t nb_hold, trigger_last; > > > + uint16_t desc; > > > + int ret; > > > + > > > + if (unlikely(offset >=3D rxq->nb_desc)) { > > > + PMD_DRV_LOG(ERR, "Invalid RX descriptor offset %u", offset); > > > + return 0; > > > + } > > > + > > > + if (rxq->next_trigger < rxq->alloc_thresh) > > > + trigger_last =3D rxq->next_trigger + > > > + rxq->nb_desc - rxq->alloc_thresh; > > > + else > > > + trigger_last =3D rxq->next_trigger - rxq->alloc_thresh; > > > + > > > + if (rxq->next_dd < trigger_last) > > > + nb_hold =3D rxq->next_dd + rxq->nb_desc - trigger_last; > > > + else > > > + nb_hold =3D rxq->next_dd - trigger_last; > > > + > > > + if (offset >=3D rxq->nb_desc - nb_hold) > > > + return RTE_ETH_RX_DESC_UNAVAIL; > > > + > > > + desc =3D rxq->next_dd + offset; > > > + if (desc >=3D rxq->nb_desc) > > > + desc -=3D rxq->nb_desc; > > > + > > > + rxdp =3D &rxq->hw_ring[desc]; > > > + > > > + ret =3D !!(rxdp->w.status & > > > + rte_cpu_to_le_16(FM10K_RXD_STATUS_DD)); > > > + > > > + return ret; > > > +} > > > + > > > +int > > > +fm10k_dev_tx_descriptor_status(void *tx_queue, uint16_t offset) { > > > + volatile struct fm10k_tx_desc *txdp; > > > + struct fm10k_tx_queue *txq =3D tx_queue; > > > + uint16_t desc; > > > + uint16_t count, next_rs =3D txq->nb_desc; > > > + struct fifo rs_tracker =3D txq->rs_tracker; > > > + struct fifo *r =3D &rs_tracker; > > > + > > > + if (unlikely(offset >=3D txq->nb_desc)) > > > + return -EINVAL; > > > + > > > + desc =3D txq->next_free + offset; > > > + /* go to next desc that has the RS bit */ > > > + desc =3D (desc / txq->rs_thresh + 1) * > > > + txq->rs_thresh - 1; > > > + > > > + if (desc >=3D txq->nb_desc) { > > > + desc -=3D txq->nb_desc; > > > + if (desc >=3D txq->nb_desc) > > > + desc -=3D txq->nb_desc; > > > + } > > > + > > > + r->head =3D r->list; > > > + for (count =3D 0; r->head !=3D r->endp; count++) { > > > > I didn't see the necessary to have "count" here. > > > > Others I didn't see issue, btw, could you rebase on dpdk-next-net-intel= ? > > > > Thanks > > Qi > > > > > > > + if (*r->head >=3D desc && *r->head < next_rs) > > > + next_rs =3D *r->head; > > > + ++r->head; > > > + } > > > + > > > + txdp =3D &txq->hw_ring[next_rs]; > > > + if (txdp->flags & FM10K_TXD_FLAG_DONE) > > > + return RTE_ETH_TX_DESC_DONE; > > > + > > > + return RTE_ETH_TX_DESC_FULL; > > > +} > > > + > > > /* > > > * Free multiple TX mbuf at a time if they are in the same pool > > > * > > > -- > > > 2.7.5