From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by dpdk.org (Postfix) with ESMTP id 199181B3EC; Mon, 7 Jan 2019 08:33:04 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Jan 2019 23:33:03 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,450,1539673200"; d="scan'208";a="264976519" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by orsmga004.jf.intel.com with ESMTP; 06 Jan 2019 23:33:03 -0800 Received: from fmsmsx112.amr.corp.intel.com (10.18.116.6) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.408.0; Sun, 6 Jan 2019 23:33:03 -0800 Received: from shsmsx101.ccr.corp.intel.com (10.239.4.153) by FMSMSX112.amr.corp.intel.com (10.18.116.6) with Microsoft SMTP Server (TLS) id 14.3.408.0; Sun, 6 Jan 2019 23:33:03 -0800 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.150]) by SHSMSX101.ccr.corp.intel.com ([169.254.1.196]) with mapi id 14.03.0415.000; Mon, 7 Jan 2019 15:33:01 +0800 From: "Zhang, Qi Z" To: "Zhao1, Wei" , "dev@dpdk.org" CC: "stable@dpdk.org" , "Wu, Jingjing" Thread-Topic: [PATCH v4] net/ixgbe: fix multicast table enable error for VF Thread-Index: AQHUplQflvvTCub/lky4rE5uSrzM06WjZnQQ Date: Mon, 7 Jan 2019 07:33:00 +0000 Message-ID: <039ED4275CED7440929022BC67E706115331681C@SHSMSX103.ccr.corp.intel.com> References: <11546839569-13787-1-git-send-email-wei.zhao1@intel.com> <1546841774-15676-1-git-send-email-wei.zhao1@intel.com> In-Reply-To: <1546841774-15676-1-git-send-email-wei.zhao1@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYWQwZjFjZjctNDYzYi00ODEyLTgwOWYtMjAyNGJjMjllNjczIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiTlZxZGJ6d05tNm9aZFdmR3FpZXdzcE5NY2lGXC9iaTJiVG1ENFZpTmZMVnpKSDdiVUxDeGZFd0NmV3NzMGNuaWoifQ== x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v4] net/ixgbe: fix multicast table enable error for VF X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 07 Jan 2019 07:33:05 -0000 > -----Original Message----- > From: Zhao1, Wei > Sent: Monday, January 7, 2019 2:16 PM > To: dev@dpdk.org > Cc: stable@dpdk.org; Zhang, Qi Z ; Wu, Jingjing > ; Zhao1, Wei > Subject: [PATCH v4] net/ixgbe: fix multicast table enable error for VF How about change the title to: "fix over using multicast table for VF" ? >=20 > In ixgbe PMD code, all vf ars set with bit IXGBE_VMOLR_ROMPE, which make = vf > accept packets that match the MTA table, if some vf update IXGBE_MTA in > function ixgbe_vf_set_multicast, then all vf will receive packets from th= ese > address. > So there is need to set VMOLR register bit ROPE only after this vf has be= en set > multicast address. If this bit is set when pf host doing initialization, = this vf will > receive multicast packets with address written in MTA table.And also disa= ble > MTA when detect entry number of MAC address is 0 of configuration from vf= . > Align to ixgbe pf kernel 5.3.7 code to fix this bug. I did below re-word to make it easy to understand. According to the current implementation, all VFs will set bit IXGBE_VMOLR_ROMPE during initialization, this cause any VF will accept packets that match the MTA table. Since the MTA table is shared by all VFs which means if one VF update MTA table in function ixgbe_vf_set_multicast, then all other VFs will receive multicast packets=20 which cause unnecessary performance overhead. So it's better to set VF's ROPE bit of register VMOLR only if multicast address filter is required on that VF. Also, the ROPE bit should be reset when multicast address filter is requested to clean. This patch also aligns to the related fix on ixgbe kernel driver 5.3.7. >=20 > Fixes: 00e30184daa0 ("ixgbe: add PF support") >=20 > Signed-off-by: Wei Zhao >=20 > --- >=20 > v2: > change patch name and fix typo in log. >=20 > v3: > fix typo and disable MTA when detect > all zero MAC address configuration. >=20 > v4: > change code to disable MTA when detect > entry number of MAC address is 0 of configuration from vf. > --- > drivers/net/ixgbe/ixgbe_pf.c | 12 +++++++++++- > 1 file changed, 11 insertions(+), 1 deletion(-) >=20 > diff --git a/drivers/net/ixgbe/ixgbe_pf.c b/drivers/net/ixgbe/ixgbe_pf.c = index > 4b833ff..4e4d39a 100644 > --- a/drivers/net/ixgbe/ixgbe_pf.c > +++ b/drivers/net/ixgbe/ixgbe_pf.c > @@ -351,7 +351,7 @@ ixgbe_vf_reset_event(struct rte_eth_dev *dev, uint16_= t > vf) > int rar_entry =3D hw->mac.num_rar_entries - (vf + 1); > uint32_t vmolr =3D IXGBE_READ_REG(hw, IXGBE_VMOLR(vf)); >=20 > - vmolr |=3D (IXGBE_VMOLR_ROPE | IXGBE_VMOLR_ROMPE | > + vmolr |=3D (IXGBE_VMOLR_ROPE | > IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE); > IXGBE_WRITE_REG(hw, IXGBE_VMOLR(vf), vmolr); >=20 > @@ -503,6 +503,7 @@ ixgbe_vf_set_multicast(struct rte_eth_dev *dev, > uint32_t vf, uint32_t *msgbuf) > const uint32_t IXGBE_MTA_BIT_MASK =3D (0x1 << IXGBE_MTA_BIT_SHIFT) - > 1; > uint32_t reg_val; > int i; > + u32 vmolr =3D IXGBE_READ_REG(hw, IXGBE_VMOLR(vf)); >=20 > /* Disable multicast promiscuous first */ > ixgbe_disable_vf_mc_promisc(dev, vf); > @@ -516,6 +517,12 @@ ixgbe_vf_set_multicast(struct rte_eth_dev *dev, > uint32_t vf, uint32_t *msgbuf) > vfinfo->vf_mc_hashes[i] =3D hash_list[i]; > } >=20 > + if (!nb_entries) { It's better to write as If (nb_entries =3D=3D 0) to follow the coding guideline. > + vmolr &=3D ~IXGBE_VMOLR_ROMPE; > + IXGBE_WRITE_REG(hw, IXGBE_VMOLR(vf), vmolr); > + return 0; > + } > + > for (i =3D 0; i < vfinfo->num_vf_mc_hashes; i++) { > mta_idx =3D (vfinfo->vf_mc_hashes[i] >> IXGBE_MTA_BIT_SHIFT) > & IXGBE_MTA_INDEX_MASK; > @@ -525,6 +532,9 @@ ixgbe_vf_set_multicast(struct rte_eth_dev *dev, > uint32_t vf, uint32_t *msgbuf) > IXGBE_WRITE_REG(hw, IXGBE_MTA(mta_idx), reg_val); > } >=20 > + vmolr |=3D IXGBE_VMOLR_ROMPE; > + IXGBE_WRITE_REG(hw, IXGBE_VMOLR(vf), vmolr); > + > return 0; > } >=20 > -- > 2.7.5