From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by dpdk.org (Postfix) with ESMTP id CFC6F4F9A for ; Wed, 1 May 2019 03:09:02 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Apr 2019 18:09:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,415,1549958400"; d="scan'208";a="342318438" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by fmsmga006.fm.intel.com with ESMTP; 30 Apr 2019 18:09:01 -0700 Received: from fmsmsx112.amr.corp.intel.com (10.18.116.6) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.408.0; Tue, 30 Apr 2019 18:09:01 -0700 Received: from shsmsx104.ccr.corp.intel.com (10.239.4.70) by FMSMSX112.amr.corp.intel.com (10.18.116.6) with Microsoft SMTP Server (TLS) id 14.3.408.0; Tue, 30 Apr 2019 18:09:01 -0700 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.70]) by SHSMSX104.ccr.corp.intel.com ([169.254.5.33]) with mapi id 14.03.0415.000; Wed, 1 May 2019 09:08:59 +0800 From: "Zhang, Qi Z" To: "Wang, Haiyue" , "dev@dpdk.org" , "Lu, Wenzhuo" Thread-Topic: [PATCH v1] net/ice: add link-up and link-down functions Thread-Index: AQHU/yS3r3ZHTBcQ9EqZO5e+c81gt6ZVdKdQ Date: Wed, 1 May 2019 01:08:59 +0000 Message-ID: <039ED4275CED7440929022BC67E706115337A0F2@SHSMSX103.ccr.corp.intel.com> References: <1556608319-5135-1-git-send-email-haiyue.wang@intel.com> In-Reply-To: <1556608319-5135-1-git-send-email-haiyue.wang@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiODRjNmVmYzAtMjRjYS00NzIxLWJlMTctZTJmYTlkZjc0ZDQwIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiYnZkN1lKUCtVbk93Njc3bDVFVUd0cHdlbVQ4VWE0cWdFbk0xbk90TTJVS3puZ2dvN0xjdVBWV2ZUcWFyZzAwNSJ9 x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.600.7 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v1] net/ice: add link-up and link-down functions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 01 May 2019 01:09:03 -0000 > -----Original Message----- > From: Wang, Haiyue > Sent: Tuesday, April 30, 2019 3:12 PM > To: dev@dpdk.org; Zhang, Qi Z ; Lu, Wenzhuo > > Cc: Wang, Haiyue > Subject: [PATCH v1] net/ice: add link-up and link-down functions >=20 > Support link up and down functions for ice, and when stop the ice, makes = the > link down also. >=20 > Signed-off-by: Haiyue Wang > --- > drivers/net/ice/ice_ethdev.c | 83 > ++++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 83 insertions(+) >=20 > diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c = index > 1f06a2c..8f58150 100644 > --- a/drivers/net/ice/ice_ethdev.c > +++ b/drivers/net/ice/ice_ethdev.c > @@ -32,6 +32,9 @@ static void ice_dev_info_get(struct rte_eth_dev *dev, > struct rte_eth_dev_info *dev_info); static int > ice_link_update(struct rte_eth_dev *dev, > int wait_to_complete); > +static int ice_dev_set_link_up(struct rte_eth_dev *dev); static int > +ice_dev_set_link_down(struct rte_eth_dev *dev); > + > static int ice_mtu_set(struct rte_eth_dev *dev, uint16_t mtu); static i= nt > ice_vlan_offload_set(struct rte_eth_dev *dev, int mask); static int > ice_vlan_tpid_set(struct rte_eth_dev *dev, @@ -94,6 +97,8 @@ static const > struct eth_dev_ops ice_eth_dev_ops =3D { > .dev_stop =3D ice_dev_stop, > .dev_close =3D ice_dev_close, > .dev_reset =3D ice_dev_reset, > + .dev_set_link_up =3D ice_dev_set_link_up, > + .dev_set_link_down =3D ice_dev_set_link_down, > .rx_queue_start =3D ice_rx_queue_start, > .rx_queue_stop =3D ice_rx_queue_stop, > .tx_queue_start =3D ice_tx_queue_start, > @@ -1541,6 +1546,9 @@ ice_dev_stop(struct rte_eth_dev *dev) > /* Clear all queues and release mbufs */ > ice_clear_queues(dev); >=20 > + /* Set link down */ The comment looks redundant Same for the comment for ice_pf_disable_irq0 and ice_dev_set_link_up at bel= ow. > + ice_dev_set_link_down(dev); > + > /* Clean datapath event and queue/vec mapping */ > rte_intr_efd_disable(intr_handle); > if (intr_handle->intr_vec) { > @@ -1562,10 +1570,14 @@ ice_dev_close(struct rte_eth_dev *dev) > /* release all queue resource */ > ice_free_queues(dev); >=20 > + /* Disable interrupt */ > + ice_pf_disable_irq0(hw); It's better to add some explanation here. why we need this. > + > ice_res_pool_destroy(&pf->msix_pool); > ice_release_vsi(pf->main_vsi); > ice_sched_cleanup_all(hw); > rte_free(hw->port_info); > + hw->port_info =3D NULL; > ice_shutdown_all_ctrlq(hw); > } >=20 > @@ -1936,6 +1948,9 @@ ice_dev_start(struct rte_eth_dev *dev) > if (ret !=3D ICE_SUCCESS) > PMD_DRV_LOG(WARNING, "Fail to set phy mask"); >=20 > + /* Set link up */ > + ice_dev_set_link_up(dev); > + > /* Call get_link_info aq commond to enable/disable LSE */ > ice_link_update(dev, 0); >=20 > @@ -2218,6 +2233,74 @@ ice_link_update(struct rte_eth_dev *dev, > __rte_unused int wait_to_complete) > return 0; > } >=20 > +/* Force the physical link state by getting the current PHY > +capabilities from > + * hardware and setting the PHY config based on the determined > +capabilities. If > + * link changes, link event will be triggered because both the Enable > +Automatic > + * Link Update and LESM Enable bits are set when setting the PHY > capabilities. > + */ > +static enum ice_status > +ice_force_phys_link_state(struct ice_hw *hw, bool link_up) { > + struct ice_aqc_set_phy_cfg_data cfg =3D { 0 }; > + struct ice_aqc_get_phy_caps_data *pcaps; > + struct ice_port_info *pi; > + enum ice_status status; > + > + if (!hw || !hw->port_info) > + return ICE_ERR_PARAM; > + > + pi =3D hw->port_info; > + > + pcaps =3D (struct ice_aqc_get_phy_caps_data *) > + ice_malloc(hw, sizeof(*pcaps)); > + if (!pcaps) > + return ICE_ERR_NO_MEMORY; > + > + status =3D ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_SW_CFG, pcaps, > + NULL); > + if (status) > + goto out; > + > + /* No change in link */ > + if (link_up =3D=3D !!(pcaps->caps & ICE_AQC_PHY_EN_LINK) && > + link_up =3D=3D !!(pi->phy.link_info.link_info & ICE_AQ_LINK_UP)) > + goto out; > + > + cfg.phy_type_low =3D pcaps->phy_type_low; > + cfg.phy_type_high =3D pcaps->phy_type_high; > + cfg.caps =3D pcaps->caps | ICE_AQ_PHY_ENA_AUTO_LINK_UPDT; > + cfg.low_power_ctrl =3D pcaps->low_power_ctrl; > + cfg.eee_cap =3D pcaps->eee_cap; > + cfg.eeer_value =3D pcaps->eeer_value; > + cfg.link_fec_opt =3D pcaps->link_fec_options; > + if (link_up) > + cfg.caps |=3D ICE_AQ_PHY_ENA_LINK; > + else > + cfg.caps &=3D ~ICE_AQ_PHY_ENA_LINK; > + > + status =3D ice_aq_set_phy_cfg(hw, pi->lport, &cfg, NULL); > + > +out: > + ice_free(hw, pcaps); > + return status; > +} > + > +static int > +ice_dev_set_link_up(struct rte_eth_dev *dev) { > + struct ice_hw *hw =3D ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private); > + > + return ice_force_phys_link_state(hw, true); } > + > +static int > +ice_dev_set_link_down(struct rte_eth_dev *dev) { > + struct ice_hw *hw =3D ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private); > + > + return ice_force_phys_link_state(hw, false); } > + > static int > ice_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) { > -- > 2.7.4 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id 89168A0679 for ; Wed, 1 May 2019 03:09:05 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D0A86568A; Wed, 1 May 2019 03:09:04 +0200 (CEST) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by dpdk.org (Postfix) with ESMTP id CFC6F4F9A for ; Wed, 1 May 2019 03:09:02 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Apr 2019 18:09:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,415,1549958400"; d="scan'208";a="342318438" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by fmsmga006.fm.intel.com with ESMTP; 30 Apr 2019 18:09:01 -0700 Received: from fmsmsx112.amr.corp.intel.com (10.18.116.6) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.408.0; Tue, 30 Apr 2019 18:09:01 -0700 Received: from shsmsx104.ccr.corp.intel.com (10.239.4.70) by FMSMSX112.amr.corp.intel.com (10.18.116.6) with Microsoft SMTP Server (TLS) id 14.3.408.0; Tue, 30 Apr 2019 18:09:01 -0700 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.70]) by SHSMSX104.ccr.corp.intel.com ([169.254.5.33]) with mapi id 14.03.0415.000; Wed, 1 May 2019 09:08:59 +0800 From: "Zhang, Qi Z" To: "Wang, Haiyue" , "dev@dpdk.org" , "Lu, Wenzhuo" Thread-Topic: [PATCH v1] net/ice: add link-up and link-down functions Thread-Index: AQHU/yS3r3ZHTBcQ9EqZO5e+c81gt6ZVdKdQ Date: Wed, 1 May 2019 01:08:59 +0000 Message-ID: <039ED4275CED7440929022BC67E706115337A0F2@SHSMSX103.ccr.corp.intel.com> References: <1556608319-5135-1-git-send-email-haiyue.wang@intel.com> In-Reply-To: <1556608319-5135-1-git-send-email-haiyue.wang@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiODRjNmVmYzAtMjRjYS00NzIxLWJlMTctZTJmYTlkZjc0ZDQwIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiYnZkN1lKUCtVbk93Njc3bDVFVUd0cHdlbVQ4VWE0cWdFbk0xbk90TTJVS3puZ2dvN0xjdVBWV2ZUcWFyZzAwNSJ9 x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.600.7 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v1] net/ice: add link-up and link-down functions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Message-ID: <20190501010859.sB6fdikRsPiBwKhOgtmAFa0qy5J1g1JQPHsrf3hg1HU@z> > -----Original Message----- > From: Wang, Haiyue > Sent: Tuesday, April 30, 2019 3:12 PM > To: dev@dpdk.org; Zhang, Qi Z ; Lu, Wenzhuo > > Cc: Wang, Haiyue > Subject: [PATCH v1] net/ice: add link-up and link-down functions >=20 > Support link up and down functions for ice, and when stop the ice, makes = the > link down also. >=20 > Signed-off-by: Haiyue Wang > --- > drivers/net/ice/ice_ethdev.c | 83 > ++++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 83 insertions(+) >=20 > diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c = index > 1f06a2c..8f58150 100644 > --- a/drivers/net/ice/ice_ethdev.c > +++ b/drivers/net/ice/ice_ethdev.c > @@ -32,6 +32,9 @@ static void ice_dev_info_get(struct rte_eth_dev *dev, > struct rte_eth_dev_info *dev_info); static int > ice_link_update(struct rte_eth_dev *dev, > int wait_to_complete); > +static int ice_dev_set_link_up(struct rte_eth_dev *dev); static int > +ice_dev_set_link_down(struct rte_eth_dev *dev); > + > static int ice_mtu_set(struct rte_eth_dev *dev, uint16_t mtu); static i= nt > ice_vlan_offload_set(struct rte_eth_dev *dev, int mask); static int > ice_vlan_tpid_set(struct rte_eth_dev *dev, @@ -94,6 +97,8 @@ static const > struct eth_dev_ops ice_eth_dev_ops =3D { > .dev_stop =3D ice_dev_stop, > .dev_close =3D ice_dev_close, > .dev_reset =3D ice_dev_reset, > + .dev_set_link_up =3D ice_dev_set_link_up, > + .dev_set_link_down =3D ice_dev_set_link_down, > .rx_queue_start =3D ice_rx_queue_start, > .rx_queue_stop =3D ice_rx_queue_stop, > .tx_queue_start =3D ice_tx_queue_start, > @@ -1541,6 +1546,9 @@ ice_dev_stop(struct rte_eth_dev *dev) > /* Clear all queues and release mbufs */ > ice_clear_queues(dev); >=20 > + /* Set link down */ The comment looks redundant Same for the comment for ice_pf_disable_irq0 and ice_dev_set_link_up at bel= ow. > + ice_dev_set_link_down(dev); > + > /* Clean datapath event and queue/vec mapping */ > rte_intr_efd_disable(intr_handle); > if (intr_handle->intr_vec) { > @@ -1562,10 +1570,14 @@ ice_dev_close(struct rte_eth_dev *dev) > /* release all queue resource */ > ice_free_queues(dev); >=20 > + /* Disable interrupt */ > + ice_pf_disable_irq0(hw); It's better to add some explanation here. why we need this. > + > ice_res_pool_destroy(&pf->msix_pool); > ice_release_vsi(pf->main_vsi); > ice_sched_cleanup_all(hw); > rte_free(hw->port_info); > + hw->port_info =3D NULL; > ice_shutdown_all_ctrlq(hw); > } >=20 > @@ -1936,6 +1948,9 @@ ice_dev_start(struct rte_eth_dev *dev) > if (ret !=3D ICE_SUCCESS) > PMD_DRV_LOG(WARNING, "Fail to set phy mask"); >=20 > + /* Set link up */ > + ice_dev_set_link_up(dev); > + > /* Call get_link_info aq commond to enable/disable LSE */ > ice_link_update(dev, 0); >=20 > @@ -2218,6 +2233,74 @@ ice_link_update(struct rte_eth_dev *dev, > __rte_unused int wait_to_complete) > return 0; > } >=20 > +/* Force the physical link state by getting the current PHY > +capabilities from > + * hardware and setting the PHY config based on the determined > +capabilities. If > + * link changes, link event will be triggered because both the Enable > +Automatic > + * Link Update and LESM Enable bits are set when setting the PHY > capabilities. > + */ > +static enum ice_status > +ice_force_phys_link_state(struct ice_hw *hw, bool link_up) { > + struct ice_aqc_set_phy_cfg_data cfg =3D { 0 }; > + struct ice_aqc_get_phy_caps_data *pcaps; > + struct ice_port_info *pi; > + enum ice_status status; > + > + if (!hw || !hw->port_info) > + return ICE_ERR_PARAM; > + > + pi =3D hw->port_info; > + > + pcaps =3D (struct ice_aqc_get_phy_caps_data *) > + ice_malloc(hw, sizeof(*pcaps)); > + if (!pcaps) > + return ICE_ERR_NO_MEMORY; > + > + status =3D ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_SW_CFG, pcaps, > + NULL); > + if (status) > + goto out; > + > + /* No change in link */ > + if (link_up =3D=3D !!(pcaps->caps & ICE_AQC_PHY_EN_LINK) && > + link_up =3D=3D !!(pi->phy.link_info.link_info & ICE_AQ_LINK_UP)) > + goto out; > + > + cfg.phy_type_low =3D pcaps->phy_type_low; > + cfg.phy_type_high =3D pcaps->phy_type_high; > + cfg.caps =3D pcaps->caps | ICE_AQ_PHY_ENA_AUTO_LINK_UPDT; > + cfg.low_power_ctrl =3D pcaps->low_power_ctrl; > + cfg.eee_cap =3D pcaps->eee_cap; > + cfg.eeer_value =3D pcaps->eeer_value; > + cfg.link_fec_opt =3D pcaps->link_fec_options; > + if (link_up) > + cfg.caps |=3D ICE_AQ_PHY_ENA_LINK; > + else > + cfg.caps &=3D ~ICE_AQ_PHY_ENA_LINK; > + > + status =3D ice_aq_set_phy_cfg(hw, pi->lport, &cfg, NULL); > + > +out: > + ice_free(hw, pcaps); > + return status; > +} > + > +static int > +ice_dev_set_link_up(struct rte_eth_dev *dev) { > + struct ice_hw *hw =3D ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private); > + > + return ice_force_phys_link_state(hw, true); } > + > +static int > +ice_dev_set_link_down(struct rte_eth_dev *dev) { > + struct ice_hw *hw =3D ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private); > + > + return ice_force_phys_link_state(hw, false); } > + > static int > ice_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) { > -- > 2.7.4