From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id B6E07A2EFC for ; Tue, 17 Sep 2019 04:34:02 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 532951BFC0; Tue, 17 Sep 2019 04:34:01 +0200 (CEST) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by dpdk.org (Postfix) with ESMTP id 6204C1BFBF for ; Tue, 17 Sep 2019 04:33:59 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Sep 2019 19:33:58 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,515,1559545200"; d="scan'208";a="201733085" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by fmsmga001.fm.intel.com with ESMTP; 16 Sep 2019 19:33:58 -0700 Received: from fmsmsx163.amr.corp.intel.com (10.18.125.72) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.439.0; Mon, 16 Sep 2019 19:33:57 -0700 Received: from shsmsx102.ccr.corp.intel.com (10.239.4.154) by fmsmsx163.amr.corp.intel.com (10.18.125.72) with Microsoft SMTP Server (TLS) id 14.3.439.0; Mon, 16 Sep 2019 19:33:57 -0700 Received: from shsmsx105.ccr.corp.intel.com ([169.254.11.23]) by shsmsx102.ccr.corp.intel.com ([169.254.2.113]) with mapi id 14.03.0439.000; Tue, 17 Sep 2019 10:33:55 +0800 From: "Zhang, Qi Z" To: "Cui, LunyuanX" , "Yang, Qiming" , "Wu, Jingjing" , "Xing, Beilei" , "Wang, ShougangX" , "Stillwell Jr, Paul M" CC: "dev@dpdk.org" Thread-Topic: [RFC v3] net/i40e: enable multi-queue Rx interrupt for VF Thread-Index: AQHVbFpcztslt+QOLE+Fo7GYtHzAYqcvJchg Date: Tue, 17 Sep 2019 02:33:54 +0000 Message-ID: <039ED4275CED7440929022BC67E7061153D97AEB@SHSMSX105.ccr.corp.intel.com> References: <20190902194535.2699-1-lunyuanx.cui@intel.com> <20190916144308.119187-1-lunyuanx.cui@intel.com> In-Reply-To: <20190916144308.119187-1-lunyuanx.cui@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNWExYzhmMzMtODJjZS00ZDljLTk4NGYtYjE2ZmNhYmQ1MmRlIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiSWpWc3lPNkNYZFlRUVBpQXNuajJ6V2s4cEp5VjljRzVDZjBpSkppb2VrVklGSDJiVDJUTk9RZUF6S2QxTFljYSJ9 x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [RFC v3] net/i40e: enable multi-queue Rx interrupt for VF X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Cui, LunyuanX > Sent: Monday, September 16, 2019 10:43 PM > To: Yang, Qiming ; Wu, Jingjing > ; Xing, Beilei ; Zhang, Qi = Z > ; Wang, ShougangX ; > Stillwell Jr, Paul M > Cc: dev@dpdk.org; Cui, LunyuanX > Subject: [RFC v3] net/i40e: enable multi-queue Rx interrupt for VF >=20 > Current implementation is that only one Rx queue can support interrupt, > because all queues are mapped in the same vector id in vfio_enable_msix()= . > So VF can not support multi-queue Rx interrupt in the interrupt mode. >=20 > In this patch, if the packet I/O interrupt on datapath is enabled > (rte_intr_dp_is_en(intr_handle) is true), we map different interrupt vect= ors to > each queue and send this map to PF. > After PF sets the map to the register, > all Rx queue interrupts will be received. >=20 > In addition, because of the i40e performance in ioctl(), the maximum > supported interrupt vector id is 4. > If vector id is more than 4, i40e driver will fail to start. > So when queue number is more than 4, > we set up a loop of interrupt vectors map from 1 to 4. Don't know why we need to limit max interrupt to 4, why i40e driver will fa= il to start, could share more detail? I think you can do the similar implementation as iavf driver does (ref iavf= _config_irq_map) >=20 > Signed-off-by: Lunyuan Cui > --- > v3: > * combined 2 lines into 1 line > before: > map_info->vecmap[i].rxq_map =3D 0; > map_info->vecmap[i].rxq_map |=3D 1 << i; > after: > map_info->vecmap[i].rxq_map =3D 1 << i; >=20 > v2: > * set up a loop of interrupt vectors map from 1 to 4, and sent > message from VF to PF by one time. > --- > drivers/net/i40e/i40e_ethdev_vf.c | 27 +++++++++++++++++---------- > 1 file changed, 17 insertions(+), 10 deletions(-) >=20 > diff --git a/drivers/net/i40e/i40e_ethdev_vf.c > b/drivers/net/i40e/i40e_ethdev_vf.c > index 308fb9835..abb2d1353 100644 > --- a/drivers/net/i40e/i40e_ethdev_vf.c > +++ b/drivers/net/i40e/i40e_ethdev_vf.c > @@ -645,13 +645,15 @@ i40evf_configure_vsi_queues(struct rte_eth_dev > *dev) > return ret; > } >=20 > +#define RTE_LIBRTE_I40E_IRQ_NUM_PER_VF 4 > + > static int > i40evf_config_irq_map(struct rte_eth_dev *dev) { > struct i40e_vf *vf =3D > I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); > struct vf_cmd_info args; > uint8_t cmd_buffer[sizeof(struct virtchnl_irq_map_info) + \ > - sizeof(struct virtchnl_vector_map)]; > + sizeof(struct virtchnl_vector_map) * dev->data->nb_rx_queues]; > struct virtchnl_irq_map_info *map_info; > struct rte_pci_device *pci_dev =3D RTE_ETH_DEV_TO_PCI(dev); > struct rte_intr_handle *intr_handle =3D &pci_dev->intr_handle; @@ -665,= 18 > +667,23 @@ i40evf_config_irq_map(struct rte_eth_dev *dev) > vector_id =3D I40E_MISC_VEC_ID; >=20 > map_info =3D (struct virtchnl_irq_map_info *)cmd_buffer; > - map_info->num_vectors =3D 1; > - map_info->vecmap[0].rxitr_idx =3D I40E_ITR_INDEX_DEFAULT; > - map_info->vecmap[0].vsi_id =3D vf->vsi_res->vsi_id; > - /* Alway use default dynamic MSIX interrupt */ > - map_info->vecmap[0].vector_id =3D vector_id; > - /* Don't map any tx queue */ > - map_info->vecmap[0].txq_map =3D 0; > - map_info->vecmap[0].rxq_map =3D 0; > + map_info->num_vectors =3D dev->data->nb_rx_queues; > for (i =3D 0; i < dev->data->nb_rx_queues; i++) { > - map_info->vecmap[0].rxq_map |=3D 1 << i; > + map_info->vecmap[i].rxitr_idx =3D I40E_ITR_INDEX_DEFAULT; > + map_info->vecmap[i].vsi_id =3D vf->vsi_res->vsi_id; > + /* Alway use default dynamic MSIX interrupt */ > + map_info->vecmap[i].vector_id =3D vector_id; > + /* Don't map any tx queue */ > + map_info->vecmap[i].txq_map =3D 0; > + map_info->vecmap[i].rxq_map =3D 1 << i; > if (rte_intr_dp_is_en(intr_handle)) > intr_handle->intr_vec[i] =3D vector_id; > + if (vector_id > I40E_MISC_VEC_ID) { > + if (vector_id < RTE_LIBRTE_I40E_IRQ_NUM_PER_VF) > + vector_id++; > + else > + vector_id =3D I40E_RX_VEC_START; > + } > } >=20 > args.ops =3D VIRTCHNL_OP_CONFIG_IRQ_MAP; > -- > 2.17.1