From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id F2BA2A04B7; Mon, 7 Sep 2020 13:11:57 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D30C71BE85; Mon, 7 Sep 2020 13:11:57 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id 49DF01BE0C for ; Mon, 7 Sep 2020 13:11:56 +0200 (CEST) IronPort-SDR: /EG6mU+P/V2H1oRj4rN3Ij7Ax3GCA31KH4xJ2fV1+wznTiWjSiuWL98vT42zcJuzUaDx42sDjM nj4U3njb8Gxg== X-IronPort-AV: E=McAfee;i="6000,8403,9736"; a="157251446" X-IronPort-AV: E=Sophos;i="5.76,401,1592895600"; d="scan'208";a="157251446" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Sep 2020 04:11:55 -0700 IronPort-SDR: iszDNm0anvdY+dKJyENruXIoBKyU7MselBXEoEppdxwv7yxZ1DJsBcQ06qqU1IBtcP0D2Pttkj 63xfKD3XV+cg== X-IronPort-AV: E=Sophos;i="5.76,401,1592895600"; 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charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-dev] [PATCH 3/9] net/i40e/base: enable pipe monitor thresholds X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 9/5/2020 3:49 AM, Guinan Sun wrote: > Enable several registers and defines for software controlled > DCB, particularly around the receive pipe monitor configuration > which is necessary to help ports achieve the right throughput > under load in several different configurations. > > Signed-off-by: Jesse Brandeburg > Signed-off-by: Guinan Sun > --- > drivers/net/i40e/base/i40e_register.h | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/net/i40e/base/i40e_register.h b/drivers/net/i40e/base/i40e_register.h > index ee4f333f9..ee443e9c9 100644 > --- a/drivers/net/i40e/base/i40e_register.h > +++ b/drivers/net/i40e/base/i40e_register.h > @@ -203,6 +203,9 @@ > #define I40E_VFCM_PE_ERRINFO1_RLU_ERROR_CNT_MASK I40E_MASK(0xFF, I40E_VFCM_PE_ERRINFO1_RLU_ERROR_CNT_SHIFT) > #define I40E_VFCM_PE_ERRINFO1_RLS_ERROR_CNT_SHIFT 24 > #define I40E_VFCM_PE_ERRINFO1_RLS_ERROR_CNT_MASK I40E_MASK(0xFF, I40E_VFCM_PE_ERRINFO1_RLS_ERROR_CNT_SHIFT) > +#define I40E_PRT_SWR_PM_THR 0x0026CD00 /* Reset: CORER */ > +#define I40E_PRT_SWR_PM_THR_THRESHOLD_SHIFT 0 > +#define I40E_PRT_SWR_PM_THR_THRESHOLD_MASK I40E_MASK(0xFF, I40E_PRT_SWR_PM_THR_THRESHOLD_SHIFT) > #define I40E_GLDCB_GENC 0x00083044 /* Reset: CORER */ > #define I40E_GLDCB_GENC_PCIRTT_SHIFT 0 > #define I40E_GLDCB_GENC_PCIRTT_MASK I40E_MASK(0xFFFF, I40E_GLDCB_GENC_PCIRTT_SHIFT) > Same comment here, can this base code update be postponed to when these macros actually used?