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From: Martin Weiser <martin.weiser@allegro-packets.com>
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Subject: Re: [dpdk-dev] [PATCH v2] cxgbe: report 100G link speed capability
 for Chelsio T6 adapters
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>> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Martin Weiser
>> Sent: Thursday, June 22, 2017 9:58 AM
>> To: rahul.lakkireddy@chelsio.com
>> Cc: dev@dpdk.org; Martin Weiser <martin.weiser@allegro-packets.com>
>> Subject: [dpdk-dev] [PATCH v2] cxgbe: report 100G link speed capabilit=
y for Chelsio T6
>> adapters
>>
>> These adapters support 100G link speed but the speed_capa bitmask in t=
he
>> device info did not reflect that.
>>
>> Signed-off-by: Martin Weiser <martin.weiser@allegro-packets.com>
>> ---
>>  drivers/net/cxgbe/cxgbe_ethdev.c | 6 +++++-
>>  1 file changed, 5 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/net/cxgbe/cxgbe_ethdev.c b/drivers/net/cxgbe/cxgb=
e_ethdev.c
>> index b622d25..b0d5ed7 100644
>> --- a/drivers/net/cxgbe/cxgbe_ethdev.c
>> +++ b/drivers/net/cxgbe/cxgbe_ethdev.c
>> @@ -175,7 +175,11 @@ static void cxgbe_dev_info_get(struct rte_eth_dev=
 *eth_dev,
>>
>>  	device_info->rx_desc_lim =3D cxgbe_desc_lim;
>>  	device_info->tx_desc_lim =3D cxgbe_desc_lim;
>> -	device_info->speed_capa =3D ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G;=

>> +	if (CHELSIO_CHIP_VERSION(adapter->params.chip) =3D=3D CHELSIO_T6)
>> +		device_info->speed_capa =3D ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G=
 |
>> +			ETH_LINK_SPEED_100G;
>> +	else
>> +		device_info->speed_capa =3D ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G=
;
>>  }
>
> I think the following code is simpler and shows intent clearer?
> No objection to the patch above from me, just a suggestion :)
>
>
> device_info->speed_capa =3D ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G;
>
> if (CHELSIO_CHIP_VERSION(adapter->params.chip) =3D=3D CHELSIO_T6)
> 	device_info->speed_capa |=3D ETH_LINK_SPEED_100G;

Yes, that looks better :). I will send a v3.