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Tue, 27 May 2014 16:00:02 +0800 From: "Ming, LiX" To: "Wu, Jingjing" , "dev@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH v2 3/4]ixgbe: add ixgbe NIC filters of generic filter feature Thread-Index: AQHPdvDVH2PVpzb+YkK9DsnhphY+bptUFVdQ Date: Tue, 27 May 2014 08:00:00 +0000 Message-ID: <0976FC66838DDE4585886952506C9436FBA63C@SHSMSX104.ccr.corp.intel.com> References: <1400895442-32433-1-git-send-email-jingjing.wu@intel.com> <1400895442-32433-4-git-send-email-jingjing.wu@intel.com> In-Reply-To: <1400895442-32433-4-git-send-email-jingjing.wu@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-cr-hashedpuzzle: APv2 CSxk EE/F EQ9t Ep3x E/OQ Fodz G7FJ HXZz Ib8B JVUn JrA5 LlD5 LvER Mh8+ MoxG; 1; ZABlAHYAQABkAHAAZABrAC4AbwByAGcA; Sosha1_v1; 7; {75E2A513-9348-40D8-A06C-8499C9E6E040}; bABpAHgALgBtAGkAbgBnAEAAaQBuAHQAZQBsAC4AYwBvAG0A; Tue, 27 May 2014 07:59:58 GMT; UgBFADoAIABbAGQAcABkAGsALQBkAGUAdgBdACAAWwBQAEEAVABDAEgAIAB2ADIAIAAzAC8ANABdAGkAeABnAGIAZQA6ACAAYQBkAGQAIABpAHgAZwBiAGUAIABOAEkAQwAgAGYAaQBsAHQAZQByAHMAIABvAGYAIABnAGUAbgBlAHIAaQBjAAkAZgBpAGwAdABlAHIAIABmAGUAYQB0AHUAcgBlAA== x-cr-puzzleid: {75E2A513-9348-40D8-A06C-8499C9E6E040} x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2 3/4]ixgbe: add ixgbe NIC filters of generic filter feature X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 27 May 2014 08:00:20 -0000 This patch adds following ixgbe NIC filters implement: syn filter, ethertype filter, 5tuple filter for intel NIC 82599 Signed-off-by: jingjing.wu --- lib/librte_pmd_ixgbe/ixgbe_ethdev.c | 409 ++++++++++++++++++++++++++++++++= ++++ lib/librte_pmd_ixgbe/ixgbe_ethdev.h | 33 +++ 2 files changed, 442 insertions(+) Test-by: lmingX lix,ming@intel.com Compile pass >>Compile OS: FC20 x86_64 >>Kernel version: 3.11.10-301 >>GCC version: 4.8.2 >>Server: Crownpass diff --git a/lib/librte_pmd_ixgbe/ixgbe_ethdev.c b/lib/librte_pmd_ixgbe/ixg= be_ethdev.c index c9b5fe4..340c7cb 100644 --- a/lib/librte_pmd_ixgbe/ixgbe_ethdev.c +++ b/lib/librte_pmd_ixgbe/ixgbe_ethdev.c @@ -39,6 +39,7 @@ #include #include #include +#include #include #include #include @@ -182,6 +183,23 @@ static int ixgbe_mirror_rule_set(struct rte_eth_dev *d= ev, static int ixgbe_mirror_rule_reset(struct rte_eth_dev *dev, uint8_t rule_id); =20 +static int ixgbe_set_syn_filter(struct rte_eth_dev *dev, + struct rte_syn_filter *filter, uint8_t rx_queue); +static int ixgbe_get_syn_filter(struct rte_eth_dev *dev, + struct rte_syn_filter *filter, uint8_t *rx_queue); +static int ixgbe_add_ethertype_filter(struct rte_eth_dev *dev, uint16_t in= dex, + struct rte_ethertype_filter *filter, uint8_t rx_queue); +static int ixgbe_remove_ethertype_filter(struct rte_eth_dev *dev, + uint16_t index); +static int ixgbe_get_ethertype_filter(struct rte_eth_dev *dev, uint16_t in= dex, + struct rte_ethertype_filter *filter, uint8_t *rx_queue); +static int ixgbe_add_5tuple_filter(struct rte_eth_dev *dev, uint16_t index= , + struct rte_5tuple_filter *filter, uint8_t rx_queue); +static int ixgbe_remove_5tuple_filter(struct rte_eth_dev *dev, + uint16_t index); +static int ixgbe_get_5tuple_filter(struct rte_eth_dev *dev, uint16_t index= , + struct rte_5tuple_filter *filter, uint8_t *rx_queue); + /* * Define VF Stats MACRO for Non "cleared on read" register */ @@ -301,6 +319,14 @@ static struct eth_dev_ops ixgbe_eth_dev_ops =3D { .bypass_ver_show =3D ixgbe_bypass_ver_show, .bypass_wd_reset =3D ixgbe_bypass_wd_reset, #endif /* RTE_NIC_BYPASS */ + .set_syn_filter =3D ixgbe_set_syn_filter, + .get_syn_filter =3D ixgbe_get_syn_filter, + .add_ethertype_filter =3D ixgbe_add_ethertype_filter, + .remove_ethertype_filter =3D ixgbe_remove_ethertype_filter, + .get_ethertype_filter =3D ixgbe_get_ethertype_filter, + .add_5tuple_filter =3D ixgbe_add_5tuple_filter, + .remove_5tuple_filter =3D ixgbe_remove_5tuple_filter, + .get_5tuple_filter =3D ixgbe_get_5tuple_filter, }; =20 /* @@ -3062,6 +3088,389 @@ ixgbe_mirror_rule_reset(struct rte_eth_dev *dev, ui= nt8_t rule_id) return 0; } =20 +/* + * set the syn filter + * + * @param + * dev: Pointer to struct rte_eth_dev. + * syn: 1 means enable, 0 means disable. + * rx_queue: the queue id the filter assigned to + * + * @return + * - On success, zero. + * - On failure, a negative value. + */ +static int +ixgbe_set_syn_filter(struct rte_eth_dev *dev, + struct rte_syn_filter *filter, uint8_t rx_queue) +{ + struct ixgbe_hw *hw =3D IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); + uint32_t synqf; + + if (hw->mac.type !=3D ixgbe_mac_82599EB) + return -ENOSYS; + + if (rx_queue >=3D IXGBE_MAX_RX_QUEUE_NUM) + return (-EINVAL); + + synqf =3D IXGBE_READ_REG(hw, IXGBE_SYNQF); + + if (filter->enable) + synqf =3D (uint32_t)(((rx_queue << IXGBE_SYN_FILTER_QUEUE_SHIFT) & + IXGBE_SYN_FILTER_QUEUE) | IXGBE_SYN_FILTER_ENABLE); + else + synqf &=3D ~(IXGBE_SYN_FILTER_QUEUE | IXGBE_SYN_FILTER_ENABLE); + + if (filter->hig_pri) + synqf |=3D IXGBE_SYN_FILTER_SYNQFP; + else + synqf &=3D ~IXGBE_SYN_FILTER_SYNQFP; + + IXGBE_WRITE_REG(hw, IXGBE_SYNQF, synqf); + return 0; +} + +/* + * get the syn filter's info + * + * @param + * dev: Pointer to struct rte_eth_dev. + * *syn: pointer to syn value (1 means enable, 0 means disable). + * *rx_queue: pointer to the queue id the filter assigned to + * + * @return + * - On success, zero. + * - On failure, a negative value. + */ +static int +ixgbe_get_syn_filter(struct rte_eth_dev *dev, + struct rte_syn_filter *filter, uint8_t *rx_queue) + +{ + struct ixgbe_hw *hw =3D IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); + uint32_t synqf; + + if (hw->mac.type !=3D ixgbe_mac_82599EB) + return -ENOSYS; + + synqf =3D IXGBE_READ_REG(hw, IXGBE_SYNQF); + filter->enable =3D (synqf & IXGBE_SYN_FILTER_ENABLE) ? 1 : 0; + filter->hig_pri =3D (synqf & IXGBE_SYN_FILTER_SYNQFP) ? 1 : 0; + *rx_queue =3D (uint8_t)((synqf & IXGBE_SYN_FILTER_QUEUE) >> 1); + return 0; +} + +/* + * add an ethertype filter + * + * @param + * dev: Pointer to struct rte_eth_dev. + * index: the index the filter allocates + * filter: ponter to the filter that will be added + * rx_queue: the queue id the filter assigned to + * + * @return + * - On success, zero. + * - On failure, a negative value. + */ +static int +ixgbe_add_ethertype_filter(struct rte_eth_dev *dev, + uint16_t index, struct rte_ethertype_filter *filter, + uint8_t rx_queue) +{ + struct ixgbe_hw *hw =3D IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); + uint32_t etqf, etqs =3D 0; + + if (hw->mac.type !=3D ixgbe_mac_82599EB) + return -ENOSYS; + + if (index >=3D IXGBE_MAX_ETQF_FILTERS || + rx_queue >=3D IXGBE_MAX_RX_QUEUE_NUM) + return (-EINVAL); + + etqf =3D IXGBE_READ_REG(hw, IXGBE_ETQF(index)); + if (etqf & IXGBE_ETQF_FILTER_EN) + return (-EINVAL); /** filter index is in use*/ + + etqf =3D 0; + etqf |=3D IXGBE_ETQF_FILTER_EN; + etqf |=3D (uint32_t)filter->ethertype; + + if (filter->priority_en) { + if (filter->priority > IXGBE_ETQF_MAX_PRI) + return (-EINVAL); + etqf |=3D (uint32_t)((filter->priority << IXGBE_ETQF_SHIFT) & IXGBE_ETQF= _UP); + etqf |=3D IXGBE_ETQF_UP_EN; + } + etqs |=3D (uint32_t)((rx_queue << IXGBE_ETQS_RX_QUEUE_SHIFT) & IXGBE_ETQS= _RX_QUEUE); + etqs |=3D IXGBE_ETQS_QUEUE_EN; + + IXGBE_WRITE_REG(hw, IXGBE_ETQF(index), etqf); + IXGBE_WRITE_REG(hw, IXGBE_ETQS(index), etqs); + return 0; +} + +/* + * remove an ethertype filter + * + * @param + * dev: Pointer to struct rte_eth_dev. + * index: the index the filter allocates + * + * @return + * - On success, zero. + * - On failure, a negative value. + */ +static int +ixgbe_remove_ethertype_filter(struct rte_eth_dev *dev, + uint16_t index) +{ + struct ixgbe_hw *hw =3D IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); + + if (hw->mac.type !=3D ixgbe_mac_82599EB) + return -ENOSYS; + + if (index >=3D IXGBE_MAX_ETQF_FILTERS) + return (-EINVAL); + + IXGBE_WRITE_REG(hw, IXGBE_ETQF(index), 0); + IXGBE_WRITE_REG(hw, IXGBE_ETQS(index), 0); + + return 0; +} + +/* + * gets an ethertype filter + * + * @param + * dev: Pointer to struct rte_eth_dev. + * index: the index the filter allocates + * filter: ponter to the filter that will be gotten + * *rx_queue: the ponited of the queue id the filter assigned to + * + * @return + * - On success, zero. + * - On failure, a negative value. + */ +static int +ixgbe_get_ethertype_filter(struct rte_eth_dev *dev, + uint16_t index, struct rte_ethertype_filter *filter, + uint8_t *rx_queue) +{ + struct ixgbe_hw *hw =3D IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); + uint32_t etqf, etqs; + + if (hw->mac.type !=3D ixgbe_mac_82599EB) + return -ENOSYS; + + if (index >=3D IXGBE_MAX_ETQF_FILTERS) + return (-EINVAL); + + etqf =3D IXGBE_READ_REG(hw, IXGBE_ETQF(index)); + etqs =3D IXGBE_READ_REG(hw, IXGBE_ETQS(index)); + if (etqf & IXGBE_ETQF_FILTER_EN) { + filter->ethertype =3D etqf & IXGBE_ETQF_ETHERTYPE; + filter->priority_en =3D (etqf & IXGBE_ETQF_UP_EN) ? 1 : 0; + if (filter->priority_en) + filter->priority =3D (etqf & IXGBE_ETQF_UP) >> 16; + *rx_queue =3D (etqs & IXGBE_ETQS_RX_QUEUE) >> IXGBE_ETQS_RX_QUEUE_SHIFT; + return 0; + } + return (-ENOENT); +} + +static inline enum ixgbe_5tuple_protocol +convert_protocol_type(uint8_t protocol_value) +{ + if (protocol_value =3D=3D IPPROTO_TCP) + return IXGBE_FILTER_PROTOCOL_TCP; + else if (protocol_value =3D=3D IPPROTO_UDP) + return IXGBE_FILTER_PROTOCOL_UDP; + else if (protocol_value =3D=3D IPPROTO_SCTP) + return IXGBE_FILTER_PROTOCOL_SCTP; + else + return IXGBE_FILTER_PROTOCOL_NONE; +} + +static inline uint8_t +revert_protocol_type(enum ixgbe_5tuple_protocol protocol) +{ + if (protocol =3D=3D IXGBE_FILTER_PROTOCOL_TCP) + return IPPROTO_TCP; + else if (protocol =3D=3D IXGBE_FILTER_PROTOCOL_UDP) + return IPPROTO_UDP; + else if (protocol =3D=3D IXGBE_FILTER_PROTOCOL_SCTP) + return IPPROTO_SCTP; + else + return 0; +} + +/* + * add a 5tuple filter + * + * @param + * dev: Pointer to struct rte_eth_dev. + * index: the index the filter allocates + * filter: ponter to the filter that will be added + * rx_queue: the queue id the filter assigned to + * + * @return + * - On success, zero. + * - On failure, a negative value. + */ +static int +ixgbe_add_5tuple_filter(struct rte_eth_dev *dev, uint16_t index, + struct rte_5tuple_filter *filter, uint8_t rx_queue) +{ + struct ixgbe_hw *hw =3D IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); + uint32_t ftqf, sdpqf =3D 0; + uint32_t l34timir =3D 0; + uint8_t mask =3D 0xff; + + if (hw->mac.type !=3D ixgbe_mac_82599EB) + return -ENOSYS; + + if (index >=3D IXGBE_MAX_FTQF_FILTERS || + rx_queue >=3D IXGBE_MAX_RX_QUEUE_NUM || + filter->priority > IXGBE_5TUPLE_MAX_PRI || + filter->priority < IXGBE_5TUPLE_MIN_PRI) + return (-EINVAL); /** filter index is out of range*/ + + if (filter->tcp_flags) { + PMD_INIT_LOG(INFO, "82599EB not tcp flags in 5tuple"); + return (-EINVAL); + } + + ftqf =3D IXGBE_READ_REG(hw, IXGBE_FTQF(index)); + if (ftqf & IXGBE_FTQF_QUEUE_ENABLE) + return (-EINVAL); /** filter index is in use*/ + + ftqf =3D 0; + sdpqf =3D (uint32_t)(filter->dst_port << IXGBE_SDPQF_DSTPORT_SHIFT); + sdpqf =3D sdpqf | (filter->src_port & IXGBE_SDPQF_SRCPORT); + + ftqf |=3D (uint32_t)(convert_protocol_type(filter->protocol) & + IXGBE_FTQF_PROTOCOL_MASK); + ftqf |=3D (uint32_t)((filter->priority & IXGBE_FTQF_PRIORITY_MASK) << + IXGBE_FTQF_PRIORITY_SHIFT); + if (filter->src_ip_mask =3D=3D 0) /** 0 means compare*/ + mask &=3D IXGBE_FTQF_SOURCE_ADDR_MASK; + if (filter->dst_ip_mask =3D=3D 0) + mask &=3D IXGBE_FTQF_DEST_ADDR_MASK; + if (filter->src_port_mask =3D=3D 0) + mask &=3D IXGBE_FTQF_SOURCE_PORT_MASK; + if (filter->dst_port_mask =3D=3D 0) + mask &=3D IXGBE_FTQF_DEST_PORT_MASK; + if (filter->protocol_mask =3D=3D 0) + mask &=3D IXGBE_FTQF_PROTOCOL_COMP_MASK; + ftqf |=3D mask << IXGBE_FTQF_5TUPLE_MASK_SHIFT; + ftqf |=3D IXGBE_FTQF_POOL_MASK_EN; + ftqf |=3D IXGBE_FTQF_QUEUE_ENABLE; + + IXGBE_WRITE_REG(hw, IXGBE_DAQF(index), filter->dst_ip); + IXGBE_WRITE_REG(hw, IXGBE_SAQF(index), filter->src_ip); + IXGBE_WRITE_REG(hw, IXGBE_SDPQF(index), sdpqf); + IXGBE_WRITE_REG(hw, IXGBE_FTQF(index), ftqf); + + l34timir |=3D IXGBE_L34T_IMIR_RESERVE; + l34timir |=3D (uint32_t)(rx_queue << IXGBE_L34T_IMIR_QUEUE_SHIFT); + IXGBE_WRITE_REG(hw, IXGBE_L34T_IMIR(index), l34timir); + return 0; +} + +/* + * remove a 5tuple filter + * + * @param + * dev: Pointer to struct rte_eth_dev. + * index: the index the filter allocates + * + * @return + * - On success, zero. + * - On failure, a negative value. + */ +static int +ixgbe_remove_5tuple_filter(struct rte_eth_dev *dev, + uint16_t index) +{ + struct ixgbe_hw *hw =3D IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); + + if (hw->mac.type !=3D ixgbe_mac_82599EB) + return -ENOSYS; + + if (index >=3D IXGBE_MAX_FTQF_FILTERS) + return (-EINVAL); /** filter index is out of range*/ + + IXGBE_WRITE_REG(hw, IXGBE_DAQF(index), 0); + IXGBE_WRITE_REG(hw, IXGBE_SAQF(index), 0); + IXGBE_WRITE_REG(hw, IXGBE_SDPQF(index), 0); + IXGBE_WRITE_REG(hw, IXGBE_FTQF(index), 0); + IXGBE_WRITE_REG(hw, IXGBE_L34T_IMIR(index), 0); + return 0; +} + +/* + * get a 5tuple filter + * + * @param + * dev: Pointer to struct rte_eth_dev. + * index: the index the filter allocates + * filter: ponter to the filter that returns + * *rx_queue: pointer of the queue id the filter assigned to + * + * @return + * - On success, zero. + * - On failure, a negative value. + */ +static int +ixgbe_get_5tuple_filter(struct rte_eth_dev *dev, uint16_t index, + struct rte_5tuple_filter *filter, uint8_t *rx_queue) +{ + struct ixgbe_hw *hw =3D IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); + uint32_t sdpqf, ftqf, l34timir; + uint8_t mask; + enum ixgbe_5tuple_protocol proto; + + if (hw->mac.type !=3D ixgbe_mac_82599EB) + return -ENOSYS; + + if (index >=3D IXGBE_MAX_FTQF_FILTERS) + return (-EINVAL); /** filter index is out of range*/ + + ftqf =3D IXGBE_READ_REG(hw, IXGBE_FTQF(index)); + if (ftqf & IXGBE_FTQF_QUEUE_ENABLE) { + proto =3D (enum ixgbe_5tuple_protocol)(ftqf & IXGBE_FTQF_PROTOCOL_MASK); + filter->protocol =3D revert_protocol_type(proto); + filter->priority =3D (ftqf >> IXGBE_FTQF_PRIORITY_SHIFT) & + IXGBE_FTQF_PRIORITY_MASK; + mask =3D (uint8_t)((ftqf >> IXGBE_FTQF_5TUPLE_MASK_SHIFT) & + IXGBE_FTQF_5TUPLE_MASK_MASK); + filter->src_ip_mask =3D + (mask & IXGBE_FTQF_SOURCE_ADDR_MASK) ? 1 : 0; + filter->dst_ip_mask =3D + (mask & IXGBE_FTQF_DEST_ADDR_MASK) ? 1 : 0; + filter->src_port_mask =3D + (mask & IXGBE_FTQF_SOURCE_PORT_MASK) ? 1 : 0; + filter->dst_port_mask =3D + (mask & IXGBE_FTQF_DEST_PORT_MASK) ? 1 : 0; + filter->protocol_mask =3D + (mask & IXGBE_FTQF_PROTOCOL_COMP_MASK) ? 1 : 0; + + sdpqf =3D IXGBE_READ_REG(hw, IXGBE_SDPQF(index)); + filter->dst_port =3D (sdpqf & IXGBE_SDPQF_DSTPORT) >> + IXGBE_SDPQF_DSTPORT_SHIFT; + filter->src_port =3D sdpqf & IXGBE_SDPQF_SRCPORT; + filter->dst_ip =3D IXGBE_READ_REG(hw, IXGBE_DAQF(index)); + filter->src_ip =3D IXGBE_READ_REG(hw, IXGBE_SAQF(index)); + + l34timir =3D IXGBE_READ_REG(hw, IXGBE_L34T_IMIR(index)); + *rx_queue =3D (l34timir & IXGBE_L34T_IMIR_QUEUE) >> + IXGBE_L34T_IMIR_QUEUE_SHIFT; + return 0; + } + return (-ENOENT); +} + static struct rte_driver rte_ixgbe_driver =3D { .type =3D PMD_PDEV, .init =3D rte_ixgbe_pmd_init, diff --git a/lib/librte_pmd_ixgbe/ixgbe_ethdev.h b/lib/librte_pmd_ixgbe/ixg= be_ethdev.h index 9d7e93f..c5c2845 100644 --- a/lib/librte_pmd_ixgbe/ixgbe_ethdev.h +++ b/lib/librte_pmd_ixgbe/ixgbe_ethdev.h @@ -67,6 +67,29 @@ #define IXGBE_LPBK_82599_NONE 0x0 /* Default value. Loopback is disabled.= */ #define IXGBE_LPBK_82599_TX_RX 0x1 /* Tx->Rx loopback operation is enable= d. */ =20 +#define IXGBE_SYN_FILTER_ENABLE 0x00000001 /** syn filter enable f= ield*/ +#define IXGBE_SYN_FILTER_QUEUE 0x000000FE /** syn filter queue fi= eld*/ +#define IXGBE_SYN_FILTER_QUEUE_SHIFT 1 /** syn filter queue fiel= d shift*/ +#define IXGBE_SYN_FILTER_SYNQFP 0x80000000 /**syn filter SYNQFP*/ + +#define IXGBE_ETQF_UP 0x00070000 /** ethertype filter pr= iority field*/ +#define IXGBE_ETQF_SHIFT 16 +#define IXGBE_ETQF_UP_EN 0x00080000 +#define IXGBE_ETQF_ETHERTYPE 0x0000FFFF /** ethertype filter et= hertype field*/ +#define IXGBE_ETQF_MAX_PRI 7 + +#define IXGBE_SDPQF_DSTPORT 0xFFFF0000 /** dst port field */ +#define IXGBE_SDPQF_DSTPORT_SHIFT 16 /** dst port field shift*/ +#define IXGBE_SDPQF_SRCPORT 0x0000FFFF /** src port field */ + +#define IXGBE_L34T_IMIR_SIZE_BP 0x00001000 +#define IXGBE_L34T_IMIR_RESERVE 0x00080000 /** bit 13 to 19 must b= e set to 1000000b*/ +#define IXGBE_L34T_IMIR_LLI 0x00100000 +#define IXGBE_L34T_IMIR_QUEUE 0x0FE00000 +#define IXGBE_L34T_IMIR_QUEUE_SHIFT 21 +#define IXGBE_5TUPLE_MAX_PRI 7 +#define IXGBE_5TUPLE_MIN_PRI 1 + /* * Information about the fdir mode. */ @@ -150,6 +173,16 @@ struct ixgbe_adapter { #endif /* RTE_NIC_BYPASS */ }; =20 +/* + * Possible l4type of 5tuple filters. + */ +enum ixgbe_5tuple_protocol { + IXGBE_FILTER_PROTOCOL_TCP =3D 0, + IXGBE_FILTER_PROTOCOL_UDP, + IXGBE_FILTER_PROTOCOL_SCTP, + IXGBE_FILTER_PROTOCOL_NONE, +}; + #define IXGBE_DEV_PRIVATE_TO_HW(adapter)\ (&((struct ixgbe_adapter *)adapter)->hw) =20 --=20 1.8.1.4