From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id CB9C61B3A5 for ; Mon, 17 Dec 2018 13:16:34 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 17 Dec 2018 04:16:28 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,365,1539673200"; d="scan'208";a="260107406" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by orsmga004.jf.intel.com with ESMTP; 17 Dec 2018 04:16:27 -0800 Received: from fmsmsx155.amr.corp.intel.com (10.18.116.71) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.408.0; Mon, 17 Dec 2018 04:16:27 -0800 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by FMSMSX155.amr.corp.intel.com (10.18.116.71) with Microsoft SMTP Server (TLS) id 14.3.408.0; Mon, 17 Dec 2018 04:16:27 -0800 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.203]) by SHSMSX103.ccr.corp.intel.com ([169.254.4.59]) with mapi id 14.03.0415.000; Mon, 17 Dec 2018 20:16:25 +0800 From: "Xu, Rosen" To: "Pattan, Reshma" , "dev@dpdk.org" CC: "Lu, Wenzhuo" , "Wu, Jingjing" , "Iremonger, Bernard" , "Yigit, Ferruh" Thread-Topic: [dpdk-dev] [PATCH v2] app/test-pmd: add IFPGA AFU register read/write access for testpmd Thread-Index: AQHUk9O3wLvRZKZm5E2KKSZj3f7mWaWC3IcA Date: Mon, 17 Dec 2018 12:16:24 +0000 Message-ID: <0E78D399C70DA940A335608C6ED296D73A444134@SHSMSX104.ccr.corp.intel.com> References: <1544098591-157631-1-git-send-email-rosen.xu@intel.com> <1544750062-80485-1-git-send-email-rosen.xu@intel.com> <3AEA2BF9852C6F48A459DA490692831F2A3EAC16@irsmsx110.ger.corp.intel.com> In-Reply-To: <3AEA2BF9852C6F48A459DA490692831F2A3EAC16@irsmsx110.ger.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMDUxZWVlZDUtYjc0YS00MGUyLWE1ZjUtZDJhMmM1NGY0ZjA0IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiQ3RvN2F6RmRBWWhlRUpDZ21FVkZTUkJFdlhIMTBRVjR4Z1g1ckgxbExiSEZBcHJkeXNCWlQ1czhSa3JzT1VSZCJ9 x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2] app/test-pmd: add IFPGA AFU register read/write access for testpmd X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 17 Dec 2018 12:16:35 -0000 Hi, > -----Original Message----- > From: Pattan, Reshma > Sent: Saturday, December 15, 2018 1:38 > To: Xu, Rosen ; dev@dpdk.org > Cc: Lu, Wenzhuo ; Wu, Jingjing > ; Iremonger, Bernard > ; Xu, Rosen ; Yigit, > Ferruh > Subject: RE: [dpdk-dev] [PATCH v2] app/test-pmd: add IFPGA AFU register > read/write access for testpmd >=20 > Hi, >=20 > > -----Original Message----- > > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Rosen Xu > > Sent: Friday, December 14, 2018 1:14 AM > > To: dev@dpdk.org > > Cc: Lu, Wenzhuo ; Wu, Jingjing > > ; Iremonger, Bernard > > ; Xu, Rosen ; Yigit, > > Ferruh > > Subject: [dpdk-dev] [PATCH v2] app/test-pmd: add IFPGA AFU register > > read/write access for testpmd > > > > Currently register read/write of testpmd is only for PCI device, but > > more and more IFPGA based AFU devices need this feature to access > > registers, this patch will add support for it. > > > > Signed-off-by: Rosen Xu > > - pci_len =3D pci_dev->mem_resource[0].len; > > - if (reg_off >=3D pci_len) { > > + if (reg_off >=3D len) { > > printf("Port %d: register offset %u (0x%X) out of port PCI " >=20 > Here log message mentions only PCI not ifpga device. Might need to edit t= he > log. I have fixed in revision V3. > > port_reg_bit_display(portid_t port_id, uint32_t reg_off, uint8_t bit_x)= { > > uint32_t reg_v; > > - > > + const struct rte_bus *bus; > > > > if (port_id_is_invalid(port_id, ENABLED_WARN)) > > return; > > @@ -935,7 +940,16 @@ void print_valid_ports(void) > > return; > > if (reg_bit_pos_is_invalid(bit_x)) > > return; > > - reg_v =3D port_id_pci_reg_read(port_id, reg_off); > > + > > + bus =3D rte_bus_find_by_device(ports[port_id].dev_info.device); > > + if (bus && !strcmp(bus->name, "pci")) { > > + reg_v =3D port_id_pci_reg_read(port_id, reg_off); > > + } else if (bus && !strcmp(bus->name, "ifpga")) { > > + reg_v =3D port_id_afu_reg_read(port_id, reg_off); > > + } else { > > + printf("Not a PCI or AFU device\n"); > > + return; > > + } >=20 > Here and in other places for reg_read , we have similar code i.e. findin= g the > device , checking its type, if ifpga call ifpga function else call pci fu= nctions. > Can this common code be moved to new function say pci_read_reg like > port_reg_set() which we have already. > Also , again inside respective pci/ifpga reg read/write we are checking f= or pci > type. So can all this be simplified, to remove redundant code. PCI device and AFU device belongs to different bus, if we merge the registe= r access code to same function, it's not clarify. =20 > Thanks, > Reshma >=20