From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id 7A8EF1B138 for ; Wed, 2 Jan 2019 07:20:30 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Jan 2019 22:20:29 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,429,1539673200"; d="scan'208";a="306763612" Received: from fmsmsx103.amr.corp.intel.com ([10.18.124.201]) by fmsmga006.fm.intel.com with ESMTP; 01 Jan 2019 22:20:29 -0800 Received: from fmsmsx152.amr.corp.intel.com (10.18.125.5) by FMSMSX103.amr.corp.intel.com (10.18.124.201) with Microsoft SMTP Server (TLS) id 14.3.408.0; Tue, 1 Jan 2019 22:20:29 -0800 Received: from shsmsx154.ccr.corp.intel.com (10.239.6.54) by FMSMSX152.amr.corp.intel.com (10.18.125.5) with Microsoft SMTP Server (TLS) id 14.3.408.0; Tue, 1 Jan 2019 22:20:28 -0800 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.45]) by SHSMSX154.ccr.corp.intel.com ([169.254.7.46]) with mapi id 14.03.0415.000; Wed, 2 Jan 2019 14:20:26 +0800 From: "Xu, Rosen" To: "Yigit, Ferruh" , "Iremonger, Bernard" , "dev@dpdk.org" CC: "Lu, Wenzhuo" , "Wu, Jingjing" Thread-Topic: [PATCH v5] app/testpmd: add IFPGA AFU register access function Thread-Index: AQHUlsU1yu4TE8jKyUSJm6D+35ibCaWERs2AgAKJ8ACAAKSoEP//teeAgBRtU9A= Date: Wed, 2 Jan 2019 06:20:25 +0000 Message-ID: <0E78D399C70DA940A335608C6ED296D73A478BE9@SHSMSX104.ccr.corp.intel.com> References: <1544098591-157631-1-git-send-email-rosen.xu@intel.com> <1545132605-179951-1-git-send-email-rosen.xu@intel.com> <8CEF83825BEC744B83065625E567D7C260D3F363@IRSMSX108.ger.corp.intel.com> <8108c15a-9e48-3757-bc82-f65ebe7cbf21@intel.com> <0E78D399C70DA940A335608C6ED296D73A4576DF@SHSMSX104.ccr.corp.intel.com> <48bada7c-0063-a3bb-faf7-21a88e1c8a57@intel.com> In-Reply-To: <48bada7c-0063-a3bb-faf7-21a88e1c8a57@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMmUxOTFkYzYtZmMwOS00M2Y5LWI3MWMtZjhjMmNiYTViYjNhIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoid04wZWpKclpnOVhBNmxFeVI4djJZa1p4RW5nZkUzY2twbHBpOVdHYWhMUlV3NVJiZ21TK3p2VnpGMkxFQ3RYYSJ9 x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v5] app/testpmd: add IFPGA AFU register access function X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 02 Jan 2019 06:20:31 -0000 SGkgRmVycnVoLA0KDQpJIGhhdmUgYWRkZWQgTWFjcm8gdG8gaWRlbnRpZnkgdGhlIGRlcGVuZGVu Y3kgb2YgaWZwZ2EsIGFuZCBjaGVja2VkIGl0IG9rIGluIG15IHY2IHBhdGNoLg0KUGxzIHJldmll dywgdGhhbmtzIGEgbG90Lg0KDQo+IC0tLS0tT3JpZ2luYWwgTWVzc2FnZS0tLS0tDQo+IEZyb206 IFlpZ2l0LCBGZXJydWgNCj4gU2VudDogVGh1cnNkYXksIERlY2VtYmVyIDIwLCAyMDE4IDIyOjIz DQo+IFRvOiBYdSwgUm9zZW4gPHJvc2VuLnh1QGludGVsLmNvbT47IElyZW1vbmdlciwgQmVybmFy ZA0KPiA8YmVybmFyZC5pcmVtb25nZXJAaW50ZWwuY29tPjsgZGV2QGRwZGsub3JnDQo+IENjOiBM dSwgV2Vuemh1byA8d2Vuemh1by5sdUBpbnRlbC5jb20+OyBXdSwgSmluZ2ppbmcNCj4gPGppbmdq aW5nLnd1QGludGVsLmNvbT4NCj4gU3ViamVjdDogUmU6IFtQQVRDSCB2NV0gYXBwL3Rlc3RwbWQ6 IGFkZCBJRlBHQSBBRlUgcmVnaXN0ZXIgYWNjZXNzIGZ1bmN0aW9uDQo+IA0KPiBPbiAxMi8yMC8y MDE4IDEwOjQ4IEFNLCBYdSwgUm9zZW4gd3JvdGU6DQo+ID4gVGhhbmtzIGEgbG90IEZlcnJ1aC4N Cj4gDQo+IFNvcnJ5IGZvciB0aGUgY29uZnVzaW9uIFJvc2VuLCBJIGRyb3BwZWQgaXQgYmFjayBi ZWNhdXNlIG9mIHRoZSBkZXBlbmRlbmN5DQo+IGl0IGNyZWF0ZXMgdG8gaWZwZ2EsIGFuZCBhIHB1 dCBhIGNvbW1lbnQgdG8gdGhlIHBhdGNoLg0KPiANCj4gQWxzbyB0aGlzIGdpdmVzIG1lc29uIGJ1 aWxkIGVycm9yLCBmeWkuDQo+IA0KPiA+DQo+ID4+IC0tLS0tT3JpZ2luYWwgTWVzc2FnZS0tLS0t DQo+ID4+IEZyb206IFlpZ2l0LCBGZXJydWgNCj4gPj4gU2VudDogVGh1cnNkYXksIERlY2VtYmVy IDIwLCAyMDE4IDE2OjU5DQo+ID4+IFRvOiBJcmVtb25nZXIsIEJlcm5hcmQgPGJlcm5hcmQuaXJl bW9uZ2VyQGludGVsLmNvbT47IFh1LCBSb3Nlbg0KPiA+PiA8cm9zZW4ueHVAaW50ZWwuY29tPjsg ZGV2QGRwZGsub3JnDQo+ID4+IENjOiBMdSwgV2Vuemh1byA8d2Vuemh1by5sdUBpbnRlbC5jb20+ OyBXdSwgSmluZ2ppbmcNCj4gPj4gPGppbmdqaW5nLnd1QGludGVsLmNvbT4NCj4gPj4gU3ViamVj dDogUmU6IFtQQVRDSCB2NV0gYXBwL3Rlc3RwbWQ6IGFkZCBJRlBHQSBBRlUgcmVnaXN0ZXIgYWNj ZXNzDQo+ID4+IGZ1bmN0aW9uDQo+ID4+DQo+ID4+IE9uIDEyLzE4LzIwMTggNjoxMiBQTSwgSXJl bW9uZ2VyLCBCZXJuYXJkIHdyb3RlOg0KPiA+Pj4+IC0tLS0tT3JpZ2luYWwgTWVzc2FnZS0tLS0t DQo+ID4+Pj4gRnJvbTogWHUsIFJvc2VuDQo+ID4+Pj4gU2VudDogVHVlc2RheSwgRGVjZW1iZXIg MTgsIDIwMTggMTE6MzAgQU0NCj4gPj4+PiBUbzogZGV2QGRwZGsub3JnDQo+ID4+Pj4gQ2M6IEx1 LCBXZW56aHVvIDx3ZW56aHVvLmx1QGludGVsLmNvbT47IFd1LCBKaW5namluZw0KPiA+Pj4+IDxq aW5namluZy53dUBpbnRlbC5jb20+OyBJcmVtb25nZXIsIEJlcm5hcmQNCj4gPj4+PiA8YmVybmFy ZC5pcmVtb25nZXJAaW50ZWwuY29tPjsgWHUsIFJvc2VuIDxyb3Nlbi54dUBpbnRlbC5jb20+Ow0K PiA+Pj4+IFlpZ2l0LCBGZXJydWggPGZlcnJ1aC55aWdpdEBpbnRlbC5jb20+DQo+ID4+Pj4gU3Vi amVjdDogW1BBVENIIHY1XSBhcHAvdGVzdHBtZDogYWRkIElGUEdBIEFGVSByZWdpc3RlciBhY2Nl c3MNCj4gPj4+PiBmdW5jdGlvbg0KPiA+Pj4+DQo+ID4+Pj4gQ3VycmVudGx5IHJlZ2lzdGVyIHJl YWQvd3JpdGUgb2YgdGVzdHBtZCBpcyBvbmx5IGZvciBQQ0kgZGV2aWNlLA0KPiA+Pj4+IGJ1dCBt b3JlIGFuZCBtb3JlIElGUEdBIGJhc2VkIEFGVSBkZXZpY2VzIG5lZWQgdGhpcyBmZWF0dXJlIHRv DQo+ID4+Pj4gYWNjZXNzIHJlZ2lzdGVycywgdGhpcyBwYXRjaCB3aWxsIGFkZCBzdXBwb3J0IGZv ciBpdC4NCj4gPj4+Pg0KPiA+Pj4+IFNpZ25lZC1vZmYtYnk6IFJvc2VuIFh1IDxyb3Nlbi54dUBp bnRlbC5jb20+DQo+ID4+Pg0KPiA+Pj4gQWNrZWQtYnk6IEJlcm5hcmQgSXJlbW9uZ2VyIDxiZXJu YXJkLmlyZW1vbmdlckBpbnRlbC5jb20+DQo+ID4+Pg0KPiA+Pg0KPiA+PiBBcHBsaWVkIHRvIGRw ZGstbmV4dC1uZXQvbWFzdGVyLCB0aGFua3MuDQoNCg==