From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id DD18CA0487 for ; Mon, 1 Jul 2019 12:31:28 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 0A7013195; Mon, 1 Jul 2019 12:31:27 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id DCD27235; Mon, 1 Jul 2019 12:31:25 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Jul 2019 03:31:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,439,1557212400"; d="scan'208";a="157256260" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by orsmga008.jf.intel.com with ESMTP; 01 Jul 2019 03:31:24 -0700 Received: from fmsmsx126.amr.corp.intel.com (10.18.125.43) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.439.0; Mon, 1 Jul 2019 03:31:24 -0700 Received: from shsmsx105.ccr.corp.intel.com (10.239.4.158) by FMSMSX126.amr.corp.intel.com (10.18.125.43) with Microsoft SMTP Server (TLS) id 14.3.439.0; Mon, 1 Jul 2019 03:31:24 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.110]) by SHSMSX105.ccr.corp.intel.com ([169.254.11.232]) with mapi id 14.03.0439.000; Mon, 1 Jul 2019 18:31:22 +0800 From: "Xu, Rosen" To: "Zhang, Tianfei" , "dev@dpdk.org" , "Yigit, Ferruh" CC: "stable@dpdk.org" Thread-Topic: [PATCH v4 3/5] raw/ifpga_rawdev/base: fix bit fields definition Thread-Index: AQHVJ8wJ8q6V9Vzo9EK3XPMmmV3+g6a1oKBw Date: Mon, 1 Jul 2019 10:31:22 +0000 Message-ID: <0E78D399C70DA940A335608C6ED296D73A85CA1D@SHSMSX104.ccr.corp.intel.com> References: <20190621084017.6763-1-tianfei.zhang@intel.com> <20190621084017.6763-3-tianfei.zhang@intel.com> In-Reply-To: <20190621084017.6763-3-tianfei.zhang@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiZTQ4NGFlYjMtNmFmNS00MWNlLWI5MzQtNjE5ZTc2NmJlOGU5IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoicnJkNENyWkd4b0RYSldVWHJHSGJVdTFoc0N5VFwvYzVwdHh1RDRDRU9nSnd2MStsNENZWlUxNG93b1wvdTRidnBJIn0= x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v4 3/5] raw/ifpga_rawdev/base: fix bit fields definition X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Zhang, Tianfei > Sent: Friday, June 21, 2019 16:40 > To: dev@dpdk.org; Yigit, Ferruh > Cc: Xu, Rosen ; stable@dpdk.org; Zhang, Tianfei > > Subject: [PATCH v4 3/5] raw/ifpga_rawdev/base: fix bit fields definition >=20 > Fix CTRL_DEV_SELECT bit fields definition about eth_group devices. >=20 > Fixes: 8a256bef32 ("raw/ifpga/base: add eth group driver") > Cc: stable@dpdk.org >=20 > Signed-off-by: Tianfei zhang > Acked-by: Rosen Xu > --- > drivers/raw/ifpga_rawdev/base/opae_eth_group.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) >=20 > diff --git a/drivers/raw/ifpga_rawdev/base/opae_eth_group.h > b/drivers/raw/ifpga_rawdev/base/opae_eth_group.h > index 8d695cc8e..a66d77e27 100644 > --- a/drivers/raw/ifpga_rawdev/base/opae_eth_group.h > +++ b/drivers/raw/ifpga_rawdev/base/opae_eth_group.h > @@ -31,7 +31,7 @@ > #define CMD_NOP 0ULL > #define CMD_RD 1ULL > #define CMD_WR 2ULL > -#define CTRL_DEV_SELECT GENMASK_ULL(52, 49) > +#define CTRL_DEV_SELECT GENMASK_ULL(53, 49) > #define CTRL_DS_SHIFT 49 > #define CTRL_FEAT_SELECT BIT_ULL(48) > #define SELECT_IP 0 > -- > 2.17.1 Acked-by: Rosen Xu