From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id CC02DA0613 for ; Tue, 24 Sep 2019 10:59:58 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 93C972C60; Tue, 24 Sep 2019 10:59:57 +0200 (CEST) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by dpdk.org (Postfix) with ESMTP id A50B52C5E for ; Tue, 24 Sep 2019 10:59:56 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Sep 2019 01:59:55 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,543,1559545200"; d="scan'208";a="189306758" Received: from fmsmsx108.amr.corp.intel.com ([10.18.124.206]) by fmsmga007.fm.intel.com with ESMTP; 24 Sep 2019 01:59:55 -0700 Received: from fmsmsx112.amr.corp.intel.com (10.18.116.6) by FMSMSX108.amr.corp.intel.com (10.18.124.206) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 24 Sep 2019 01:59:54 -0700 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by FMSMSX112.amr.corp.intel.com (10.18.116.6) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 24 Sep 2019 01:59:54 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.32]) by SHSMSX103.ccr.corp.intel.com ([169.254.4.140]) with mapi id 14.03.0439.000; Tue, 24 Sep 2019 16:59:52 +0800 From: "Xu, Rosen" To: "Pei, Andy" , "dev@dpdk.org" CC: "Zhang, Qi Z" , "Yigit, Ferruh" , "Ye, Xiaolong" Thread-Topic: [PATCH v5] net/ipn3ke: setup MTU when HW init Thread-Index: AQHVYsU4cEIHFALtBEuiRkQxqCVi9ac6pynQ Date: Tue, 24 Sep 2019 08:59:51 +0000 Message-ID: <0E78D399C70DA940A335608C6ED296D73AA239DC@SHSMSX104.ccr.corp.intel.com> References: <1567500378-89175-1-git-send-email-andy.pei@intel.com> <1567561966-133157-1-git-send-email-andy.pei@intel.com> In-Reply-To: <1567561966-133157-1-git-send-email-andy.pei@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiZGRhZDY0NDgtMDA1Mi00MWI0LTlkMzMtODBmYjdlODU5NDkwIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiVEJSMjlZbWJ0bGFcL01lVGhPVHZ3Q0FYcFRvVDlxeGpDNkJWakIrVGFtMWxoQVdzWitJbW91SG81WHp2K21Ic28ifQ== x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v5] net/ipn3ke: setup MTU when HW init X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi, > -----Original Message----- > From: Pei, Andy > Sent: Wednesday, September 04, 2019 2:53 > To: dev@dpdk.org > Cc: Pei, Andy ; Zhang, Qi Z ; > Yigit, Ferruh ; Xu, Rosen ; Y= e, > Xiaolong > Subject: [PATCH v5] net/ipn3ke: setup MTU when HW init >=20 > set up mtu to the minimun in tx mtu, rx mtu and > IPN3KE_MAC_FRAME_SIZE_MAX. >=20 > Signed-off-by: Andy Pei > --- >=20 > Cc: qi.z.zhang@intel.com > Cc: ferruh.yigit@intel.com > Cc: rosen.xu@intel.com > Cc: xiaolong.ye@intel.com >=20 > v2: > modify low bound and upper bound. >=20 > v3: > delete unnecessary MACROs. > extract the duplicated code to a common function. >=20 > v4: > delete unnecessary MACROs. > extract the duplicated code to a common function. >=20 > v5: > Not to start the arguments in a separate line. >=20 > drivers/net/ipn3ke/ipn3ke_ethdev.c | 86 > ++++++++++++++++++++++++++++++++++++++ > drivers/net/ipn3ke/ipn3ke_ethdev.h | 6 +++ > 2 files changed, 92 insertions(+) >=20 > diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.c > b/drivers/net/ipn3ke/ipn3ke_ethdev.c > index c226d63..28d8aaf 100644 > --- a/drivers/net/ipn3ke/ipn3ke_ethdev.c > +++ b/drivers/net/ipn3ke/ipn3ke_ethdev.c > @@ -209,6 +209,89 @@ > return 0; > } >=20 > +static uint32_t > +ipn3ke_mtu_cal(uint32_t tx, uint32_t rx) { > + uint32_t tmp; > + tmp =3D RTE_MIN(tx, rx); > + tmp =3D RTE_MAX(tmp, (uint32_t)RTE_ETHER_MIN_MTU); > + tmp =3D RTE_MIN(tmp, (uint32_t)(IPN3KE_MAC_FRAME_SIZE_MAX - > + IPN3KE_ETH_OVERHEAD)); > + return tmp; > +} > + > +static void > +ipn3ke_mtu_set(struct ipn3ke_hw *hw, uint32_t mac_num, > + uint32_t eth_group_sel, uint32_t txaddr, uint32_t rxaddr) { > + uint32_t tx; > + uint32_t rx; > + uint32_t tmp; > + > + if (!(*hw->f_mac_read) || !(*hw->f_mac_write)) > + return; > + > + (*hw->f_mac_read)(hw, > + &tx, > + txaddr, > + mac_num, > + eth_group_sel); > + > + (*hw->f_mac_read)(hw, > + &rx, > + rxaddr, > + mac_num, > + eth_group_sel); > + > + tmp =3D ipn3ke_mtu_cal(tx, rx); > + > + (*hw->f_mac_write)(hw, > + tmp, > + txaddr, > + mac_num, > + eth_group_sel); > + > + (*hw->f_mac_write)(hw, > + tmp, > + rxaddr, > + mac_num, > + eth_group_sel); > +} > + > +static void > +ipn3ke_10G_mtu_setup(struct ipn3ke_hw *hw, uint32_t mac_num, > + uint32_t eth_group_sel) > +{ > + ipn3ke_mtu_set(hw, mac_num, eth_group_sel, > + IPN3KE_10G_TX_FRAME_MAXLENGTH, > IPN3KE_10G_RX_FRAME_MAXLENGTH); } > + > +static void > +ipn3ke_25G_mtu_setup(struct ipn3ke_hw *hw, uint32_t mac_num, > + uint32_t eth_group_sel) > +{ > + ipn3ke_mtu_set(hw, mac_num, eth_group_sel, > + IPN3KE_25G_MAX_TX_SIZE_CONFIG, > IPN3KE_25G_MAX_RX_SIZE_CONFIG); } > + > +static void > +ipn3ke_mtu_setup(struct ipn3ke_hw *hw) > +{ > + int i; > + if (hw->retimer.mac_type =3D=3D > IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) { > + for (i =3D 0; i < hw->port_num; i++) { > + ipn3ke_10G_mtu_setup(hw, i, 0); > + ipn3ke_10G_mtu_setup(hw, i, 1); > + } > + } else if (hw->retimer.mac_type =3D=3D > + > IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) { > + for (i =3D 0; i < hw->port_num; i++) { > + ipn3ke_25G_mtu_setup(hw, i, 0); > + ipn3ke_25G_mtu_setup(hw, i, 1); > + } > + } > +} > + > static int > ipn3ke_hw_init(struct rte_afu_device *afu_dev, > struct ipn3ke_hw *hw) > @@ -303,6 +386,9 @@ > } > } >=20 > + /* init mtu */ > + ipn3ke_mtu_setup(hw); > + > ret =3D rte_eth_switch_domain_alloc(&hw->switch_domain_id); > if (ret) > IPN3KE_AFU_PMD_WARN("failed to allocate switch domain > for device %d", diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.h > b/drivers/net/ipn3ke/ipn3ke_ethdev.h > index c7b336b..fc45826 100644 > --- a/drivers/net/ipn3ke/ipn3ke_ethdev.h > +++ b/drivers/net/ipn3ke/ipn3ke_ethdev.h > @@ -654,6 +654,12 @@ static inline void _ipn3ke_indrct_write(struct > ipn3ke_hw *hw, #define IPN3KE_MAC_RX_FRAME_MAXLENGTH_MASK \ > IPN3KE_MASK(0xFFFF, > IPN3KE_MAC_RX_FRAME_MAXLENGTH_SHIFT) >=20 > +#define IPN3KE_25G_MAX_TX_SIZE_CONFIG 0x4= 07 > +#define IPN3KE_25G_MAX_RX_SIZE_CONFIG 0x5= 06 > + > +#define IPN3KE_10G_TX_FRAME_MAXLENGTH 0x0= 02C > +#define IPN3KE_10G_RX_FRAME_MAXLENGTH 0x0= 0AE > + > #define IPN3KE_REGISTER_WIDTH 32 >=20 > /*Bits[2:0]: Configuration of TX statistics counters: > -- > 1.8.3.1 Acked-by: Rosen Xu