From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 58CA9A0524; Fri, 7 May 2021 18:48:58 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3C0EF4013F; Fri, 7 May 2021 18:48:58 +0200 (CEST) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mails.dpdk.org (Postfix) with ESMTP id 620CA40040 for ; Fri, 7 May 2021 18:48:56 +0200 (CEST) IronPort-SDR: THdoLN6b0AraBkDKjFePvw/EIAkklq2DL/A1G8/HyO76CRlONNRHXgBMemXr3k/5y25jfVd6Qr V19rQ8iYszJg== X-IronPort-AV: E=McAfee;i="6200,9189,9977"; a="284224446" X-IronPort-AV: E=Sophos;i="5.82,281,1613462400"; d="scan'208";a="284224446" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 May 2021 09:48:54 -0700 IronPort-SDR: WLRE/jnQ3TTUxZg0SR7zGLMrcYXe3IHAFqp/ysFCdFlT4ENh6jm4lRNxBnt/xPXKEEr2cyKm1b PGWCcsL8hNYA== X-IronPort-AV: E=Sophos;i="5.82,281,1613462400"; d="scan'208";a="431442854" Received: from fyigit-mobl1.ger.corp.intel.com (HELO [10.213.210.230]) ([10.213.210.230]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 May 2021 09:48:52 -0700 To: Michal Krawczyk , dev@dpdk.org Cc: ndagan@amazon.com, gtzalik@amazon.com, igorch@amazon.com, upstream@semihalf.com, Stanislaw Kardach , Shay Agroskin References: <20210505073348.6394-1-mk@semihalf.com> <20210506142526.28245-1-mk@semihalf.com> <20210506142526.28245-18-mk@semihalf.com> From: Ferruh Yigit X-User: ferruhy Message-ID: <0acf6ac4-aa08-6f33-75a4-90c76745c97a@intel.com> Date: Fri, 7 May 2021 17:48:50 +0100 MIME-Version: 1.0 In-Reply-To: <20210506142526.28245-18-mk@semihalf.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-dev] [PATCH v3 17/22] net/ena: support SMP for mz alloc counter X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 5/6/2021 3:25 PM, Michal Krawczyk wrote: > From: Stanislaw Kardach > > Introduce a memory area for ENA driver shared between all the processes > of a same prefix (memzone backed). > Move the memzone allocation counter for ENA_MEM_ALLOC_COHERENT there so > that all processes may utilize it. Device private data is already shared between primary/secondary processes, why not using it, it is already there. Next patch sharing RSS key using this shared area, can you device private data so all devices can access it. > > Signed-off-by: Stanislaw Kardach > Reviewed-by: Michal Krawczyk > Reviewed-by: Igor Chauskin > Reviewed-by: Shay Agroskin > --- > drivers/net/ena/base/ena_plat_dpdk.h | 6 ++-- > drivers/net/ena/ena_ethdev.c | 46 +++++++++++++++++++++++++++- > drivers/net/ena/ena_ethdev.h | 8 +++++ > 3 files changed, 56 insertions(+), 4 deletions(-) > > diff --git a/drivers/net/ena/base/ena_plat_dpdk.h b/drivers/net/ena/base/ena_plat_dpdk.h > index 1d0454bebe..e17970361a 100644 > --- a/drivers/net/ena/base/ena_plat_dpdk.h > +++ b/drivers/net/ena/base/ena_plat_dpdk.h > @@ -209,7 +209,7 @@ typedef struct { > * Each rte_memzone should have unique name. > * To satisfy it, count number of allocations and add it to name. > */ > -extern rte_atomic64_t ena_alloc_cnt; > +extern rte_atomic64_t *ena_alloc_cnt; > > #define ENA_MEM_ALLOC_COHERENT_ALIGNED( \ > dmadev, size, virt, phys, mem_handle, alignment) \ > @@ -219,7 +219,7 @@ extern rte_atomic64_t ena_alloc_cnt; > if (size > 0) { \ > char z_name[RTE_MEMZONE_NAMESIZE]; \ > snprintf(z_name, sizeof(z_name), "ena_alloc_%"PRIi64"",\ > - rte_atomic64_add_return(&ena_alloc_cnt, 1)); \ > + rte_atomic64_add_return(ena_alloc_cnt, 1)); \ > mz = rte_memzone_reserve_aligned(z_name, size, \ > SOCKET_ID_ANY, RTE_MEMZONE_IOVA_CONTIG,\ > alignment); \ > @@ -249,7 +249,7 @@ extern rte_atomic64_t ena_alloc_cnt; > if (size > 0) { \ > char z_name[RTE_MEMZONE_NAMESIZE]; \ > snprintf(z_name, sizeof(z_name), "ena_alloc_%"PRIi64"",\ > - rte_atomic64_add_return(&ena_alloc_cnt, 1)); \ > + rte_atomic64_add_return(ena_alloc_cnt, 1)); \ > mz = rte_memzone_reserve_aligned(z_name, size, \ > node, RTE_MEMZONE_IOVA_CONTIG, alignment); \ > mem_handle = mz; \ > diff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c > index 5d107775f4..0780e2fee2 100644 > --- a/drivers/net/ena/ena_ethdev.c > +++ b/drivers/net/ena/ena_ethdev.c > @@ -83,11 +83,15 @@ struct ena_stats { > /* Device arguments */ > #define ENA_DEVARG_LARGE_LLQ_HDR "large_llq_hdr" > > +#define ENA_MZ_SHARED_DATA "ena_shared_data" > + > /* > * Each rte_memzone should have unique name. > * To satisfy it, count number of allocation and add it to name. > */ > -rte_atomic64_t ena_alloc_cnt; > +rte_atomic64_t *ena_alloc_cnt; > + > +struct ena_shared_data *ena_shared_data; > > static const struct ena_stats ena_stats_global_strings[] = { > ENA_STAT_GLOBAL_ENTRY(wd_expired), > @@ -1752,6 +1756,42 @@ static uint32_t ena_calc_max_io_queue_num(struct ena_com_dev *ena_dev, > return max_num_io_queues; > } > > +static void ena_prepare_shared_data(struct ena_shared_data *shared_data) > +{ > + memset(shared_data, 0, sizeof(*shared_data)); > +} > + > +static int ena_shared_data_init(void) > +{ > + const struct rte_memzone *mz; > + > + if (ena_shared_data != NULL) > + return 0; > + > + if (rte_eal_process_type() == RTE_PROC_PRIMARY) { > + /* Allocate shared memory. */ > + mz = rte_memzone_reserve(ENA_MZ_SHARED_DATA, > + sizeof(*ena_shared_data), > + SOCKET_ID_ANY, 0); > + if (mz == NULL) { > + PMD_INIT_LOG(CRIT, "Cannot allocate ena shared data"); > + return -rte_errno; > + } > + ena_prepare_shared_data(mz->addr); > + } else { > + /* Lookup allocated shared memory. */ > + mz = rte_memzone_lookup(ENA_MZ_SHARED_DATA); > + if (mz == NULL) { > + PMD_INIT_LOG(CRIT, "Cannot attach ena shared data"); > + return -rte_errno; > + } > + } > + ena_shared_data = mz->addr; > + /* Setup ENA_MEM memzone name counter. */ > + ena_alloc_cnt = &ena_shared_data->mz_alloc_cnt; > + return 0; > +} > + > static int eth_ena_dev_init(struct rte_eth_dev *eth_dev) > { > struct ena_calc_queue_size_ctx calc_queue_ctx = { 0 }; > @@ -1773,6 +1813,10 @@ static int eth_ena_dev_init(struct rte_eth_dev *eth_dev) > eth_dev->tx_pkt_burst = ð_ena_xmit_pkts; > eth_dev->tx_pkt_prepare = ð_ena_prep_pkts; > > + rc = ena_shared_data_init(); > + if (rc != 0) > + return rc; > + > if (rte_eal_process_type() != RTE_PROC_PRIMARY) > return 0; > > diff --git a/drivers/net/ena/ena_ethdev.h b/drivers/net/ena/ena_ethdev.h > index ae235897ee..e8858c6118 100644 > --- a/drivers/net/ena/ena_ethdev.h > +++ b/drivers/net/ena/ena_ethdev.h > @@ -207,6 +207,14 @@ struct ena_offloads { > bool rx_csum_supported; > }; > > +/* Holds data shared between all instances of ENA PMD. */ > +struct ena_shared_data { > + /* Each rte_memzone should have unique name. > + * To satisfy it, count number of allocation and add it to name. > + */ > + rte_atomic64_t mz_alloc_cnt; > +}; > + > /* board specific private data structure */ > struct ena_adapter { > /* OS defined structs */ >