From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 52BBBA2F6B for ; Tue, 8 Oct 2019 18:45:48 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 339EB1D448; Tue, 8 Oct 2019 18:45:47 +0200 (CEST) Received: from dispatch1-us1.ppe-hosted.com (dispatch1-us1.ppe-hosted.com [148.163.129.52]) by dpdk.org (Postfix) with ESMTP id 117EB1D444 for ; Tue, 8 Oct 2019 18:45:46 +0200 (CEST) X-Virus-Scanned: Proofpoint Essentials engine Received: from webmail.solarflare.com (uk.solarflare.com [193.34.186.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by mx1-us5.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTPS id 334CD80069; Tue, 8 Oct 2019 16:45:44 +0000 (UTC) Received: from [192.168.38.17] (91.220.146.112) by ukex01.SolarFlarecom.com (10.17.10.4) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 8 Oct 2019 17:45:38 +0100 To: Simei Su , , , CC: References: <1570102517-41280-1-git-send-email-simei.su@intel.com> <1570164362-64775-1-git-send-email-simei.su@intel.com> <1570164362-64775-3-git-send-email-simei.su@intel.com> From: Andrew Rybchenko Message-ID: <0d8a0bc1-8b71-31b5-50c4-06d412fd6d26@solarflare.com> Date: Tue, 8 Oct 2019 19:45:33 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.9.0 MIME-Version: 1.0 In-Reply-To: <1570164362-64775-3-git-send-email-simei.su@intel.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-GB X-Originating-IP: [91.220.146.112] X-ClientProxiedBy: ocex03.SolarFlarecom.com (10.20.40.36) To ukex01.SolarFlarecom.com (10.17.10.4) X-TM-AS-Product-Ver: SMEX-12.5.0.1300-8.5.1010-24962.003 X-TM-AS-Result: No-6.263200-8.000000-10 X-TMASE-MatchedRID: u7Yf2n7Ca/3mLzc6AOD8DfHkpkyUphL9APiR4btCEeaXbcZfsC7t1C1E Xi73WJBa/xTu/qITlN028sDkxWLWkh6/+Ev3guYHLbjXqdzdtCU/pOSL72dTfwdkFovAReUoaUX s6FguVy384sEICMMV1YjSt8Cl0lhi9X41s3bshlZ2GcWKGZufBadT43GpXcMNVDOoC//QedPwVK uSbLr8UipJZgR4lBJolTekbqxpf4fiVYVlX2l3kub3p4cnIXGNf/TIOqPsDIvDra5IbmQvVmtSC vaCka204TaAoQNTPVhbklXsFFlKhqVIsznpoCaYngIgpj8eDcC063Wh9WVqgtQdB5NUNSsi1GcR AJRT6POOhzOa6g8KrUhN/WetrXRxlb2BWBcapYvHHjcqzpGC8KdC77WSnWfm3tjdjz5IICznm0o zHJNzQTyUuKuciZm+F4rT4n3lZVbWPwZEobShweL59MzH0po2K2yzo9Rrj9wPoYC35RuihKPUI7 hfQSp5eCBcUCG1aJiUTGVAhB5EbQ== X-TM-AS-User-Approved-Sender: Yes X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--6.263200-8.000000 X-TMASE-Version: SMEX-12.5.0.1300-8.5.1010-24962.003 X-MDID: 1570553145-SWV1dVH8fJc3 Subject: Re: [dpdk-dev] [PATCH v10 2/3] ethdev: extend RSS offload types X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 10/4/19 7:46 AM, Simei Su wrote: > This patch reserves several bits as input set selection from the > high end of the 64 bits. It is combined with exisiting ETH_RSS_* > to represent RSS types. > > Signed-off-by: Simei Su > Reviewed-by: Qi Zhang > Acked-by: Ori Kam > --- > lib/librte_ethdev/rte_ethdev.c | 42 ++++++++++++++++++++++++++++++++++++++++++ > lib/librte_ethdev/rte_ethdev.h | 14 ++++++++++++++ > 2 files changed, 56 insertions(+) > > diff --git a/lib/librte_ethdev/rte_ethdev.c b/lib/librte_ethdev/rte_ethdev.c > index af82360..1666652 100644 > --- a/lib/librte_ethdev/rte_ethdev.c > +++ b/lib/librte_ethdev/rte_ethdev.c > @@ -1115,6 +1115,26 @@ struct rte_eth_dev * > return name; > } > > +static uint64_t > +strip_out_src_dst_only(uint64_t value, uint64_t layer) > +{ > + uint64_t flag = 0; > + > + if (layer == 3) { > + if ((value & ETH_RSS_L3_SRC_ONLY) && > + (value & ETH_RSS_L3_DST_ONLY)) > + flag = 1; > + } > + > + if (layer == 4) { > + if ((value & ETH_RSS_L4_SRC_ONLY) && > + (value & ETH_RSS_L4_DST_ONLY)) > + flag = 1; > + } > + > + return flag; > +} > + I though about something like: static uint64_t strip_out_src_dst_only(uint64_t rss_hf) { if ((rss_hf & ETH_RSS_L3_SRC_ONLY) && (rss_hf & ETH_RSS_L3_DST_ONLY)) rss_hf &= ~(ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY); if ((rss_hf & ETH_RSS_L4_SRC_ONLY) && (rss_hf & ETH_RSS_L4_DST_ONLY)) rss_hf &= ~(ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY); return rss_hf; } dev_conf->rx_adv_conf.rss_conf.rss_hf = strip_out_src_dst_only(dev_conf->rx_adv_conf.rss_conf.rss_hf); or void function with uint64_t *rss_hf argument. > int > rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q, > const struct rte_eth_conf *dev_conf) > @@ -1124,6 +1144,8 @@ struct rte_eth_dev * > struct rte_eth_conf orig_conf; > int diag; > int ret; > + uint64_t layer3 = 3; > + uint64_t layer4 = 4; > > RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL); > > @@ -1269,6 +1291,16 @@ struct rte_eth_dev * > goto rollback; > } > > + if (strip_out_src_dst_only( > + dev_conf->rx_adv_conf.rss_conf.rss_hf, layer3) == 1) > + dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf &= > + ~(ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY); > + > + if (strip_out_src_dst_only( > + dev_conf->rx_adv_conf.rss_conf.rss_hf, layer4) == 1) > + dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf &= > + ~(ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY); > + > /* Check that device supports requested rss hash functions. */ > if ((dev_info.flow_type_rss_offloads | > dev_conf->rx_adv_conf.rss_conf.rss_hf) != > @@ -3105,6 +3137,8 @@ struct rte_eth_dev * > struct rte_eth_dev *dev; > struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, }; > int ret; > + uint64_t layer3 = 3; > + uint64_t layer4 = 4; > > RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); > > @@ -3112,6 +3146,14 @@ struct rte_eth_dev * > if (ret != 0) > return ret; > > + if (strip_out_src_dst_only(rss_conf->rss_hf, layer3) == 1) > + rss_conf->rss_hf &= > + ~(ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY); > + > + if (strip_out_src_dst_only(rss_conf->rss_hf, layer4) == 1) > + rss_conf->rss_hf &= > + ~(ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY); > + > dev = &rte_eth_devices[port_id]; > if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) != > dev_info.flow_type_rss_offloads) { > diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h > index 7722f70..6d61b84 100644 > --- a/lib/librte_ethdev/rte_ethdev.h > +++ b/lib/librte_ethdev/rte_ethdev.h > @@ -505,6 +505,20 @@ struct rte_eth_rss_conf { > #define ETH_RSS_GENEVE (1ULL << 20) > #define ETH_RSS_NVGRE (1ULL << 21) > > +/* > + * We use the following macros to combine with above ETH_RSS_* for > + * more specific input set selection. These bits are defined starting > + * from the high end of the 64 bits. > + * Note: If we use above ETH_RSS_* without SRC/DST_ONLY, it represents > + * both SRC and DST are taken into account. If SRC_ONLY and DST_ONLY of > + * the same level be used simultaneously, it is the same case as none of > + * them are added. > + */ > +#define ETH_RSS_L3_SRC_ONLY (1ULL << 63) > +#define ETH_RSS_L3_DST_ONLY (1ULL << 62) > +#define ETH_RSS_L4_SRC_ONLY (1ULL << 61) > +#define ETH_RSS_L4_DST_ONLY (1ULL << 60) > + > #define ETH_RSS_IP ( \ > ETH_RSS_IPV4 | \ > ETH_RSS_FRAG_IPV4 | \