From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by dpdk.org (Postfix) with ESMTP id A2F821B3A5 for ; Wed, 20 Mar 2019 18:35:06 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Mar 2019 10:35:05 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,249,1549958400"; d="scan'208";a="127122112" Received: from fyigit-mobl.ger.corp.intel.com (HELO [10.237.221.46]) ([10.237.221.46]) by orsmga008.jf.intel.com with ESMTP; 20 Mar 2019 10:35:04 -0700 To: "Lu, Wenzhuo" , "dev@dpdk.org" References: <1551340136-83843-1-git-send-email-wenzhuo.lu@intel.com> <1552630975-62900-1-git-send-email-wenzhuo.lu@intel.com> <1552630975-62900-4-git-send-email-wenzhuo.lu@intel.com> <7ccb7c52-b475-6d43-753f-73a917a7b3f6@intel.com> <6A0DE07E22DDAD4C9103DF62FEBC0909407ED905@shsmsx102.ccr.corp.intel.com> From: Ferruh Yigit Openpgp: preference=signencrypt Autocrypt: addr=ferruh.yigit@intel.com; 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WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.5.3 MIME-Version: 1.0 In-Reply-To: <6A0DE07E22DDAD4C9103DF62FEBC0909407ED905@shsmsx102.ccr.corp.intel.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Subject: Re: [dpdk-dev] [PATCH v3 3/8] net/ice: support vector SSE in RX X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 20 Mar 2019 17:35:07 -0000 On 3/18/2019 1:22 AM, Lu, Wenzhuo wrote: > Hi Ferruh, > >> -----Original Message----- >> From: Yigit, Ferruh >> Sent: Saturday, March 16, 2019 1:54 AM >> To: Lu, Wenzhuo ; dev@dpdk.org >> Subject: Re: [dpdk-dev] [PATCH v3 3/8] net/ice: support vector SSE in RX >> >> On 3/15/2019 6:22 AM, Wenzhuo Lu wrote: >>> Signed-off-by: Wenzhuo Lu >> >> <...> >> >>> @@ -305,6 +305,7 @@ CONFIG_RTE_LIBRTE_ICE_DEBUG_TX=n >>> CONFIG_RTE_LIBRTE_ICE_DEBUG_TX_FREE=n >>> CONFIG_RTE_LIBRTE_ICE_RX_ALLOW_BULK_ALLOC=y >>> CONFIG_RTE_LIBRTE_ICE_16BYTE_RX_DESC=n >>> +CONFIG_RTE_LIBRTE_ICE_INC_VECTOR=y >> >> Meson seems setting this config automatically. Do we need this compile time >> option at all? > It's not for meson build. It's for the traditional build. To my opinion, meson build even doesn't use the configure file. It has its own configuration inside. I am not saying this is for meson. This is a compile time config option, to let user enable/disable VECTOR path of the PMD. But meson build doesn't get this input from the user and enables it by default. If enabling it by default works and an acceptable solution, why we are not doing same thing for makefile. Why not just remove the config option completely and update code as it is enabled? In this default enabled case, if there is a need to let user disable the vector path, which may be a need, why not add a device argument to disable the vector path on runtime, I believe this can be done easily by described below. What is the benefit of a compile time flag against runtime devargs? Why someone would want to remove the all vector path from the binary, just to gain a few kilobytes from the final binary? But other way around, having the vector path in binary but disable it dynamically when needed has advantage of easily enable it back without need to recompile when the platform has vector path support. > >> Would it work if we replace this with a device arg, which can be used to >> disable vector path if set, and 'ice_rx_vec_dev_check()' can check it? > We've implemented the dynamic selection of vector and normal path. Here is the compile setting. In case the user wants to remove the vector code thoroughly, so there may be a little performance benefit. > >> >> <...> >> >>> @@ -0,0 +1,155 @@ >>> +/* SPDX-License-Identifier: BSD-3-Clause >>> + * Copyright(c) 2019 Intel Corporation */ >>> + >>> +#ifndef _ICE_RXTX_VEC_COMMON_H_ >>> +#define _ICE_RXTX_VEC_COMMON_H_ >>> + >>> +#include "ice_rxtx.h" >>> + >>> +static inline uint16_t >>> +reassemble_packets(struct ice_rx_queue *rxq, struct rte_mbuf **rx_bufs, >>> + uint16_t nb_bufs, uint8_t *split_flags) { >>> + struct rte_mbuf *pkts[ICE_VPMD_RX_BURST] = {0}; /*finished pkts*/ >>> + struct rte_mbuf *start = rxq->pkt_first_seg; >>> + struct rte_mbuf *end = rxq->pkt_last_seg; >>> + unsigned pkt_idx, buf_idx; >> There are checkpatch warnings for using 'unsigned int' instead of 'unsigned', >> can you please fix them? There are a few of them. > Sure, will fix them. > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id 5C244A00E6 for ; Wed, 20 Mar 2019 18:35:09 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 177851B3A7; Wed, 20 Mar 2019 18:35:09 +0100 (CET) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by dpdk.org (Postfix) with ESMTP id A2F821B3A5 for ; Wed, 20 Mar 2019 18:35:06 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Mar 2019 10:35:05 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,249,1549958400"; d="scan'208";a="127122112" Received: from fyigit-mobl.ger.corp.intel.com (HELO [10.237.221.46]) ([10.237.221.46]) by orsmga008.jf.intel.com with ESMTP; 20 Mar 2019 10:35:04 -0700 To: "Lu, Wenzhuo" , "dev@dpdk.org" References: <1551340136-83843-1-git-send-email-wenzhuo.lu@intel.com> <1552630975-62900-1-git-send-email-wenzhuo.lu@intel.com> <1552630975-62900-4-git-send-email-wenzhuo.lu@intel.com> <7ccb7c52-b475-6d43-753f-73a917a7b3f6@intel.com> <6A0DE07E22DDAD4C9103DF62FEBC0909407ED905@shsmsx102.ccr.corp.intel.com> From: Ferruh Yigit Openpgp: preference=signencrypt Autocrypt: addr=ferruh.yigit@intel.com; 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WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.5.3 MIME-Version: 1.0 In-Reply-To: <6A0DE07E22DDAD4C9103DF62FEBC0909407ED905@shsmsx102.ccr.corp.intel.com> Content-Type: text/plain; charset="UTF-8" Content-Language: en-US Content-Transfer-Encoding: 8bit Subject: Re: [dpdk-dev] [PATCH v3 3/8] net/ice: support vector SSE in RX X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Message-ID: <20190320173504.DFYO0cXUYXdzQ5MHo8n6dcnNc9E8TfgXKFuoasPjW7I@z> On 3/18/2019 1:22 AM, Lu, Wenzhuo wrote: > Hi Ferruh, > >> -----Original Message----- >> From: Yigit, Ferruh >> Sent: Saturday, March 16, 2019 1:54 AM >> To: Lu, Wenzhuo ; dev@dpdk.org >> Subject: Re: [dpdk-dev] [PATCH v3 3/8] net/ice: support vector SSE in RX >> >> On 3/15/2019 6:22 AM, Wenzhuo Lu wrote: >>> Signed-off-by: Wenzhuo Lu >> >> <...> >> >>> @@ -305,6 +305,7 @@ CONFIG_RTE_LIBRTE_ICE_DEBUG_TX=n >>> CONFIG_RTE_LIBRTE_ICE_DEBUG_TX_FREE=n >>> CONFIG_RTE_LIBRTE_ICE_RX_ALLOW_BULK_ALLOC=y >>> CONFIG_RTE_LIBRTE_ICE_16BYTE_RX_DESC=n >>> +CONFIG_RTE_LIBRTE_ICE_INC_VECTOR=y >> >> Meson seems setting this config automatically. Do we need this compile time >> option at all? > It's not for meson build. It's for the traditional build. To my opinion, meson build even doesn't use the configure file. It has its own configuration inside. I am not saying this is for meson. This is a compile time config option, to let user enable/disable VECTOR path of the PMD. But meson build doesn't get this input from the user and enables it by default. If enabling it by default works and an acceptable solution, why we are not doing same thing for makefile. Why not just remove the config option completely and update code as it is enabled? In this default enabled case, if there is a need to let user disable the vector path, which may be a need, why not add a device argument to disable the vector path on runtime, I believe this can be done easily by described below. What is the benefit of a compile time flag against runtime devargs? Why someone would want to remove the all vector path from the binary, just to gain a few kilobytes from the final binary? But other way around, having the vector path in binary but disable it dynamically when needed has advantage of easily enable it back without need to recompile when the platform has vector path support. > >> Would it work if we replace this with a device arg, which can be used to >> disable vector path if set, and 'ice_rx_vec_dev_check()' can check it? > We've implemented the dynamic selection of vector and normal path. Here is the compile setting. In case the user wants to remove the vector code thoroughly, so there may be a little performance benefit. > >> >> <...> >> >>> @@ -0,0 +1,155 @@ >>> +/* SPDX-License-Identifier: BSD-3-Clause >>> + * Copyright(c) 2019 Intel Corporation */ >>> + >>> +#ifndef _ICE_RXTX_VEC_COMMON_H_ >>> +#define _ICE_RXTX_VEC_COMMON_H_ >>> + >>> +#include "ice_rxtx.h" >>> + >>> +static inline uint16_t >>> +reassemble_packets(struct ice_rx_queue *rxq, struct rte_mbuf **rx_bufs, >>> + uint16_t nb_bufs, uint8_t *split_flags) { >>> + struct rte_mbuf *pkts[ICE_VPMD_RX_BURST] = {0}; /*finished pkts*/ >>> + struct rte_mbuf *start = rxq->pkt_first_seg; >>> + struct rte_mbuf *end = rxq->pkt_last_seg; >>> + unsigned pkt_idx, buf_idx; >> There are checkpatch warnings for using 'unsigned int' instead of 'unsigned', >> can you please fix them? There are a few of them. > Sure, will fix them. >