From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 615EEA09FF; Mon, 11 Jan 2021 15:59:37 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id BA446140EAB; Mon, 11 Jan 2021 15:59:10 +0100 (CET) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mails.dpdk.org (Postfix) with ESMTP id A9800140EAE for ; Mon, 11 Jan 2021 15:59:09 +0100 (CET) IronPort-SDR: AZWObMAod8L/Qb8ByT6fV5xPNRSf6pp55R4Osk12PqSMKTDJx0EHF5a7GqgCDmdHwUb2Vhnss3 IwIqzmFJ5uDw== X-IronPort-AV: E=McAfee;i="6000,8403,9860"; a="157653007" X-IronPort-AV: E=Sophos;i="5.79,338,1602572400"; d="scan'208";a="157653007" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jan 2021 06:59:09 -0800 IronPort-SDR: EFcNwrbh8a6lDMCIRn17UFFsefqHQOFg8y1fK/eXkUnXAt9Jyqi4n8vip7hMqlRj0oNolauRHK zVVIOJHhWoOw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.79,338,1602572400"; d="scan'208";a="423816572" Received: from silpixa00399498.ir.intel.com (HELO silpixa00399498.ger.corp.intel.com) ([10.237.222.179]) by orsmga001.jf.intel.com with ESMTP; 11 Jan 2021 06:59:06 -0800 From: Anatoly Burakov To: dev@dpdk.org Cc: Jerin Jacob , Ruifeng Wang , Jan Viktorin , David Christensen , Ray Kinsella , Neil Horman , Bruce Richardson , Konstantin Ananyev , thomas@monjalon.net, timothy.mcdaniel@intel.com, david.hunt@intel.com, chris.macnamara@intel.com Date: Mon, 11 Jan 2021 14:58:49 +0000 Message-Id: <0fd864903f721114425d90352dc43431ae1b3cb9.1610377084.git.anatoly.burakov@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v15 04/11] eal: remove sync version of power monitor X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Currently, the "sync" version of power monitor intrinsic is supposed to be used for purposes of waking up a sleeping core. However, there are better ways to achieve the same result, so remove the unneeded function. Signed-off-by: Anatoly Burakov --- lib/librte_eal/arm/rte_power_intrinsics.c | 12 ----- .../include/generic/rte_power_intrinsics.h | 34 -------------- lib/librte_eal/ppc/rte_power_intrinsics.c | 12 ----- lib/librte_eal/version.map | 1 - lib/librte_eal/x86/rte_power_intrinsics.c | 46 ------------------- 5 files changed, 105 deletions(-) diff --git a/lib/librte_eal/arm/rte_power_intrinsics.c b/lib/librte_eal/arm/rte_power_intrinsics.c index f2c3506b90..6b8219b919 100644 --- a/lib/librte_eal/arm/rte_power_intrinsics.c +++ b/lib/librte_eal/arm/rte_power_intrinsics.c @@ -15,18 +15,6 @@ rte_power_monitor(const struct rte_power_monitor_cond *pmc, RTE_SET_USED(tsc_timestamp); } -/** - * This function is not supported on ARM. - */ -void -rte_power_monitor_sync(const struct rte_power_monitor_cond *pmc, - const uint64_t tsc_timestamp, rte_spinlock_t *lck) -{ - RTE_SET_USED(pmc); - RTE_SET_USED(tsc_timestamp); - RTE_SET_USED(lck); -} - /** * This function is not supported on ARM. */ diff --git a/lib/librte_eal/include/generic/rte_power_intrinsics.h b/lib/librte_eal/include/generic/rte_power_intrinsics.h index 00c670cb50..a6f1955996 100644 --- a/lib/librte_eal/include/generic/rte_power_intrinsics.h +++ b/lib/librte_eal/include/generic/rte_power_intrinsics.h @@ -57,40 +57,6 @@ __rte_experimental void rte_power_monitor(const struct rte_power_monitor_cond *pmc, const uint64_t tsc_timestamp); -/** - * @warning - * @b EXPERIMENTAL: this API may change without prior notice - * - * Monitor specific address for changes. This will cause the CPU to enter an - * architecture-defined optimized power state until either the specified - * memory address is written to, a certain TSC timestamp is reached, or other - * reasons cause the CPU to wake up. - * - * Additionally, an `expected` 64-bit value and 64-bit mask are provided. If - * mask is non-zero, the current value pointed to by the `p` pointer will be - * checked against the expected value, and if they match, the entering of - * optimized power state may be aborted. - * - * This call will also lock a spinlock on entering sleep, and release it on - * waking up the CPU. - * - * @warning It is responsibility of the user to check if this function is - * supported at runtime using `rte_cpu_get_intrinsics_support()` API call. - * - * @param pmc - * The monitoring condition structure. - * @param tsc_timestamp - * Maximum TSC timestamp to wait for. Note that the wait behavior is - * architecture-dependent. - * @param lck - * A spinlock that must be locked before entering the function, will be - * unlocked while the CPU is sleeping, and will be locked again once the CPU - * wakes up. - */ -__rte_experimental -void rte_power_monitor_sync(const struct rte_power_monitor_cond *pmc, - const uint64_t tsc_timestamp, rte_spinlock_t *lck); - /** * @warning * @b EXPERIMENTAL: this API may change without prior notice diff --git a/lib/librte_eal/ppc/rte_power_intrinsics.c b/lib/librte_eal/ppc/rte_power_intrinsics.c index 3897d2024d..9a40c4d5d6 100644 --- a/lib/librte_eal/ppc/rte_power_intrinsics.c +++ b/lib/librte_eal/ppc/rte_power_intrinsics.c @@ -15,18 +15,6 @@ rte_power_monitor(const struct rte_power_monitor_cond *pmc, RTE_SET_USED(tsc_timestamp); } -/** - * This function is not supported on PPC64. - */ -void -rte_power_monitor_sync(const struct rte_power_monitor_cond *pmc, - const uint64_t tsc_timestamp, rte_spinlock_t *lck) -{ - RTE_SET_USED(pmc); - RTE_SET_USED(tsc_timestamp); - RTE_SET_USED(lck); -} - /** * This function is not supported on PPC64. */ diff --git a/lib/librte_eal/version.map b/lib/librte_eal/version.map index 31bf76ae81..20945b1efa 100644 --- a/lib/librte_eal/version.map +++ b/lib/librte_eal/version.map @@ -406,7 +406,6 @@ EXPERIMENTAL { # added in 21.02 rte_power_monitor; - rte_power_monitor_sync; rte_power_pause; }; diff --git a/lib/librte_eal/x86/rte_power_intrinsics.c b/lib/librte_eal/x86/rte_power_intrinsics.c index 9b0638148d..487a783a2c 100644 --- a/lib/librte_eal/x86/rte_power_intrinsics.c +++ b/lib/librte_eal/x86/rte_power_intrinsics.c @@ -67,52 +67,6 @@ rte_power_monitor(const struct rte_power_monitor_cond *pmc, "a"(tsc_l), "d"(tsc_h)); } -/** - * This function uses UMONITOR/UMWAIT instructions and will enter C0.2 state. - * For more information about usage of these instructions, please refer to - * Intel(R) 64 and IA-32 Architectures Software Developer's Manual. - */ -void -rte_power_monitor_sync(const struct rte_power_monitor_cond *pmc, - const uint64_t tsc_timestamp, rte_spinlock_t *lck) -{ - const uint32_t tsc_l = (uint32_t)tsc_timestamp; - const uint32_t tsc_h = (uint32_t)(tsc_timestamp >> 32); - - /* prevent user from running this instruction if it's not supported */ - if (!wait_supported) - return; - - /* - * we're using raw byte codes for now as only the newest compiler - * versions support this instruction natively. - */ - - /* set address for UMONITOR */ - asm volatile(".byte 0xf3, 0x0f, 0xae, 0xf7;" - : - : "D"(pmc->addr)); - - if (pmc->mask) { - const uint64_t cur_value = __get_umwait_val( - pmc->addr, pmc->data_sz); - const uint64_t masked = cur_value & pmc->mask; - - /* if the masked value is already matching, abort */ - if (masked == pmc->val) - return; - } - rte_spinlock_unlock(lck); - - /* execute UMWAIT */ - asm volatile(".byte 0xf2, 0x0f, 0xae, 0xf7;" - : /* ignore rflags */ - : "D"(0), /* enter C0.2 */ - "a"(tsc_l), "d"(tsc_h)); - - rte_spinlock_lock(lck); -} - /** * This function uses TPAUSE instruction and will enter C0.2 state. For more * information about usage of this instruction, please refer to Intel(R) 64 and -- 2.25.1