From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id DFDCAA0526; Tue, 10 Nov 2020 13:35:57 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 5401F2B9D; Tue, 10 Nov 2020 13:35:56 +0100 (CET) Received: from out0-146.mail.aliyun.com (out0-146.mail.aliyun.com [140.205.0.146]) by dpdk.org (Postfix) with ESMTP id 95C41F90 for ; Tue, 10 Nov 2020 13:35:51 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alibaba-inc.com; s=default; t=1605011746; h=Subject:To:From:Message-ID:Date:MIME-Version:Content-Type; bh=ndQBQ/pL8kTkWqnPvWlmN2HIYthDlFmecHZ3BTVqHd4=; b=VkAo8W17bVnChRuatkce9xU3/Rmxo+d+kjS0JvLWn5MQKc58FoHZTS40ozTLXe8ZTYVGU4EJGDRls8rAWsjSKFwZwLgpYWjRADvvIyNn1b20v/okAwvxCGyKOcar/qIdI/S45smvz6DPwpI6eJkx/9Bd2L3Prnv+ZZBnjWHDpeU= X-Alimail-AntiSpam: AC=PASS; BC=-1|-1; BR=01201311R361e4; CH=green; DM=||false|; DS=||; FP=0|-1|-1|-1|0|-1|-1|-1; HT=ay29a033018047199; MF=huawei.xhw@alibaba-inc.com; NM=1; PH=DS; RN=9; SR=0; TI=SMTPD_---.Iuuu9OU_1605011745; Received: from 30.43.68.233(mailfrom:huawei.xhw@alibaba-inc.com fp:SMTPD_---.Iuuu9OU_1605011745) by smtp.aliyun-inc.com(127.0.0.1); Tue, 10 Nov 2020 20:35:45 +0800 To: David Marchand , "ferruh.yigit" Cc: dev@dpdk.org, maxime.coquelin@redhat.com, anatoly.burakov@intel.com, zhihong.wang@intel.com, chenbo.xia@intel.com, grive@u256.net, Thomas Monjalon References: <68ecd941-9c56-4de7-fae2-2ad15bdfd81a@alibaba-inc.com> <1603381885-88819-1-git-send-email-huawei.xhw@alibaba-inc.com> From: "=?UTF-8?B?6LCi5Y2O5LyfKOatpOaXtuatpOWIu++8iQ==?=" Message-ID: <0fefe2e6-1a4d-0579-4b59-92088bfaa276@alibaba-inc.com> Date: Tue, 10 Nov 2020 20:35:13 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.4.1 MIME-Version: 1.0 In-Reply-To: <1603381885-88819-1-git-send-email-huawei.xhw@alibaba-inc.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US Subject: Re: [dpdk-dev] [PATCH v5 0/3] support both PIO and MMIO BAR for virtio PMD X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi David: I see that you are assigned the reviewer of this patch, and Ferruh have helped reviewed it. I rebased this patch based on his comments. Previously there are different ways to get port address based on different DPDK uio driver(IGB_UIO/UIO_PCI_GENERIC/VFIO), which is actually not necessary. This patch makes IO/MMIO port map/RW API more generic, which also supports MMIO.  It also fixes performance issue with vfio. Could you spare some time to have time to review this? Thanks On 2020/10/22 23:51, 谢华伟(此时此刻） wrote: > From: "huawei.xhw" > > Legacy virtio-pci only supports PIO BAR resource. As we need to create lots of > virtio devices and PIO resource on x86 is very limited, we expose MMIO BAR. > > Kernel supports both PIO and MMIO BAR for legacy virtio-pci device. We handles > different type of BAR in the similar way. > > In previous implementation, with igb_uio we get PIO address from igb_uio > sysfs entry; with uio_pci_generic, we get PIO address from > /proc/ioports. > For PIO/MMIO RW, there is different path for different drivers and arch. > For VFIO, PIO/MMIO RW is through syscall, which has big performance > issue. > On X86, it assumes only PIO is supported. > > All of the above is too much twisted. > This patch unifies the way to get both PIO and MMIO address for different driver > and arch, all from standard resource attr under pci sysfs. > > We distinguish PIO and MMIO by their address like how kernel does. It is ugly but works. > > v2 changes: > - add more explanation in the commit message > > v3 changes: > - fix patch format issues > > v4 changes: > - fixes for RTE_KDRV_UIO_GENERIC -> RTE_PCI_KDRV_UIO_GENERIC > > v5 changes: > - split into three seperate patches > > huawei.xhw (3): > PCI: use PCI standard sysfs entry to get PIO address > PCI: support MMIO in rte_pci_ioport_map/unap/read/write > PCI: don't use vfio ioctl call to access PIO resource > > drivers/bus/pci/linux/pci.c | 89 +------------------- > drivers/bus/pci/linux/pci_uio.c | 177 ++++++++++++++++++++++++++++------------ > 2 files changed, 128 insertions(+), 138 deletions(-) >