* [dpdk-dev] [PATCH 1/3] ethdev: expose Rx hardware timestamp
@ 2017-08-22 13:46 Raslan Darawsheh
2017-08-22 13:46 ` [dpdk-dev] [PATCH 2/3] app/testpmd: add Rx timestamp in testpmd Raslan Darawsheh
2017-08-22 13:46 ` [dpdk-dev] [PATCH 3/3] net/mlx5: add hardware timestamp Raslan Darawsheh
0 siblings, 2 replies; 51+ messages in thread
From: Raslan Darawsheh @ 2017-08-22 13:46 UTC (permalink / raw)
To: thomas, jingjing.wu, dev, nelio.laranjeiro, adrien.mazarguil
Added new capability to the list of rx offloads for hw timestamp
The PMDs how expose this capability will always have it enabled.
But, if the following API got accepted applications can choose
between disable/enable this API.
http://dpdk.org/dev/patchwork/patch/27470/
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
---
lib/librte_ether/rte_ethdev.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h
index 0adf327..cc5d281 100644
--- a/lib/librte_ether/rte_ethdev.h
+++ b/lib/librte_ether/rte_ethdev.h
@@ -907,6 +907,8 @@ struct rte_eth_conf {
#define DEV_RX_OFFLOAD_QINQ_STRIP 0x00000020
#define DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM 0x00000040
#define DEV_RX_OFFLOAD_MACSEC_STRIP 0x00000080
+#define DEV_RX_OFFLOAD_TIMESTAMP 0x00000100
+/**< Device puts raw timestamp in mbuf. */
/**
* TX offload capabilities of a device.
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* [dpdk-dev] [PATCH 2/3] app/testpmd: add Rx timestamp in testpmd
2017-08-22 13:46 [dpdk-dev] [PATCH 1/3] ethdev: expose Rx hardware timestamp Raslan Darawsheh
@ 2017-08-22 13:46 ` Raslan Darawsheh
2017-08-22 13:46 ` [dpdk-dev] [PATCH 3/3] net/mlx5: add hardware timestamp Raslan Darawsheh
1 sibling, 0 replies; 51+ messages in thread
From: Raslan Darawsheh @ 2017-08-22 13:46 UTC (permalink / raw)
To: thomas, jingjing.wu, dev, nelio.laranjeiro, adrien.mazarguil
Added new print in case a PMD exposes Rx timestamp.
Also, added a print for timestamp value in rxonly mode
in case the packet was timestamped.
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
---
app/test-pmd/config.c | 3 +++
app/test-pmd/rxonly.c | 2 ++
2 files changed, 5 insertions(+)
diff --git a/app/test-pmd/config.c b/app/test-pmd/config.c
index 3ae3e1c..8a5da5d 100644
--- a/app/test-pmd/config.c
+++ b/app/test-pmd/config.c
@@ -598,6 +598,9 @@ port_offload_cap_display(portid_t port_id)
printf("off\n");
}
+ if (dev_info.rx_offload_capa & DEV_RX_OFFLOAD_TIMESTAMP)
+ printf("HW timestamp: on\n");
+
if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_QINQ_INSERT) {
printf("Double VLANs insert: ");
if (ports[port_id].tx_ol_flags &
diff --git a/app/test-pmd/rxonly.c b/app/test-pmd/rxonly.c
index 5ef0219..f4d35d7 100644
--- a/app/test-pmd/rxonly.c
+++ b/app/test-pmd/rxonly.c
@@ -158,6 +158,8 @@ pkt_burst_receive(struct fwd_stream *fs)
printf("hash=0x%x ID=0x%x ",
mb->hash.fdir.hash, mb->hash.fdir.id);
}
+ if (ol_flags & PKT_RX_TIMESTAMP)
+ printf(" - timestamp %lu ", mb->timestamp);
if (ol_flags & PKT_RX_VLAN_STRIPPED)
printf(" - VLAN tci=0x%x", mb->vlan_tci);
if (ol_flags & PKT_RX_QINQ_STRIPPED)
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* [dpdk-dev] [PATCH 3/3] net/mlx5: add hardware timestamp
2017-08-22 13:46 [dpdk-dev] [PATCH 1/3] ethdev: expose Rx hardware timestamp Raslan Darawsheh
2017-08-22 13:46 ` [dpdk-dev] [PATCH 2/3] app/testpmd: add Rx timestamp in testpmd Raslan Darawsheh
@ 2017-08-22 13:46 ` Raslan Darawsheh
2017-08-23 15:02 ` Nélio Laranjeiro
2017-08-24 7:46 ` [dpdk-dev] [PATCH v2 1/3] ethdev: expose Rx " Raslan Darawsheh
1 sibling, 2 replies; 51+ messages in thread
From: Raslan Darawsheh @ 2017-08-22 13:46 UTC (permalink / raw)
To: thomas, jingjing.wu, dev, nelio.laranjeiro, adrien.mazarguil
Expose a new capapilty of Rx hw timestamp and
added new device args to enable it hw_timestamp.
It will add the raw hw timestamp into the packets.
Its expected that it will lower down the performance since using it
will disable the cqe comprission, and will add extra checkes in
the vec rx path.
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
---
drivers/net/mlx5/mlx5.c | 23 +++++++++++++++++++++++
drivers/net/mlx5/mlx5.h | 1 +
drivers/net/mlx5/mlx5_ethdev.c | 3 ++-
drivers/net/mlx5/mlx5_rxq.c | 3 +++
drivers/net/mlx5/mlx5_rxtx.c | 5 +++++
drivers/net/mlx5/mlx5_rxtx.h | 1 +
drivers/net/mlx5/mlx5_rxtx_vec_sse.c | 14 ++++++++++++++
7 files changed, 49 insertions(+), 1 deletion(-)
diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index b7e5046..4b3a3ab 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -94,6 +94,9 @@
/* Device parameter to enable hardware TSO offload. */
#define MLX5_TSO "tso"
+/* Device parameter to enable hardware timestamp offload. */
+#define MLX5_RX_TIMESTAMP "rx_timestamp"
+
/* Device parameter to enable hardware Tx vector. */
#define MLX5_TX_VEC_EN "tx_vec_en"
@@ -113,6 +116,7 @@ struct mlx5_args {
int tso;
int tx_vec_en;
int rx_vec_en;
+ int hw_timestamp;
};
/**
* Retrieve integer value from environment variable.
@@ -336,6 +340,8 @@ mlx5_args_check(const char *key, const char *val, void *opaque)
args->tx_vec_en = !!tmp;
} else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
args->rx_vec_en = !!tmp;
+ } else if (strcmp(MLX5_RX_TIMESTAMP, key) == 0) {
+ args->hw_timestamp = !!tmp;
} else {
WARN("%s: unknown parameter", key);
return -EINVAL;
@@ -367,6 +373,7 @@ mlx5_args(struct mlx5_args *args, struct rte_devargs *devargs)
MLX5_TSO,
MLX5_TX_VEC_EN,
MLX5_RX_VEC_EN,
+ MLX5_RX_TIMESTAMP,
NULL,
};
struct rte_kvargs *kvlist;
@@ -426,6 +433,8 @@ mlx5_args_assign(struct priv *priv, struct mlx5_args *args)
priv->tx_vec_en = args->tx_vec_en;
if (args->rx_vec_en != MLX5_ARG_UNSET)
priv->rx_vec_en = args->rx_vec_en;
+ if (args->hw_timestamp != MLX5_ARG_UNSET)
+ priv->hw_timestamp = args->hw_timestamp;
}
/**
@@ -573,6 +582,7 @@ mlx5_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
.tso = MLX5_ARG_UNSET,
.tx_vec_en = MLX5_ARG_UNSET,
.rx_vec_en = MLX5_ARG_UNSET,
+ .hw_timestamp = MLX5_ARG_UNSET,
};
exp_device_attr.comp_mask =
@@ -581,6 +591,7 @@ mlx5_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
IBV_EXP_DEVICE_ATTR_VLAN_OFFLOADS |
IBV_EXP_DEVICE_ATTR_RX_PAD_END_ALIGN |
IBV_EXP_DEVICE_ATTR_TSO_CAPS |
+ IBV_EXP_DEVICE_ATTR_WITH_TIMESTAMP_MASK |
0;
DEBUG("using port %u (%08" PRIx32 ")", port, test);
@@ -662,6 +673,18 @@ mlx5_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
IBV_EXP_DEVICE_VXLAN_SUPPORT);
DEBUG("L2 tunnel checksum offloads are %ssupported",
(priv->hw_csum_l2tun ? "" : "not "));
+ if (priv->hw_timestamp) {
+ priv->hw_timestamp =
+ (exp_device_attr.comp_mask |
+ IBV_EXP_DEVICE_ATTR_WITH_TIMESTAMP_MASK);
+ DEBUG("Timestamping offload is %ssupported",
+ (priv->hw_timestamp ? "" : "not "));
+ priv->cqe_comp = (priv->hw_timestamp ?
+ 0 : priv->cqe_comp);
+ DEBUG("%s",
+ (priv->hw_timestamp ?
+ "cqe compression is disabled" : ""));
+ }
priv->ind_table_max_size = exp_device_attr.rx_hash_caps.max_rwq_indirection_table_size;
/* Remove this check once DPDK supports larger/variable
diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index 43c5384..4d19351 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -120,6 +120,7 @@ struct priv {
unsigned int allmulti_req:1; /* All multicast mode requested. */
unsigned int hw_csum:1; /* Checksum offload is supported. */
unsigned int hw_csum_l2tun:1; /* Same for L2 tunnels. */
+ unsigned int hw_timestamp:1; /* rx timestamp offload is supported. */
unsigned int hw_vlan_strip:1; /* VLAN stripping is supported. */
unsigned int hw_fcs_strip:1; /* FCS stripping is supported. */
unsigned int hw_padding:1; /* End alignment padding is supported. */
diff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c
index b0eb3cd..1942de7 100644
--- a/drivers/net/mlx5/mlx5_ethdev.c
+++ b/drivers/net/mlx5/mlx5_ethdev.c
@@ -686,7 +686,8 @@ mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
DEV_RX_OFFLOAD_UDP_CKSUM |
DEV_RX_OFFLOAD_TCP_CKSUM) :
0) |
- (priv->hw_vlan_strip ? DEV_RX_OFFLOAD_VLAN_STRIP : 0);
+ (priv->hw_vlan_strip ? DEV_RX_OFFLOAD_VLAN_STRIP : 0) |
+ (priv->hw_timestamp ? DEV_RX_OFFLOAD_TIMESTAMP : 0);
if (!priv->mps)
info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT;
if (priv->hw_csum)
diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c
index 74387a7..c8ccde2 100644
--- a/drivers/net/mlx5/mlx5_rxq.c
+++ b/drivers/net/mlx5/mlx5_rxq.c
@@ -929,6 +929,7 @@ rxq_ctrl_setup(struct rte_eth_dev *dev, struct rxq_ctrl *rxq_ctrl,
if (priv->hw_csum_l2tun)
tmpl.rxq.csum_l2tun =
!!dev->data->dev_conf.rxmode.hw_ip_checksum;
+ tmpl.rxq.timestamp = priv->hw_timestamp;
/* Use the entire RX mempool as the memory region. */
tmpl.mr = mlx5_mp2mr(priv->pd, mp);
if (tmpl.mr == NULL) {
@@ -950,6 +951,8 @@ rxq_ctrl_setup(struct rte_eth_dev *dev, struct rxq_ctrl *rxq_ctrl,
attr.cq = (struct ibv_exp_cq_init_attr){
.comp_mask = 0,
};
+ if (priv->hw_timestamp)
+ attr.cq.flags |= IBV_EXP_CQ_TIMESTAMP;
if (priv->cqe_comp) {
attr.cq.comp_mask |= IBV_EXP_CQ_INIT_ATTR_FLAGS;
attr.cq.flags |= IBV_EXP_CQ_COMPRESSED_CQE;
diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c
index b07bcd1..47344f2 100644
--- a/drivers/net/mlx5/mlx5_rxtx.c
+++ b/drivers/net/mlx5/mlx5_rxtx.c
@@ -1865,6 +1865,11 @@ mlx5_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
PKT_RX_VLAN_STRIPPED;
pkt->vlan_tci = ntohs(cqe->vlan_info);
}
+ if (rxq->timestamp) {
+ pkt->timestamp =
+ rte_be_to_cpu_64(cqe->timestamp);
+ pkt->ol_flags |= PKT_RX_TIMESTAMP;
+ }
if (rxq->crc_present)
len -= ETHER_CRC_LEN;
PKT_LEN(pkt) = len;
diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h
index 7de1d10..20c0f87 100644
--- a/drivers/net/mlx5/mlx5_rxtx.h
+++ b/drivers/net/mlx5/mlx5_rxtx.h
@@ -107,6 +107,7 @@ struct rxq_zip {
struct rxq {
unsigned int csum:1; /* Enable checksum offloading. */
unsigned int csum_l2tun:1; /* Same for L2 tunnels. */
+ unsigned int timestamp:1; /* Enable timestamp offloading. */
unsigned int vlan_strip:1; /* Enable VLAN stripping. */
unsigned int crc_present:1; /* CRC must be subtracted. */
unsigned int sges_n:2; /* Log 2 of SGEs (max buffers per packet). */
diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_sse.c b/drivers/net/mlx5/mlx5_rxtx_vec_sse.c
index 8560f74..9f1fd87 100644
--- a/drivers/net/mlx5/mlx5_rxtx_vec_sse.c
+++ b/drivers/net/mlx5/mlx5_rxtx_vec_sse.c
@@ -1214,6 +1214,20 @@ rxq_burst_v(struct rxq *rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
rxq->pending_err |= !!_mm_cvtsi128_si64(opcode);
/* D.5 fill in mbuf - rearm_data and packet_type. */
rxq_cq_to_ptype_oflags_v(rxq, cqes, opcode, &pkts[pos]);
+ if (rxq->timestamp) {
+ pkts[pos]->timestamp =
+ rte_be_to_cpu_64(cq[pos].timestamp);
+ pkts[pos + 1]->timestamp =
+ rte_be_to_cpu_64(cq[pos + 1].timestamp);
+ pkts[pos + 2]->timestamp =
+ rte_be_to_cpu_64(cq[pos + 2].timestamp);
+ pkts[pos + 3]->timestamp =
+ rte_be_to_cpu_64(cq[pos + 3].timestamp);
+ pkts[pos]->ol_flags |= PKT_RX_TIMESTAMP;
+ pkts[pos + 1]->ol_flags |= PKT_RX_TIMESTAMP;
+ pkts[pos + 2]->ol_flags |= PKT_RX_TIMESTAMP;
+ pkts[pos + 3]->ol_flags |= PKT_RX_TIMESTAMP;
+ }
#ifdef MLX5_PMD_SOFT_COUNTERS
/* Add up received bytes count. */
byte_cnt = _mm_shuffle_epi8(op_own, len_shuf_mask);
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [dpdk-dev] [PATCH 3/3] net/mlx5: add hardware timestamp
2017-08-22 13:46 ` [dpdk-dev] [PATCH 3/3] net/mlx5: add hardware timestamp Raslan Darawsheh
@ 2017-08-23 15:02 ` Nélio Laranjeiro
2017-08-24 7:46 ` [dpdk-dev] [PATCH v2 1/3] ethdev: expose Rx " Raslan Darawsheh
1 sibling, 0 replies; 51+ messages in thread
From: Nélio Laranjeiro @ 2017-08-23 15:02 UTC (permalink / raw)
To: Raslan Darawsheh; +Cc: thomas, jingjing.wu, dev, adrien.mazarguil
On Tue, Aug 22, 2017 at 04:46:10PM +0300, Raslan Darawsheh wrote:
> Expose a new capapilty of Rx hw timestamp and
> added new device args to enable it hw_timestamp.
> It will add the raw hw timestamp into the packets.
>
> Its expected that it will lower down the performance since using it
> will disable the cqe comprission, and will add extra checkes in
> the vec rx path.
>
> Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
The new parameter should be documented in the NIC documentation.
Thanks,
--
Nélio Laranjeiro
6WIND
^ permalink raw reply [flat|nested] 51+ messages in thread
* [dpdk-dev] [PATCH v2 1/3] ethdev: expose Rx hardware timestamp
2017-08-22 13:46 ` [dpdk-dev] [PATCH 3/3] net/mlx5: add hardware timestamp Raslan Darawsheh
2017-08-23 15:02 ` Nélio Laranjeiro
@ 2017-08-24 7:46 ` Raslan Darawsheh
2017-08-24 7:46 ` [dpdk-dev] [PATCH v2 2/3] app/testpmd: add Rx timestamp in testpmd Raslan Darawsheh
` (4 more replies)
1 sibling, 5 replies; 51+ messages in thread
From: Raslan Darawsheh @ 2017-08-24 7:46 UTC (permalink / raw)
To: thomas, jingjing.wu, dev, nelio.laranjeiro, adrien.mazarguil
Added new capability to the list of rx offloads for hw timestamp
The PMDs how expose this capability will always have it enabled.
But, if the following API got accepted applications can choose
between disable/enable this API.
http://dpdk.org/dev/patchwork/patch/27470/
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
---
lib/librte_ether/rte_ethdev.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h
index 0adf327..cc5d281 100644
--- a/lib/librte_ether/rte_ethdev.h
+++ b/lib/librte_ether/rte_ethdev.h
@@ -907,6 +907,8 @@ struct rte_eth_conf {
#define DEV_RX_OFFLOAD_QINQ_STRIP 0x00000020
#define DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM 0x00000040
#define DEV_RX_OFFLOAD_MACSEC_STRIP 0x00000080
+#define DEV_RX_OFFLOAD_TIMESTAMP 0x00000100
+/**< Device puts raw timestamp in mbuf. */
/**
* TX offload capabilities of a device.
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* [dpdk-dev] [PATCH v2 2/3] app/testpmd: add Rx timestamp in testpmd
2017-08-24 7:46 ` [dpdk-dev] [PATCH v2 1/3] ethdev: expose Rx " Raslan Darawsheh
@ 2017-08-24 7:46 ` Raslan Darawsheh
2017-08-24 13:49 ` Nélio Laranjeiro
2017-08-24 7:46 ` [dpdk-dev] [PATCH v2 3/3] net/mlx5: add hardware timestamp Raslan Darawsheh
` (3 subsequent siblings)
4 siblings, 1 reply; 51+ messages in thread
From: Raslan Darawsheh @ 2017-08-24 7:46 UTC (permalink / raw)
To: thomas, jingjing.wu, dev, nelio.laranjeiro, adrien.mazarguil
Added new print in case a PMD exposes Rx timestamp.
Also, added a print for timestamp value in rxonly mode
in case the packet was timestamped.
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
---
app/test-pmd/config.c | 3 +++
app/test-pmd/rxonly.c | 2 ++
2 files changed, 5 insertions(+)
diff --git a/app/test-pmd/config.c b/app/test-pmd/config.c
index 3ae3e1c..8a5da5d 100644
--- a/app/test-pmd/config.c
+++ b/app/test-pmd/config.c
@@ -598,6 +598,9 @@ port_offload_cap_display(portid_t port_id)
printf("off\n");
}
+ if (dev_info.rx_offload_capa & DEV_RX_OFFLOAD_TIMESTAMP)
+ printf("HW timestamp: on\n");
+
if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_QINQ_INSERT) {
printf("Double VLANs insert: ");
if (ports[port_id].tx_ol_flags &
diff --git a/app/test-pmd/rxonly.c b/app/test-pmd/rxonly.c
index 5ef0219..f4d35d7 100644
--- a/app/test-pmd/rxonly.c
+++ b/app/test-pmd/rxonly.c
@@ -158,6 +158,8 @@ pkt_burst_receive(struct fwd_stream *fs)
printf("hash=0x%x ID=0x%x ",
mb->hash.fdir.hash, mb->hash.fdir.id);
}
+ if (ol_flags & PKT_RX_TIMESTAMP)
+ printf(" - timestamp %lu ", mb->timestamp);
if (ol_flags & PKT_RX_VLAN_STRIPPED)
printf(" - VLAN tci=0x%x", mb->vlan_tci);
if (ol_flags & PKT_RX_QINQ_STRIPPED)
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* [dpdk-dev] [PATCH v2 3/3] net/mlx5: add hardware timestamp
2017-08-24 7:46 ` [dpdk-dev] [PATCH v2 1/3] ethdev: expose Rx " Raslan Darawsheh
2017-08-24 7:46 ` [dpdk-dev] [PATCH v2 2/3] app/testpmd: add Rx timestamp in testpmd Raslan Darawsheh
@ 2017-08-24 7:46 ` Raslan Darawsheh
2017-08-24 14:01 ` Nélio Laranjeiro
2017-08-24 13:47 ` [dpdk-dev] [PATCH v2 1/3] ethdev: expose Rx " Nélio Laranjeiro
` (2 subsequent siblings)
4 siblings, 1 reply; 51+ messages in thread
From: Raslan Darawsheh @ 2017-08-24 7:46 UTC (permalink / raw)
To: thomas, jingjing.wu, dev, nelio.laranjeiro, adrien.mazarguil
Expose a new capapilty of Rx hw timestamp and
added new device args to enable it hw_timestamp.
It will add the raw hw timestamp into the packets.
Its expected that it will lower down the performance since using it
will disable the cqe comprission, and will add extra checkes in
the vec rx path.
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
---
doc/guides/nics/mlx5.rst | 5 +++++
drivers/net/mlx5/mlx5.c | 23 +++++++++++++++++++++++
drivers/net/mlx5/mlx5.h | 1 +
drivers/net/mlx5/mlx5_ethdev.c | 3 ++-
drivers/net/mlx5/mlx5_rxq.c | 3 +++
drivers/net/mlx5/mlx5_rxtx.c | 5 +++++
drivers/net/mlx5/mlx5_rxtx.h | 3 ++-
drivers/net/mlx5/mlx5_rxtx_vec_sse.c | 13 ++++++++++++-
8 files changed, 53 insertions(+), 3 deletions(-)
diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index f4cb18b..7dbd844 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -268,6 +268,11 @@ Run-time configuration
Enabled by default.
+- ``rx_timestamp`` parameter [int]
+
+ A nonzero value enables Rx timestamp.
+ When hw timestamp is enabled, packets will have raw hw timestamp.
+
Prerequisites
-------------
diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index b7e5046..4b3a3ab 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -94,6 +94,9 @@
/* Device parameter to enable hardware TSO offload. */
#define MLX5_TSO "tso"
+/* Device parameter to enable hardware timestamp offload. */
+#define MLX5_RX_TIMESTAMP "rx_timestamp"
+
/* Device parameter to enable hardware Tx vector. */
#define MLX5_TX_VEC_EN "tx_vec_en"
@@ -113,6 +116,7 @@ struct mlx5_args {
int tso;
int tx_vec_en;
int rx_vec_en;
+ int hw_timestamp;
};
/**
* Retrieve integer value from environment variable.
@@ -336,6 +340,8 @@ mlx5_args_check(const char *key, const char *val, void *opaque)
args->tx_vec_en = !!tmp;
} else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
args->rx_vec_en = !!tmp;
+ } else if (strcmp(MLX5_RX_TIMESTAMP, key) == 0) {
+ args->hw_timestamp = !!tmp;
} else {
WARN("%s: unknown parameter", key);
return -EINVAL;
@@ -367,6 +373,7 @@ mlx5_args(struct mlx5_args *args, struct rte_devargs *devargs)
MLX5_TSO,
MLX5_TX_VEC_EN,
MLX5_RX_VEC_EN,
+ MLX5_RX_TIMESTAMP,
NULL,
};
struct rte_kvargs *kvlist;
@@ -426,6 +433,8 @@ mlx5_args_assign(struct priv *priv, struct mlx5_args *args)
priv->tx_vec_en = args->tx_vec_en;
if (args->rx_vec_en != MLX5_ARG_UNSET)
priv->rx_vec_en = args->rx_vec_en;
+ if (args->hw_timestamp != MLX5_ARG_UNSET)
+ priv->hw_timestamp = args->hw_timestamp;
}
/**
@@ -573,6 +582,7 @@ mlx5_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
.tso = MLX5_ARG_UNSET,
.tx_vec_en = MLX5_ARG_UNSET,
.rx_vec_en = MLX5_ARG_UNSET,
+ .hw_timestamp = MLX5_ARG_UNSET,
};
exp_device_attr.comp_mask =
@@ -581,6 +591,7 @@ mlx5_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
IBV_EXP_DEVICE_ATTR_VLAN_OFFLOADS |
IBV_EXP_DEVICE_ATTR_RX_PAD_END_ALIGN |
IBV_EXP_DEVICE_ATTR_TSO_CAPS |
+ IBV_EXP_DEVICE_ATTR_WITH_TIMESTAMP_MASK |
0;
DEBUG("using port %u (%08" PRIx32 ")", port, test);
@@ -662,6 +673,18 @@ mlx5_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
IBV_EXP_DEVICE_VXLAN_SUPPORT);
DEBUG("L2 tunnel checksum offloads are %ssupported",
(priv->hw_csum_l2tun ? "" : "not "));
+ if (priv->hw_timestamp) {
+ priv->hw_timestamp =
+ (exp_device_attr.comp_mask |
+ IBV_EXP_DEVICE_ATTR_WITH_TIMESTAMP_MASK);
+ DEBUG("Timestamping offload is %ssupported",
+ (priv->hw_timestamp ? "" : "not "));
+ priv->cqe_comp = (priv->hw_timestamp ?
+ 0 : priv->cqe_comp);
+ DEBUG("%s",
+ (priv->hw_timestamp ?
+ "cqe compression is disabled" : ""));
+ }
priv->ind_table_max_size = exp_device_attr.rx_hash_caps.max_rwq_indirection_table_size;
/* Remove this check once DPDK supports larger/variable
diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index 43c5384..4d19351 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -120,6 +120,7 @@ struct priv {
unsigned int allmulti_req:1; /* All multicast mode requested. */
unsigned int hw_csum:1; /* Checksum offload is supported. */
unsigned int hw_csum_l2tun:1; /* Same for L2 tunnels. */
+ unsigned int hw_timestamp:1; /* rx timestamp offload is supported. */
unsigned int hw_vlan_strip:1; /* VLAN stripping is supported. */
unsigned int hw_fcs_strip:1; /* FCS stripping is supported. */
unsigned int hw_padding:1; /* End alignment padding is supported. */
diff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c
index b0eb3cd..1942de7 100644
--- a/drivers/net/mlx5/mlx5_ethdev.c
+++ b/drivers/net/mlx5/mlx5_ethdev.c
@@ -686,7 +686,8 @@ mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
DEV_RX_OFFLOAD_UDP_CKSUM |
DEV_RX_OFFLOAD_TCP_CKSUM) :
0) |
- (priv->hw_vlan_strip ? DEV_RX_OFFLOAD_VLAN_STRIP : 0);
+ (priv->hw_vlan_strip ? DEV_RX_OFFLOAD_VLAN_STRIP : 0) |
+ (priv->hw_timestamp ? DEV_RX_OFFLOAD_TIMESTAMP : 0);
if (!priv->mps)
info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT;
if (priv->hw_csum)
diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c
index 74387a7..c8ccde2 100644
--- a/drivers/net/mlx5/mlx5_rxq.c
+++ b/drivers/net/mlx5/mlx5_rxq.c
@@ -929,6 +929,7 @@ rxq_ctrl_setup(struct rte_eth_dev *dev, struct rxq_ctrl *rxq_ctrl,
if (priv->hw_csum_l2tun)
tmpl.rxq.csum_l2tun =
!!dev->data->dev_conf.rxmode.hw_ip_checksum;
+ tmpl.rxq.timestamp = priv->hw_timestamp;
/* Use the entire RX mempool as the memory region. */
tmpl.mr = mlx5_mp2mr(priv->pd, mp);
if (tmpl.mr == NULL) {
@@ -950,6 +951,8 @@ rxq_ctrl_setup(struct rte_eth_dev *dev, struct rxq_ctrl *rxq_ctrl,
attr.cq = (struct ibv_exp_cq_init_attr){
.comp_mask = 0,
};
+ if (priv->hw_timestamp)
+ attr.cq.flags |= IBV_EXP_CQ_TIMESTAMP;
if (priv->cqe_comp) {
attr.cq.comp_mask |= IBV_EXP_CQ_INIT_ATTR_FLAGS;
attr.cq.flags |= IBV_EXP_CQ_COMPRESSED_CQE;
diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c
index b07bcd1..47344f2 100644
--- a/drivers/net/mlx5/mlx5_rxtx.c
+++ b/drivers/net/mlx5/mlx5_rxtx.c
@@ -1865,6 +1865,11 @@ mlx5_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
PKT_RX_VLAN_STRIPPED;
pkt->vlan_tci = ntohs(cqe->vlan_info);
}
+ if (rxq->timestamp) {
+ pkt->timestamp =
+ rte_be_to_cpu_64(cqe->timestamp);
+ pkt->ol_flags |= PKT_RX_TIMESTAMP;
+ }
if (rxq->crc_present)
len -= ETHER_CRC_LEN;
PKT_LEN(pkt) = len;
diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h
index 7de1d10..05d750b 100644
--- a/drivers/net/mlx5/mlx5_rxtx.h
+++ b/drivers/net/mlx5/mlx5_rxtx.h
@@ -107,6 +107,7 @@ struct rxq_zip {
struct rxq {
unsigned int csum:1; /* Enable checksum offloading. */
unsigned int csum_l2tun:1; /* Same for L2 tunnels. */
+ unsigned int timestamp:1; /* Enable timestamp offloading. */
unsigned int vlan_strip:1; /* Enable VLAN stripping. */
unsigned int crc_present:1; /* CRC must be subtracted. */
unsigned int sges_n:2; /* Log 2 of SGEs (max buffers per packet). */
@@ -117,7 +118,7 @@ struct rxq {
unsigned int mark:1; /* Marked flow available on the queue. */
unsigned int pending_err:1; /* CQE error needs to be handled. */
unsigned int trim_elts:1; /* Whether elts needs clean-up. */
- unsigned int :6; /* Remaining bits. */
+ unsigned int :5; /* Remaining bits. */
volatile uint32_t *rq_db;
volatile uint32_t *cq_db;
uint16_t rq_ci;
diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_sse.c b/drivers/net/mlx5/mlx5_rxtx_vec_sse.c
index 8560f74..8b25578 100644
--- a/drivers/net/mlx5/mlx5_rxtx_vec_sse.c
+++ b/drivers/net/mlx5/mlx5_rxtx_vec_sse.c
@@ -752,7 +752,8 @@ rxq_cq_to_ptype_oflags_v(struct rxq *rxq, __m128i cqes[4], __m128i op_err,
{
__m128i pinfo0, pinfo1;
__m128i pinfo, ptype;
- __m128i ol_flags = _mm_set1_epi32(rxq->rss_hash * PKT_RX_RSS_HASH);
+ __m128i ol_flags = _mm_set1_epi32(rxq->rss_hash * PKT_RX_RSS_HASH |
+ rxq->timestamp * PKT_RX_TIMESTAMP);
__m128i cv_flags;
const __m128i zero = _mm_setzero_si128();
const __m128i ptype_mask =
@@ -1214,6 +1215,16 @@ rxq_burst_v(struct rxq *rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
rxq->pending_err |= !!_mm_cvtsi128_si64(opcode);
/* D.5 fill in mbuf - rearm_data and packet_type. */
rxq_cq_to_ptype_oflags_v(rxq, cqes, opcode, &pkts[pos]);
+ if (rxq->timestamp) {
+ pkts[pos]->timestamp =
+ rte_be_to_cpu_64(cq[pos].timestamp);
+ pkts[pos + 1]->timestamp =
+ rte_be_to_cpu_64(cq[pos + 1].timestamp);
+ pkts[pos + 2]->timestamp =
+ rte_be_to_cpu_64(cq[pos + 2].timestamp);
+ pkts[pos + 3]->timestamp =
+ rte_be_to_cpu_64(cq[pos + 3].timestamp);
+ }
#ifdef MLX5_PMD_SOFT_COUNTERS
/* Add up received bytes count. */
byte_cnt = _mm_shuffle_epi8(op_own, len_shuf_mask);
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [dpdk-dev] [PATCH v2 1/3] ethdev: expose Rx hardware timestamp
2017-08-24 7:46 ` [dpdk-dev] [PATCH v2 1/3] ethdev: expose Rx " Raslan Darawsheh
2017-08-24 7:46 ` [dpdk-dev] [PATCH v2 2/3] app/testpmd: add Rx timestamp in testpmd Raslan Darawsheh
2017-08-24 7:46 ` [dpdk-dev] [PATCH v2 3/3] net/mlx5: add hardware timestamp Raslan Darawsheh
@ 2017-08-24 13:47 ` Nélio Laranjeiro
2017-09-28 16:48 ` [dpdk-dev] [PATCH v3 1/3] ethdev: add Rx HW timestamp capability Raslan Darawsheh
2017-10-02 14:01 ` [dpdk-dev] [PATCH " Raslan Darawsheh
4 siblings, 0 replies; 51+ messages in thread
From: Nélio Laranjeiro @ 2017-08-24 13:47 UTC (permalink / raw)
To: Raslan Darawsheh; +Cc: thomas, jingjing.wu, dev, adrien.mazarguil
On Thu, Aug 24, 2017 at 10:46:31AM +0300, Raslan Darawsheh wrote:
> Added new capability to the list of rx offloads for hw timestamp
>
> The PMDs how expose this capability will always have it enabled.
Not sure this comment is accurate, Rx offloads are application request, PMD
does not have to enable it by default.
> But, if the following API got accepted applications can choose
> between disable/enable this API.
> http://dpdk.org/dev/patchwork/patch/27470/
>
> Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
> ---
> lib/librte_ether/rte_ethdev.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h
> index 0adf327..cc5d281 100644
> --- a/lib/librte_ether/rte_ethdev.h
> +++ b/lib/librte_ether/rte_ethdev.h
> @@ -907,6 +907,8 @@ struct rte_eth_conf {
> #define DEV_RX_OFFLOAD_QINQ_STRIP 0x00000020
> #define DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM 0x00000040
> #define DEV_RX_OFFLOAD_MACSEC_STRIP 0x00000080
> +#define DEV_RX_OFFLOAD_TIMESTAMP 0x00000100
> +/**< Device puts raw timestamp in mbuf. */
>
> /**
> * TX offload capabilities of a device.
> --
> 2.7.4
--
Nélio Laranjeiro
6WIND
^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [dpdk-dev] [PATCH v2 2/3] app/testpmd: add Rx timestamp in testpmd
2017-08-24 7:46 ` [dpdk-dev] [PATCH v2 2/3] app/testpmd: add Rx timestamp in testpmd Raslan Darawsheh
@ 2017-08-24 13:49 ` Nélio Laranjeiro
0 siblings, 0 replies; 51+ messages in thread
From: Nélio Laranjeiro @ 2017-08-24 13:49 UTC (permalink / raw)
To: Raslan Darawsheh; +Cc: thomas, jingjing.wu, dev, adrien.mazarguil
On Thu, Aug 24, 2017 at 10:46:32AM +0300, Raslan Darawsheh wrote:
> Added new print in case a PMD exposes Rx timestamp.
> Also, added a print for timestamp value in rxonly mode
> in case the packet was timestamped.
>
> Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
> ---
> app/test-pmd/config.c | 3 +++
> app/test-pmd/rxonly.c | 2 ++
> 2 files changed, 5 insertions(+)
>
> diff --git a/app/test-pmd/config.c b/app/test-pmd/config.c
> index 3ae3e1c..8a5da5d 100644
> --- a/app/test-pmd/config.c
> +++ b/app/test-pmd/config.c
> @@ -598,6 +598,9 @@ port_offload_cap_display(portid_t port_id)
> printf("off\n");
> }
>
> + if (dev_info.rx_offload_capa & DEV_RX_OFFLOAD_TIMESTAMP)
> + printf("HW timestamp: on\n");
> +
> if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_QINQ_INSERT) {
> printf("Double VLANs insert: ");
> if (ports[port_id].tx_ol_flags &
> diff --git a/app/test-pmd/rxonly.c b/app/test-pmd/rxonly.c
> index 5ef0219..f4d35d7 100644
> --- a/app/test-pmd/rxonly.c
> +++ b/app/test-pmd/rxonly.c
> @@ -158,6 +158,8 @@ pkt_burst_receive(struct fwd_stream *fs)
> printf("hash=0x%x ID=0x%x ",
> mb->hash.fdir.hash, mb->hash.fdir.id);
> }
> + if (ol_flags & PKT_RX_TIMESTAMP)
> + printf(" - timestamp %lu ", mb->timestamp);
> if (ol_flags & PKT_RX_VLAN_STRIPPED)
> printf(" - VLAN tci=0x%x", mb->vlan_tci);
> if (ol_flags & PKT_RX_QINQ_STRIPPED)
> --
> 2.7.4
How can we enable this Rx offload?
Thanks,
--
Nélio Laranjeiro
6WIND
^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [dpdk-dev] [PATCH v2 3/3] net/mlx5: add hardware timestamp
2017-08-24 7:46 ` [dpdk-dev] [PATCH v2 3/3] net/mlx5: add hardware timestamp Raslan Darawsheh
@ 2017-08-24 14:01 ` Nélio Laranjeiro
0 siblings, 0 replies; 51+ messages in thread
From: Nélio Laranjeiro @ 2017-08-24 14:01 UTC (permalink / raw)
To: Raslan Darawsheh; +Cc: thomas, jingjing.wu, dev, adrien.mazarguil
On Thu, Aug 24, 2017 at 10:46:33AM +0300, Raslan Darawsheh wrote:
> Expose a new capapilty of Rx hw timestamp and
> added new device args to enable it hw_timestamp.
> It will add the raw hw timestamp into the packets.
>
> Its expected that it will lower down the performance since using it
> will disable the cqe comprission, and will add extra checkes in
> the vec rx path.
>
> Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
> ---
> doc/guides/nics/mlx5.rst | 5 +++++
> drivers/net/mlx5/mlx5.c | 23 +++++++++++++++++++++++
> drivers/net/mlx5/mlx5.h | 1 +
> drivers/net/mlx5/mlx5_ethdev.c | 3 ++-
> drivers/net/mlx5/mlx5_rxq.c | 3 +++
> drivers/net/mlx5/mlx5_rxtx.c | 5 +++++
> drivers/net/mlx5/mlx5_rxtx.h | 3 ++-
> drivers/net/mlx5/mlx5_rxtx_vec_sse.c | 13 ++++++++++++-
> 8 files changed, 53 insertions(+), 3 deletions(-)
It is strange to enable/disable this single offload again the application
request. Why do you need such behavior?
Another point I don't seen any code to retrieve this offloads request from the
port configuration as for the others. It is expected in the new revision?
Thanks,
--
Nélio Laranjeiro
6WIND
^ permalink raw reply [flat|nested] 51+ messages in thread
* [dpdk-dev] [PATCH v3 1/3] ethdev: add Rx HW timestamp capability
2017-08-24 7:46 ` [dpdk-dev] [PATCH v2 1/3] ethdev: expose Rx " Raslan Darawsheh
` (2 preceding siblings ...)
2017-08-24 13:47 ` [dpdk-dev] [PATCH v2 1/3] ethdev: expose Rx " Nélio Laranjeiro
@ 2017-09-28 16:48 ` Raslan Darawsheh
2017-09-28 16:48 ` [dpdk-dev] [PATCH v3 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
` (5 more replies)
2017-10-02 14:01 ` [dpdk-dev] [PATCH " Raslan Darawsheh
4 siblings, 6 replies; 51+ messages in thread
From: Raslan Darawsheh @ 2017-09-28 16:48 UTC (permalink / raw)
To: dev; +Cc: yskoh
Add a new offload capability flag for Rx HW timestamp and enabling/disabling
this via rte_eth_rxmode.
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
---
lib/librte_ether/rte_ethdev.h | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h
index 0adf327..b8f3e16 100644
--- a/lib/librte_ether/rte_ethdev.h
+++ b/lib/librte_ether/rte_ethdev.h
@@ -357,7 +357,8 @@ struct rte_eth_rxmode {
jumbo_frame : 1, /**< Jumbo Frame Receipt enable. */
hw_strip_crc : 1, /**< Enable CRC stripping by hardware. */
enable_scatter : 1, /**< Enable scatter packets rx handler */
- enable_lro : 1; /**< Enable LRO */
+ enable_lro : 1, /**< Enable LRO */
+ hw_timestamp : 1; /**< Enable HW timestamp */
};
/**
@@ -907,6 +908,8 @@ struct rte_eth_conf {
#define DEV_RX_OFFLOAD_QINQ_STRIP 0x00000020
#define DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM 0x00000040
#define DEV_RX_OFFLOAD_MACSEC_STRIP 0x00000080
+#define DEV_RX_OFFLOAD_TIMESTAMP 0x00000100
+/**< Device delivers timestamp of packet arrival. */
/**
* TX offload capabilities of a device.
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* [dpdk-dev] [PATCH v3 2/3] app/testpmd: add Rx HW timestamp
2017-09-28 16:48 ` [dpdk-dev] [PATCH v3 1/3] ethdev: add Rx HW timestamp capability Raslan Darawsheh
@ 2017-09-28 16:48 ` Raslan Darawsheh
2017-09-28 16:48 ` [dpdk-dev] [PATCH v3 3/3] net/mlx5: " Raslan Darawsheh
` (4 subsequent siblings)
5 siblings, 0 replies; 51+ messages in thread
From: Raslan Darawsheh @ 2017-09-28 16:48 UTC (permalink / raw)
To: dev; +Cc: yskoh
Add enabling/disabling Rx HW timestamp from command line and parameter.
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
---
app/test-pmd/cmdline.c | 15 ++++++++++++---
app/test-pmd/config.c | 8 ++++++++
app/test-pmd/parameters.c | 5 +++++
app/test-pmd/rxonly.c | 2 ++
app/test-pmd/testpmd.c | 1 +
5 files changed, 28 insertions(+), 3 deletions(-)
diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index 0144191..faacd92 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -675,7 +675,7 @@ static void cmd_help_long_parsed(void *parsed_result,
"port config all max-pkt-len (value)\n"
" Set the max packet length.\n\n"
- "port config all (crc-strip|scatter|rx-cksum|hw-vlan|hw-vlan-filter|"
+ "port config all (crc-strip|scatter|rx-cksum|rx-timestamp|hw-vlan|hw-vlan-filter|"
"hw-vlan-strip|hw-vlan-extend|drop-en)"
" (on|off)\n"
" Set crc-strip/scatter/rx-checksum/hardware-vlan/drop_en"
@@ -1584,6 +1584,15 @@ cmd_config_rx_mode_flag_parsed(void *parsed_result,
printf("Unknown parameter\n");
return;
}
+ } else if (!strcmp(res->name, "rx-timestamp")) {
+ if (!strcmp(res->value, "on"))
+ rx_mode.hw_timestamp = 1;
+ else if (!strcmp(res->value, "off"))
+ rx_mode.hw_timestamp = 0;
+ else {
+ printf("Unknown parameter\n");
+ return;
+ }
} else if (!strcmp(res->name, "hw-vlan")) {
if (!strcmp(res->value, "on")) {
rx_mode.hw_vlan_filter = 1;
@@ -1652,7 +1661,7 @@ cmdline_parse_token_string_t cmd_config_rx_mode_flag_all =
TOKEN_STRING_INITIALIZER(struct cmd_config_rx_mode_flag, all, "all");
cmdline_parse_token_string_t cmd_config_rx_mode_flag_name =
TOKEN_STRING_INITIALIZER(struct cmd_config_rx_mode_flag, name,
- "crc-strip#scatter#rx-cksum#hw-vlan#"
+ "crc-strip#scatter#rx-cksum#rx-timestamp#hw-vlan#"
"hw-vlan-filter#hw-vlan-strip#hw-vlan-extend");
cmdline_parse_token_string_t cmd_config_rx_mode_flag_value =
TOKEN_STRING_INITIALIZER(struct cmd_config_rx_mode_flag, value,
@@ -1661,7 +1670,7 @@ cmdline_parse_token_string_t cmd_config_rx_mode_flag_value =
cmdline_parse_inst_t cmd_config_rx_mode_flag = {
.f = cmd_config_rx_mode_flag_parsed,
.data = NULL,
- .help_str = "port config all crc-strip|scatter|rx-cksum|hw-vlan|"
+ .help_str = "port config all crc-strip|scatter|rx-cksum|rx-timestamp|hw-vlan|"
"hw-vlan-filter|hw-vlan-strip|hw-vlan-extend on|off",
.tokens = {
(void *)&cmd_config_rx_mode_flag_port,
diff --git a/app/test-pmd/config.c b/app/test-pmd/config.c
index 3ae3e1c..6c644e9 100644
--- a/app/test-pmd/config.c
+++ b/app/test-pmd/config.c
@@ -598,6 +598,14 @@ port_offload_cap_display(portid_t port_id)
printf("off\n");
}
+ if (dev_info.rx_offload_capa & DEV_RX_OFFLOAD_TIMESTAMP) {
+ printf("HW timestamp: ");
+ if (dev->data->dev_conf.rxmode.hw_timestamp)
+ printf("on\n");
+ else
+ printf("off\n");
+ }
+
if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_QINQ_INSERT) {
printf("Double VLANs insert: ");
if (ports[port_id].tx_ol_flags &
diff --git a/app/test-pmd/parameters.c b/app/test-pmd/parameters.c
index 2f7f70f..602d98d 100644
--- a/app/test-pmd/parameters.c
+++ b/app/test-pmd/parameters.c
@@ -162,6 +162,7 @@ usage(char* progname)
printf(" --disable-crc-strip: disable CRC stripping by hardware.\n");
printf(" --enable-lro: enable large receive offload.\n");
printf(" --enable-rx-cksum: enable rx hardware checksum offload.\n");
+ printf(" --enable-rx-timestamp: enable rx hardware timestamp offload.\n");
printf(" --disable-hw-vlan: disable hardware vlan.\n");
printf(" --disable-hw-vlan-filter: disable hardware vlan filter.\n");
printf(" --disable-hw-vlan-strip: disable hardware vlan strip.\n");
@@ -601,6 +602,7 @@ launch_args_parse(int argc, char** argv)
{ "disable-crc-strip", 0, 0, 0 },
{ "enable-lro", 0, 0, 0 },
{ "enable-rx-cksum", 0, 0, 0 },
+ { "enable-rx-timestamp", 0, 0, 0 },
{ "enable-scatter", 0, 0, 0 },
{ "disable-hw-vlan", 0, 0, 0 },
{ "disable-hw-vlan-filter", 0, 0, 0 },
@@ -899,6 +901,9 @@ launch_args_parse(int argc, char** argv)
rx_mode.enable_scatter = 1;
if (!strcmp(lgopts[opt_idx].name, "enable-rx-cksum"))
rx_mode.hw_ip_checksum = 1;
+ if (!strcmp(lgopts[opt_idx].name,
+ "enable-rx-timestamp"))
+ rx_mode.hw_timestamp = 1;
if (!strcmp(lgopts[opt_idx].name, "disable-hw-vlan")) {
rx_mode.hw_vlan_filter = 0;
diff --git a/app/test-pmd/rxonly.c b/app/test-pmd/rxonly.c
index 5ef0219..f4d35d7 100644
--- a/app/test-pmd/rxonly.c
+++ b/app/test-pmd/rxonly.c
@@ -158,6 +158,8 @@ pkt_burst_receive(struct fwd_stream *fs)
printf("hash=0x%x ID=0x%x ",
mb->hash.fdir.hash, mb->hash.fdir.id);
}
+ if (ol_flags & PKT_RX_TIMESTAMP)
+ printf(" - timestamp %lu ", mb->timestamp);
if (ol_flags & PKT_RX_VLAN_STRIPPED)
printf(" - VLAN tci=0x%x", mb->vlan_tci);
if (ol_flags & PKT_RX_QINQ_STRIPPED)
diff --git a/app/test-pmd/testpmd.c b/app/test-pmd/testpmd.c
index 7d40139..cddbc3f 100644
--- a/app/test-pmd/testpmd.c
+++ b/app/test-pmd/testpmd.c
@@ -339,6 +339,7 @@ struct rte_eth_rxmode rx_mode = {
.hw_vlan_extend = 0, /**< Extended VLAN disabled. */
.jumbo_frame = 0, /**< Jumbo Frame Support disabled. */
.hw_strip_crc = 1, /**< CRC stripping by hardware enabled. */
+ .hw_timestamp = 0, /**< HW timestamp enabled. */
};
struct rte_fdir_conf fdir_conf = {
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* [dpdk-dev] [PATCH v3 3/3] net/mlx5: add Rx HW timestamp
2017-09-28 16:48 ` [dpdk-dev] [PATCH v3 1/3] ethdev: add Rx HW timestamp capability Raslan Darawsheh
2017-09-28 16:48 ` [dpdk-dev] [PATCH v3 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
@ 2017-09-28 16:48 ` Raslan Darawsheh
2017-09-29 7:25 ` [dpdk-dev] [PATCH v3 1/3] ethdev: add Rx HW timestamp capability Andrew Rybchenko
` (3 subsequent siblings)
5 siblings, 0 replies; 51+ messages in thread
From: Raslan Darawsheh @ 2017-09-28 16:48 UTC (permalink / raw)
To: dev; +Cc: yskoh
Expose Rx HW timestamp to packet mbufs.
Signed-off-by :Raslan Darawsheh <rasland@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
---
drivers/net/mlx5/mlx5_ethdev.c | 3 ++-
drivers/net/mlx5/mlx5_rxq.c | 6 +++++-
drivers/net/mlx5/mlx5_rxtx.c | 5 +++++
drivers/net/mlx5/mlx5_rxtx.h | 3 ++-
drivers/net/mlx5/mlx5_rxtx_vec_sse.c | 13 ++++++++++++-
5 files changed, 26 insertions(+), 4 deletions(-)
diff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c
index 6f17a95..f5fc7d6 100644
--- a/drivers/net/mlx5/mlx5_ethdev.c
+++ b/drivers/net/mlx5/mlx5_ethdev.c
@@ -674,7 +674,8 @@ mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
DEV_RX_OFFLOAD_UDP_CKSUM |
DEV_RX_OFFLOAD_TCP_CKSUM) :
0) |
- (priv->hw_vlan_strip ? DEV_RX_OFFLOAD_VLAN_STRIP : 0);
+ (priv->hw_vlan_strip ? DEV_RX_OFFLOAD_VLAN_STRIP : 0) |
+ DEV_RX_OFFLOAD_TIMESTAMP;
if (!priv->mps)
info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT;
if (priv->hw_csum)
diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c
index 22448c9..77e980b 100644
--- a/drivers/net/mlx5/mlx5_rxq.c
+++ b/drivers/net/mlx5/mlx5_rxq.c
@@ -930,6 +930,8 @@ rxq_ctrl_setup(struct rte_eth_dev *dev, struct rxq_ctrl *rxq_ctrl,
if (priv->hw_csum_l2tun)
tmpl.rxq.csum_l2tun =
!!dev->data->dev_conf.rxmode.hw_ip_checksum;
+ tmpl.rxq.hw_timestamp =
+ !!dev->data->dev_conf.rxmode.hw_timestamp;
/* Use the entire RX mempool as the memory region. */
tmpl.mr = mlx5_mp2mr(priv->pd, mp);
if (tmpl.mr == NULL) {
@@ -951,7 +953,7 @@ rxq_ctrl_setup(struct rte_eth_dev *dev, struct rxq_ctrl *rxq_ctrl,
attr.cq = (struct ibv_cq_init_attr_ex){
.comp_mask = 0,
};
- if (priv->cqe_comp) {
+ if (priv->cqe_comp && !tmpl.rxq.hw_timestamp) {
attr.cq.comp_mask |= IBV_CQ_INIT_ATTR_MASK_FLAGS;
attr.cq.flags |= MLX5DV_CQ_INIT_ATTR_MASK_COMPRESSED_CQE;
/*
@@ -960,6 +962,8 @@ rxq_ctrl_setup(struct rte_eth_dev *dev, struct rxq_ctrl *rxq_ctrl,
*/
if (rxq_check_vec_support(&tmpl.rxq) < 0)
cqe_n = (desc * 2) - 1; /* Double the number of CQEs. */
+ } else if (priv->cqe_comp && tmpl.rxq.hw_timestamp) {
+ DEBUG("Rx CQE compression is disabled for HW timestamp");
}
tmpl.cq = ibv_create_cq(priv->ctx, cqe_n, NULL, tmpl.channel, 0);
if (tmpl.cq == NULL) {
diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c
index 4808348..3476122 100644
--- a/drivers/net/mlx5/mlx5_rxtx.c
+++ b/drivers/net/mlx5/mlx5_rxtx.c
@@ -1870,6 +1870,11 @@ mlx5_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
pkt->vlan_tci =
rte_be_to_cpu_16(cqe->vlan_info);
}
+ if (rxq->hw_timestamp) {
+ pkt->timestamp =
+ rte_be_to_cpu_64(cqe->timestamp);
+ pkt->ol_flags |= PKT_RX_TIMESTAMP;
+ }
if (rxq->crc_present)
len -= ETHER_CRC_LEN;
PKT_LEN(pkt) = len;
diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h
index e352a1e..2d7b960 100644
--- a/drivers/net/mlx5/mlx5_rxtx.h
+++ b/drivers/net/mlx5/mlx5_rxtx.h
@@ -101,6 +101,7 @@ struct rxq_zip {
struct rxq {
unsigned int csum:1; /* Enable checksum offloading. */
unsigned int csum_l2tun:1; /* Same for L2 tunnels. */
+ unsigned int hw_timestamp:1; /* Enable HW timestamp. */
unsigned int vlan_strip:1; /* Enable VLAN stripping. */
unsigned int crc_present:1; /* CRC must be subtracted. */
unsigned int sges_n:2; /* Log 2 of SGEs (max buffers per packet). */
@@ -110,7 +111,7 @@ struct rxq {
unsigned int rss_hash:1; /* RSS hash result is enabled. */
unsigned int mark:1; /* Marked flow available on the queue. */
unsigned int pending_err:1; /* CQE error needs to be handled. */
- unsigned int :7; /* Remaining bits. */
+ unsigned int :6; /* Remaining bits. */
volatile uint32_t *rq_db;
volatile uint32_t *cq_db;
uint16_t rq_ci;
diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_sse.c b/drivers/net/mlx5/mlx5_rxtx_vec_sse.c
index a7ef17e..ad97cd7 100644
--- a/drivers/net/mlx5/mlx5_rxtx_vec_sse.c
+++ b/drivers/net/mlx5/mlx5_rxtx_vec_sse.c
@@ -744,7 +744,8 @@ rxq_cq_to_ptype_oflags_v(struct rxq *rxq, __m128i cqes[4], __m128i op_err,
{
__m128i pinfo0, pinfo1;
__m128i pinfo, ptype;
- __m128i ol_flags = _mm_set1_epi32(rxq->rss_hash * PKT_RX_RSS_HASH);
+ __m128i ol_flags = _mm_set1_epi32(rxq->rss_hash * PKT_RX_RSS_HASH |
+ rxq->hw_timestamp * PKT_RX_TIMESTAMP);
__m128i cv_flags;
const __m128i zero = _mm_setzero_si128();
const __m128i ptype_mask =
@@ -1206,6 +1207,16 @@ rxq_burst_v(struct rxq *rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
rxq->pending_err |= !!_mm_cvtsi128_si64(opcode);
/* D.5 fill in mbuf - rearm_data and packet_type. */
rxq_cq_to_ptype_oflags_v(rxq, cqes, opcode, &pkts[pos]);
+ if (rxq->hw_timestamp) {
+ pkts[pos]->timestamp =
+ rte_be_to_cpu_64(cq[pos].timestamp);
+ pkts[pos + 1]->timestamp =
+ rte_be_to_cpu_64(cq[pos + p1].timestamp);
+ pkts[pos + 2]->timestamp =
+ rte_be_to_cpu_64(cq[pos + p2].timestamp);
+ pkts[pos + 3]->timestamp =
+ rte_be_to_cpu_64(cq[pos + p3].timestamp);
+ }
#ifdef MLX5_PMD_SOFT_COUNTERS
/* Add up received bytes count. */
byte_cnt = _mm_shuffle_epi8(op_own, len_shuf_mask);
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [dpdk-dev] [PATCH v3 1/3] ethdev: add Rx HW timestamp capability
2017-09-28 16:48 ` [dpdk-dev] [PATCH v3 1/3] ethdev: add Rx HW timestamp capability Raslan Darawsheh
2017-09-28 16:48 ` [dpdk-dev] [PATCH v3 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
2017-09-28 16:48 ` [dpdk-dev] [PATCH v3 3/3] net/mlx5: " Raslan Darawsheh
@ 2017-09-29 7:25 ` Andrew Rybchenko
2017-10-01 6:44 ` Shahaf Shuler
2017-10-02 14:50 ` [dpdk-dev] [PATCH " Raslan Darawsheh
` (2 subsequent siblings)
5 siblings, 1 reply; 51+ messages in thread
From: Andrew Rybchenko @ 2017-09-29 7:25 UTC (permalink / raw)
To: Raslan Darawsheh, dev; +Cc: yskoh, Shahaf Shuler
On 09/28/2017 07:48 PM, Raslan Darawsheh wrote:
> Add a new offload capability flag for Rx HW timestamp and enabling/disabling
> this via rte_eth_rxmode.
I think it should be on top [1] and ideally follow a new offload API without
addition of a new bit field which will be removed soon.
Also, please, update documentation (doc/guides/nics/features.rst)
Andrew.
[1] http://dpdk.org/ml/archives/dev/2017-September/076872.html
^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [dpdk-dev] [PATCH v3 1/3] ethdev: add Rx HW timestamp capability
2017-09-29 7:25 ` [dpdk-dev] [PATCH v3 1/3] ethdev: add Rx HW timestamp capability Andrew Rybchenko
@ 2017-10-01 6:44 ` Shahaf Shuler
0 siblings, 0 replies; 51+ messages in thread
From: Shahaf Shuler @ 2017-10-01 6:44 UTC (permalink / raw)
To: Andrew Rybchenko, Raslan Darawsheh, dev; +Cc: Yongseok Koh
Hi Andrew,
Friday, September 29, 2017 10:26 AM, Andrew Rybchenko:
>On 09/28/2017 07:48 PM, Raslan Darawsheh wrote:
>>Add a new offload capability flag for Rx HW timestamp and enabling/disabling
>>this via rte_eth_rxmode.
>
>I think it should be on top [1] and ideally follow a new offload API without
>addition of a new bit field which will be removed soon.
>
>Also, please, update documentation (doc/guides/nics/features.rst)
>
>Andrew.
>
>[1] http://dpdk.org/ml/archives/dev/2017-September/076872.html<https://emea01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdpdk.org%2Fml%2Farchives%2Fdev%2F2017-September%2F076872.html&data=02%7C01%7Cshahafs%40mellanox.com%7C029845c0b55d49299f3f08d5070b57e0%7Ca652971c7d2e4d9ba6a4d149256f461b%7C0%7C0%7C636422667676863312&sdata=83RStoqLwxS55vOFENOq1BDsM%2BhN3QNldpTdfooZMck%3D&reserved=0>
I agree it should be on top of [1].
Unfortunately since the PMDs will move to the new API only on 18.02, and in the current state Rx offloads are disabled by default, there will be no way to enable this feature without a dedicated bit.
So my suggestion is to keep the timestamp bit on rxmode, and to update the convert function introduced on [1]. This bit will be removed along with the entire bit-field array once the old offloads API will be deprecated.
^ permalink raw reply [flat|nested] 51+ messages in thread
* [dpdk-dev] [PATCH 1/3] ethdev: add Rx HW timestamp capability
2017-08-24 7:46 ` [dpdk-dev] [PATCH v2 1/3] ethdev: expose Rx " Raslan Darawsheh
` (3 preceding siblings ...)
2017-09-28 16:48 ` [dpdk-dev] [PATCH v3 1/3] ethdev: add Rx HW timestamp capability Raslan Darawsheh
@ 2017-10-02 14:01 ` Raslan Darawsheh
2017-10-02 14:01 ` [dpdk-dev] [PATCH 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
2017-10-02 14:01 ` [dpdk-dev] [PATCH 3/3] net/mlx5: " Raslan Darawsheh
4 siblings, 2 replies; 51+ messages in thread
From: Raslan Darawsheh @ 2017-10-02 14:01 UTC (permalink / raw)
To: dev; +Cc: yskoh, shahafs
Add a new offload capability flag for Rx HW timestamp and enabling/disabling
this via rte_eth_rxmode.
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
---
This patch should be applied after after this series:
http://dpdk.org/dev/patchwork/patch/29368/
---
doc/guides/nics/features.rst | 11 +++++++++++
lib/librte_ether/rte_ethdev.c | 6 ++++++
lib/librte_ether/rte_ethdev.h | 5 ++++-
3 files changed, 21 insertions(+), 1 deletion(-)
diff --git a/doc/guides/nics/features.rst b/doc/guides/nics/features.rst
index ba0d19f..fbdd6eb 100644
--- a/doc/guides/nics/features.rst
+++ b/doc/guides/nics/features.rst
@@ -566,6 +566,17 @@ Supports L4 checksum offload.
* **[provides] rte_eth_dev_info**: ``rx_offload_capa:DEV_RX_OFFLOAD_UDP_CKSUM,DEV_RX_OFFLOAD_TCP_CKSUM``,
``tx_offload_capa:DEV_TX_OFFLOAD_UDP_CKSUM,DEV_TX_OFFLOAD_TCP_CKSUM,DEV_TX_OFFLOAD_SCTP_CKSUM``.
+.. _nic_features_hw_timestamp:
+
+Timestamp offload
+-----------------
+
+Supports Timestamp.
+
+* **[uses] rte_eth_rxconf,rte_eth_rxmode**: ``offloads:DEV_RX_OFFLOAD_TIMESTAMP``.
+* **[provides] mbuf**: ``mbuf.ol_flags:PKT_RX_TIMESTAMP``.
+ ``mbuf.timestamp``.
+ **[provides] rte_eth_dev_info**: ``rx_offload_capa:DEV_RX_OFFLOAD_TIMESTAMP``
.. _nic_features_macsec_offload:
diff --git a/lib/librte_ether/rte_ethdev.c b/lib/librte_ether/rte_ethdev.c
index 9b73d23..c5c5164 100644
--- a/lib/librte_ether/rte_ethdev.c
+++ b/lib/librte_ether/rte_ethdev.c
@@ -715,6 +715,8 @@ rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
offloads |= DEV_RX_OFFLOAD_SCATTER;
if (rxmode->enable_lro == 1)
offloads |= DEV_RX_OFFLOAD_TCP_LRO;
+ if (rxmode->hw_timestamp == 1)
+ offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
*rx_offloads = offloads;
}
@@ -763,6 +765,10 @@ rte_eth_convert_rx_offloads(const uint64_t rx_offloads,
rxmode->enable_lro = 1;
else
rxmode->enable_lro = 0;
+ if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
+ rxmode->hw_timestamp = 1;
+ else
+ rxmode->hw_timestamp = 0;
}
int
diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h
index ffd2ee5..bd63730 100644
--- a/lib/librte_ether/rte_ethdev.h
+++ b/lib/librte_ether/rte_ethdev.h
@@ -368,7 +368,8 @@ struct rte_eth_rxmode {
jumbo_frame : 1, /**< Jumbo Frame Receipt enable. */
hw_strip_crc : 1, /**< Enable CRC stripping by hardware. */
enable_scatter : 1, /**< Enable scatter packets rx handler */
- enable_lro : 1; /**< Enable LRO */
+ enable_lro : 1, /**< Enable LRO */
+ hw_timestamp : 1; /**< Enable HW timestamp */
};
/**
@@ -924,6 +925,8 @@ struct rte_eth_conf {
#define DEV_RX_OFFLOAD_QINQ_STRIP 0x00000020
#define DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM 0x00000040
#define DEV_RX_OFFLOAD_MACSEC_STRIP 0x00000080
+#define DEV_RX_OFFLOAD_TIMESTAMP 0x00000100
+/**< Device delivers timestamp of packet arrival. */
/**
* TX offload capabilities of a device.
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* [dpdk-dev] [PATCH 2/3] app/testpmd: add Rx HW timestamp
2017-10-02 14:01 ` [dpdk-dev] [PATCH " Raslan Darawsheh
@ 2017-10-02 14:01 ` Raslan Darawsheh
2017-10-02 14:01 ` [dpdk-dev] [PATCH 3/3] net/mlx5: " Raslan Darawsheh
1 sibling, 0 replies; 51+ messages in thread
From: Raslan Darawsheh @ 2017-10-02 14:01 UTC (permalink / raw)
To: dev; +Cc: yskoh, shahafs
Add enabling/disabling Rx HW timestamp from command line and parameter.
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
---
app/test-pmd/cmdline.c | 15 ++++++++++++---
app/test-pmd/config.c | 8 ++++++++
app/test-pmd/parameters.c | 5 +++++
app/test-pmd/rxonly.c | 2 ++
app/test-pmd/testpmd.c | 1 +
5 files changed, 28 insertions(+), 3 deletions(-)
diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index 4f2d731..80a249e 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -675,7 +675,7 @@ static void cmd_help_long_parsed(void *parsed_result,
"port config all max-pkt-len (value)\n"
" Set the max packet length.\n\n"
- "port config all (crc-strip|scatter|rx-cksum|hw-vlan|hw-vlan-filter|"
+ "port config all (crc-strip|scatter|rx-cksum|rx-timestamp|hw-vlan|hw-vlan-filter|"
"hw-vlan-strip|hw-vlan-extend|drop-en)"
" (on|off)\n"
" Set crc-strip/scatter/rx-checksum/hardware-vlan/drop_en"
@@ -1588,6 +1588,15 @@ cmd_config_rx_mode_flag_parsed(void *parsed_result,
printf("Unknown parameter\n");
return;
}
+ } else if (!strcmp(res->name, "rx-timestamp")) {
+ if (!strcmp(res->value, "on"))
+ rx_mode.hw_timestamp = 1;
+ else if (!strcmp(res->value, "off"))
+ rx_mode.hw_timestamp = 0;
+ else {
+ printf("Unknown parameter\n");
+ return;
+ }
} else if (!strcmp(res->name, "hw-vlan")) {
if (!strcmp(res->value, "on")) {
rx_mode.hw_vlan_filter = 1;
@@ -1656,7 +1665,7 @@ cmdline_parse_token_string_t cmd_config_rx_mode_flag_all =
TOKEN_STRING_INITIALIZER(struct cmd_config_rx_mode_flag, all, "all");
cmdline_parse_token_string_t cmd_config_rx_mode_flag_name =
TOKEN_STRING_INITIALIZER(struct cmd_config_rx_mode_flag, name,
- "crc-strip#scatter#rx-cksum#hw-vlan#"
+ "crc-strip#scatter#rx-cksum#rx-timestamp#hw-vlan#"
"hw-vlan-filter#hw-vlan-strip#hw-vlan-extend");
cmdline_parse_token_string_t cmd_config_rx_mode_flag_value =
TOKEN_STRING_INITIALIZER(struct cmd_config_rx_mode_flag, value,
@@ -1665,7 +1674,7 @@ cmdline_parse_token_string_t cmd_config_rx_mode_flag_value =
cmdline_parse_inst_t cmd_config_rx_mode_flag = {
.f = cmd_config_rx_mode_flag_parsed,
.data = NULL,
- .help_str = "port config all crc-strip|scatter|rx-cksum|hw-vlan|"
+ .help_str = "port config all crc-strip|scatter|rx-cksum|rx-timestamp|hw-vlan|"
"hw-vlan-filter|hw-vlan-strip|hw-vlan-extend on|off",
.tokens = {
(void *)&cmd_config_rx_mode_flag_port,
diff --git a/app/test-pmd/config.c b/app/test-pmd/config.c
index e8e311c..76addf3 100644
--- a/app/test-pmd/config.c
+++ b/app/test-pmd/config.c
@@ -600,6 +600,14 @@ port_offload_cap_display(portid_t port_id)
printf("off\n");
}
+ if (dev_info.rx_offload_capa & DEV_RX_OFFLOAD_TIMESTAMP) {
+ printf("HW timestamp: ");
+ if (dev->data->dev_conf.rxmode.hw_timestamp)
+ printf("on\n");
+ else
+ printf("off\n");
+ }
+
if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_QINQ_INSERT) {
printf("Double VLANs insert: ");
if (ports[port_id].tx_ol_flags &
diff --git a/app/test-pmd/parameters.c b/app/test-pmd/parameters.c
index 2f7f70f..602d98d 100644
--- a/app/test-pmd/parameters.c
+++ b/app/test-pmd/parameters.c
@@ -162,6 +162,7 @@ usage(char* progname)
printf(" --disable-crc-strip: disable CRC stripping by hardware.\n");
printf(" --enable-lro: enable large receive offload.\n");
printf(" --enable-rx-cksum: enable rx hardware checksum offload.\n");
+ printf(" --enable-rx-timestamp: enable rx hardware timestamp offload.\n");
printf(" --disable-hw-vlan: disable hardware vlan.\n");
printf(" --disable-hw-vlan-filter: disable hardware vlan filter.\n");
printf(" --disable-hw-vlan-strip: disable hardware vlan strip.\n");
@@ -601,6 +602,7 @@ launch_args_parse(int argc, char** argv)
{ "disable-crc-strip", 0, 0, 0 },
{ "enable-lro", 0, 0, 0 },
{ "enable-rx-cksum", 0, 0, 0 },
+ { "enable-rx-timestamp", 0, 0, 0 },
{ "enable-scatter", 0, 0, 0 },
{ "disable-hw-vlan", 0, 0, 0 },
{ "disable-hw-vlan-filter", 0, 0, 0 },
@@ -899,6 +901,9 @@ launch_args_parse(int argc, char** argv)
rx_mode.enable_scatter = 1;
if (!strcmp(lgopts[opt_idx].name, "enable-rx-cksum"))
rx_mode.hw_ip_checksum = 1;
+ if (!strcmp(lgopts[opt_idx].name,
+ "enable-rx-timestamp"))
+ rx_mode.hw_timestamp = 1;
if (!strcmp(lgopts[opt_idx].name, "disable-hw-vlan")) {
rx_mode.hw_vlan_filter = 0;
diff --git a/app/test-pmd/rxonly.c b/app/test-pmd/rxonly.c
index 5ef0219..f4d35d7 100644
--- a/app/test-pmd/rxonly.c
+++ b/app/test-pmd/rxonly.c
@@ -158,6 +158,8 @@ pkt_burst_receive(struct fwd_stream *fs)
printf("hash=0x%x ID=0x%x ",
mb->hash.fdir.hash, mb->hash.fdir.id);
}
+ if (ol_flags & PKT_RX_TIMESTAMP)
+ printf(" - timestamp %lu ", mb->timestamp);
if (ol_flags & PKT_RX_VLAN_STRIPPED)
printf(" - VLAN tci=0x%x", mb->vlan_tci);
if (ol_flags & PKT_RX_QINQ_STRIPPED)
diff --git a/app/test-pmd/testpmd.c b/app/test-pmd/testpmd.c
index 5507c0f..ec29908 100644
--- a/app/test-pmd/testpmd.c
+++ b/app/test-pmd/testpmd.c
@@ -339,6 +339,7 @@ struct rte_eth_rxmode rx_mode = {
.hw_vlan_extend = 0, /**< Extended VLAN disabled. */
.jumbo_frame = 0, /**< Jumbo Frame Support disabled. */
.hw_strip_crc = 1, /**< CRC stripping by hardware enabled. */
+ .hw_timestamp = 0, /**< HW timestamp enabled. */
};
struct rte_fdir_conf fdir_conf = {
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* [dpdk-dev] [PATCH 3/3] net/mlx5: add Rx HW timestamp
2017-10-02 14:01 ` [dpdk-dev] [PATCH " Raslan Darawsheh
2017-10-02 14:01 ` [dpdk-dev] [PATCH 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
@ 2017-10-02 14:01 ` Raslan Darawsheh
1 sibling, 0 replies; 51+ messages in thread
From: Raslan Darawsheh @ 2017-10-02 14:01 UTC (permalink / raw)
To: dev; +Cc: yskoh, shahafs
Expose Rx HW timestamp to packet mbufs.
Signed-off-by :Raslan Darawsheh <rasland@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
---
drivers/net/mlx5/mlx5_ethdev.c | 3 ++-
drivers/net/mlx5/mlx5_rxq.c | 6 +++++-
drivers/net/mlx5/mlx5_rxtx.c | 5 +++++
drivers/net/mlx5/mlx5_rxtx.h | 3 ++-
drivers/net/mlx5/mlx5_rxtx_vec_sse.h | 13 ++++++++++++-
5 files changed, 26 insertions(+), 4 deletions(-)
diff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c
index d8bcef4..892c2cc 100644
--- a/drivers/net/mlx5/mlx5_ethdev.c
+++ b/drivers/net/mlx5/mlx5_ethdev.c
@@ -686,7 +686,8 @@ mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
DEV_RX_OFFLOAD_UDP_CKSUM |
DEV_RX_OFFLOAD_TCP_CKSUM) :
0) |
- (priv->hw_vlan_strip ? DEV_RX_OFFLOAD_VLAN_STRIP : 0);
+ (priv->hw_vlan_strip ? DEV_RX_OFFLOAD_VLAN_STRIP : 0) |
+ DEV_RX_OFFLOAD_TIMESTAMP;
if (!priv->mps)
info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT;
if (priv->hw_csum)
diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c
index 9bb6a29..e48e240 100644
--- a/drivers/net/mlx5/mlx5_rxq.c
+++ b/drivers/net/mlx5/mlx5_rxq.c
@@ -609,7 +609,7 @@ mlx5_priv_rxq_ibv_new(struct priv *priv, uint16_t idx)
attr.cq.mlx5 = (struct mlx5dv_cq_init_attr){
.comp_mask = 0,
};
- if (priv->cqe_comp) {
+ if (priv->cqe_comp && !rxq_data->hw_timestamp) {
attr.cq.ibv.comp_mask |= IBV_CQ_INIT_ATTR_MASK_FLAGS;
attr.cq.mlx5.comp_mask |=
MLX5DV_CQ_INIT_ATTR_MASK_COMPRESSED_CQE;
@@ -620,6 +620,8 @@ mlx5_priv_rxq_ibv_new(struct priv *priv, uint16_t idx)
*/
if (rxq_check_vec_support(rxq_data) < 0)
cqe_n *= 2;
+ } else if (priv->cqe_comp && rxq_data->hw_timestamp) {
+ DEBUG("Rx CQE compression is disabled for HW timestamp");
}
tmpl->cq = ibv_cq_ex_to_cq(mlx5dv_create_cq(priv->ctx, &attr.cq.ibv,
&attr.cq.mlx5));
@@ -936,6 +938,8 @@ mlx5_priv_rxq_new(struct priv *priv, uint16_t idx, uint16_t desc,
if (priv->hw_csum_l2tun)
tmpl->rxq.csum_l2tun =
!!dev->data->dev_conf.rxmode.hw_ip_checksum;
+ tmpl->rxq.hw_timestamp =
+ !!dev->data->dev_conf.rxmode.hw_timestamp;
/* Configure VLAN stripping. */
tmpl->rxq.vlan_strip = (priv->hw_vlan_strip &&
!!dev->data->dev_conf.rxmode.hw_vlan_strip);
diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c
index 275cd6a..961967b 100644
--- a/drivers/net/mlx5/mlx5_rxtx.c
+++ b/drivers/net/mlx5/mlx5_rxtx.c
@@ -1887,6 +1887,11 @@ mlx5_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
pkt->vlan_tci =
rte_be_to_cpu_16(cqe->vlan_info);
}
+ if (rxq->hw_timestamp) {
+ pkt->timestamp =
+ rte_be_to_cpu_64(cqe->timestamp);
+ pkt->ol_flags |= PKT_RX_TIMESTAMP;
+ }
if (rxq->crc_present)
len -= ETHER_CRC_LEN;
PKT_LEN(pkt) = len;
diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h
index 8470a55..c207a8b 100644
--- a/drivers/net/mlx5/mlx5_rxtx.h
+++ b/drivers/net/mlx5/mlx5_rxtx.h
@@ -106,6 +106,7 @@ struct rxq_zip {
struct mlx5_rxq_data {
unsigned int csum:1; /* Enable checksum offloading. */
unsigned int csum_l2tun:1; /* Same for L2 tunnels. */
+ unsigned int hw_timestamp:1; /* Enable HW timestamp. */
unsigned int vlan_strip:1; /* Enable VLAN stripping. */
unsigned int crc_present:1; /* CRC must be subtracted. */
unsigned int sges_n:2; /* Log 2 of SGEs (max buffers per packet). */
@@ -115,7 +116,7 @@ struct mlx5_rxq_data {
unsigned int rss_hash:1; /* RSS hash result is enabled. */
unsigned int mark:1; /* Marked flow available on the queue. */
unsigned int pending_err:1; /* CQE error needs to be handled. */
- unsigned int :7; /* Remaining bits. */
+ unsigned int :6; /* Remaining bits. */
volatile uint32_t *rq_db;
volatile uint32_t *cq_db;
uint16_t rq_ci;
diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
index c2142d7..e9819b7 100644
--- a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
+++ b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
@@ -545,7 +545,8 @@ rxq_cq_to_ptype_oflags_v(struct mlx5_rxq_data *rxq, __m128i cqes[4],
{
__m128i pinfo0, pinfo1;
__m128i pinfo, ptype;
- __m128i ol_flags = _mm_set1_epi32(rxq->rss_hash * PKT_RX_RSS_HASH);
+ __m128i ol_flags = _mm_set1_epi32(rxq->rss_hash * PKT_RX_RSS_HASH |
+ rxq->hw_timestamp * PKT_RX_TIMESTAMP);
__m128i cv_flags;
const __m128i zero = _mm_setzero_si128();
const __m128i ptype_mask =
@@ -938,6 +939,16 @@ rxq_burst_v(struct mlx5_rxq_data *rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
rxq->pending_err |= !!_mm_cvtsi128_si64(opcode);
/* D.5 fill in mbuf - rearm_data and packet_type. */
rxq_cq_to_ptype_oflags_v(rxq, cqes, opcode, &pkts[pos]);
+ if (rxq->hw_timestamp) {
+ pkts[pos]->timestamp =
+ rte_be_to_cpu_64(cq[pos].timestamp);
+ pkts[pos + 1]->timestamp =
+ rte_be_to_cpu_64(cq[pos + p1].timestamp);
+ pkts[pos + 2]->timestamp =
+ rte_be_to_cpu_64(cq[pos + p2].timestamp);
+ pkts[pos + 3]->timestamp =
+ rte_be_to_cpu_64(cq[pos + p3].timestamp);
+ }
#ifdef MLX5_PMD_SOFT_COUNTERS
/* Add up received bytes count. */
byte_cnt = _mm_shuffle_epi8(op_own, len_shuf_mask);
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* [dpdk-dev] [PATCH 1/3] ethdev: add Rx HW timestamp capability
2017-09-28 16:48 ` [dpdk-dev] [PATCH v3 1/3] ethdev: add Rx HW timestamp capability Raslan Darawsheh
` (2 preceding siblings ...)
2017-09-29 7:25 ` [dpdk-dev] [PATCH v3 1/3] ethdev: add Rx HW timestamp capability Andrew Rybchenko
@ 2017-10-02 14:50 ` Raslan Darawsheh
2017-10-02 14:50 ` [dpdk-dev] [PATCH 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
` (2 more replies)
2017-10-03 6:33 ` [dpdk-dev] [PATCH v5 " Raslan Darawsheh
2017-10-03 11:00 ` [dpdk-dev] [PATCH v6 " Raslan Darawsheh
5 siblings, 3 replies; 51+ messages in thread
From: Raslan Darawsheh @ 2017-10-02 14:50 UTC (permalink / raw)
To: dev; +Cc: yskoh, shahafs
Add a new offload capability flag for Rx HW
timestamp and enabling/disabling this via rte_eth_rxmode.
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
---
This patch should be applied after after this series:
http://dpdk.org/dev/patchwork/patch/29368/
---
doc/guides/nics/features.rst | 11 +++++++++++
lib/librte_ether/rte_ethdev.c | 6 ++++++
lib/librte_ether/rte_ethdev.h | 5 ++++-
3 files changed, 21 insertions(+), 1 deletion(-)
diff --git a/doc/guides/nics/features.rst b/doc/guides/nics/features.rst
index ba0d19f..fbdd6eb 100644
--- a/doc/guides/nics/features.rst
+++ b/doc/guides/nics/features.rst
@@ -566,6 +566,17 @@ Supports L4 checksum offload.
* **[provides] rte_eth_dev_info**: ``rx_offload_capa:DEV_RX_OFFLOAD_UDP_CKSUM,DEV_RX_OFFLOAD_TCP_CKSUM``,
``tx_offload_capa:DEV_TX_OFFLOAD_UDP_CKSUM,DEV_TX_OFFLOAD_TCP_CKSUM,DEV_TX_OFFLOAD_SCTP_CKSUM``.
+.. _nic_features_hw_timestamp:
+
+Timestamp offload
+-----------------
+
+Supports Timestamp.
+
+* **[uses] rte_eth_rxconf,rte_eth_rxmode**: ``offloads:DEV_RX_OFFLOAD_TIMESTAMP``.
+* **[provides] mbuf**: ``mbuf.ol_flags:PKT_RX_TIMESTAMP``.
+ ``mbuf.timestamp``.
+ **[provides] rte_eth_dev_info**: ``rx_offload_capa:DEV_RX_OFFLOAD_TIMESTAMP``
.. _nic_features_macsec_offload:
diff --git a/lib/librte_ether/rte_ethdev.c b/lib/librte_ether/rte_ethdev.c
index 9b73d23..c5c5164 100644
--- a/lib/librte_ether/rte_ethdev.c
+++ b/lib/librte_ether/rte_ethdev.c
@@ -715,6 +715,8 @@ rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
offloads |= DEV_RX_OFFLOAD_SCATTER;
if (rxmode->enable_lro == 1)
offloads |= DEV_RX_OFFLOAD_TCP_LRO;
+ if (rxmode->hw_timestamp == 1)
+ offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
*rx_offloads = offloads;
}
@@ -763,6 +765,10 @@ rte_eth_convert_rx_offloads(const uint64_t rx_offloads,
rxmode->enable_lro = 1;
else
rxmode->enable_lro = 0;
+ if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
+ rxmode->hw_timestamp = 1;
+ else
+ rxmode->hw_timestamp = 0;
}
int
diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h
index ffd2ee5..bd63730 100644
--- a/lib/librte_ether/rte_ethdev.h
+++ b/lib/librte_ether/rte_ethdev.h
@@ -368,7 +368,8 @@ struct rte_eth_rxmode {
jumbo_frame : 1, /**< Jumbo Frame Receipt enable. */
hw_strip_crc : 1, /**< Enable CRC stripping by hardware. */
enable_scatter : 1, /**< Enable scatter packets rx handler */
- enable_lro : 1; /**< Enable LRO */
+ enable_lro : 1, /**< Enable LRO */
+ hw_timestamp : 1; /**< Enable HW timestamp */
};
/**
@@ -924,6 +925,8 @@ struct rte_eth_conf {
#define DEV_RX_OFFLOAD_QINQ_STRIP 0x00000020
#define DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM 0x00000040
#define DEV_RX_OFFLOAD_MACSEC_STRIP 0x00000080
+#define DEV_RX_OFFLOAD_TIMESTAMP 0x00000100
+/**< Device delivers timestamp of packet arrival. */
/**
* TX offload capabilities of a device.
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* [dpdk-dev] [PATCH 2/3] app/testpmd: add Rx HW timestamp
2017-10-02 14:50 ` [dpdk-dev] [PATCH " Raslan Darawsheh
@ 2017-10-02 14:50 ` Raslan Darawsheh
2017-10-02 14:50 ` [dpdk-dev] [PATCH 3/3] net/mlx5: " Raslan Darawsheh
2017-10-02 18:48 ` [dpdk-dev] [PATCH 1/3] ethdev: add Rx HW timestamp capability Ferruh Yigit
2 siblings, 0 replies; 51+ messages in thread
From: Raslan Darawsheh @ 2017-10-02 14:50 UTC (permalink / raw)
To: dev; +Cc: yskoh, shahafs
Add enabling/disabling Rx HW timestamp from
command line and parameter.
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
---
app/test-pmd/cmdline.c | 15 ++++++++++++---
app/test-pmd/config.c | 8 ++++++++
app/test-pmd/parameters.c | 5 +++++
app/test-pmd/rxonly.c | 2 ++
app/test-pmd/testpmd.c | 1 +
5 files changed, 28 insertions(+), 3 deletions(-)
diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index 4f2d731..80a249e 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -675,7 +675,7 @@ static void cmd_help_long_parsed(void *parsed_result,
"port config all max-pkt-len (value)\n"
" Set the max packet length.\n\n"
- "port config all (crc-strip|scatter|rx-cksum|hw-vlan|hw-vlan-filter|"
+ "port config all (crc-strip|scatter|rx-cksum|rx-timestamp|hw-vlan|hw-vlan-filter|"
"hw-vlan-strip|hw-vlan-extend|drop-en)"
" (on|off)\n"
" Set crc-strip/scatter/rx-checksum/hardware-vlan/drop_en"
@@ -1588,6 +1588,15 @@ cmd_config_rx_mode_flag_parsed(void *parsed_result,
printf("Unknown parameter\n");
return;
}
+ } else if (!strcmp(res->name, "rx-timestamp")) {
+ if (!strcmp(res->value, "on"))
+ rx_mode.hw_timestamp = 1;
+ else if (!strcmp(res->value, "off"))
+ rx_mode.hw_timestamp = 0;
+ else {
+ printf("Unknown parameter\n");
+ return;
+ }
} else if (!strcmp(res->name, "hw-vlan")) {
if (!strcmp(res->value, "on")) {
rx_mode.hw_vlan_filter = 1;
@@ -1656,7 +1665,7 @@ cmdline_parse_token_string_t cmd_config_rx_mode_flag_all =
TOKEN_STRING_INITIALIZER(struct cmd_config_rx_mode_flag, all, "all");
cmdline_parse_token_string_t cmd_config_rx_mode_flag_name =
TOKEN_STRING_INITIALIZER(struct cmd_config_rx_mode_flag, name,
- "crc-strip#scatter#rx-cksum#hw-vlan#"
+ "crc-strip#scatter#rx-cksum#rx-timestamp#hw-vlan#"
"hw-vlan-filter#hw-vlan-strip#hw-vlan-extend");
cmdline_parse_token_string_t cmd_config_rx_mode_flag_value =
TOKEN_STRING_INITIALIZER(struct cmd_config_rx_mode_flag, value,
@@ -1665,7 +1674,7 @@ cmdline_parse_token_string_t cmd_config_rx_mode_flag_value =
cmdline_parse_inst_t cmd_config_rx_mode_flag = {
.f = cmd_config_rx_mode_flag_parsed,
.data = NULL,
- .help_str = "port config all crc-strip|scatter|rx-cksum|hw-vlan|"
+ .help_str = "port config all crc-strip|scatter|rx-cksum|rx-timestamp|hw-vlan|"
"hw-vlan-filter|hw-vlan-strip|hw-vlan-extend on|off",
.tokens = {
(void *)&cmd_config_rx_mode_flag_port,
diff --git a/app/test-pmd/config.c b/app/test-pmd/config.c
index e8e311c..76addf3 100644
--- a/app/test-pmd/config.c
+++ b/app/test-pmd/config.c
@@ -600,6 +600,14 @@ port_offload_cap_display(portid_t port_id)
printf("off\n");
}
+ if (dev_info.rx_offload_capa & DEV_RX_OFFLOAD_TIMESTAMP) {
+ printf("HW timestamp: ");
+ if (dev->data->dev_conf.rxmode.hw_timestamp)
+ printf("on\n");
+ else
+ printf("off\n");
+ }
+
if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_QINQ_INSERT) {
printf("Double VLANs insert: ");
if (ports[port_id].tx_ol_flags &
diff --git a/app/test-pmd/parameters.c b/app/test-pmd/parameters.c
index 2f7f70f..602d98d 100644
--- a/app/test-pmd/parameters.c
+++ b/app/test-pmd/parameters.c
@@ -162,6 +162,7 @@ usage(char* progname)
printf(" --disable-crc-strip: disable CRC stripping by hardware.\n");
printf(" --enable-lro: enable large receive offload.\n");
printf(" --enable-rx-cksum: enable rx hardware checksum offload.\n");
+ printf(" --enable-rx-timestamp: enable rx hardware timestamp offload.\n");
printf(" --disable-hw-vlan: disable hardware vlan.\n");
printf(" --disable-hw-vlan-filter: disable hardware vlan filter.\n");
printf(" --disable-hw-vlan-strip: disable hardware vlan strip.\n");
@@ -601,6 +602,7 @@ launch_args_parse(int argc, char** argv)
{ "disable-crc-strip", 0, 0, 0 },
{ "enable-lro", 0, 0, 0 },
{ "enable-rx-cksum", 0, 0, 0 },
+ { "enable-rx-timestamp", 0, 0, 0 },
{ "enable-scatter", 0, 0, 0 },
{ "disable-hw-vlan", 0, 0, 0 },
{ "disable-hw-vlan-filter", 0, 0, 0 },
@@ -899,6 +901,9 @@ launch_args_parse(int argc, char** argv)
rx_mode.enable_scatter = 1;
if (!strcmp(lgopts[opt_idx].name, "enable-rx-cksum"))
rx_mode.hw_ip_checksum = 1;
+ if (!strcmp(lgopts[opt_idx].name,
+ "enable-rx-timestamp"))
+ rx_mode.hw_timestamp = 1;
if (!strcmp(lgopts[opt_idx].name, "disable-hw-vlan")) {
rx_mode.hw_vlan_filter = 0;
diff --git a/app/test-pmd/rxonly.c b/app/test-pmd/rxonly.c
index 5ef0219..f4d35d7 100644
--- a/app/test-pmd/rxonly.c
+++ b/app/test-pmd/rxonly.c
@@ -158,6 +158,8 @@ pkt_burst_receive(struct fwd_stream *fs)
printf("hash=0x%x ID=0x%x ",
mb->hash.fdir.hash, mb->hash.fdir.id);
}
+ if (ol_flags & PKT_RX_TIMESTAMP)
+ printf(" - timestamp %lu ", mb->timestamp);
if (ol_flags & PKT_RX_VLAN_STRIPPED)
printf(" - VLAN tci=0x%x", mb->vlan_tci);
if (ol_flags & PKT_RX_QINQ_STRIPPED)
diff --git a/app/test-pmd/testpmd.c b/app/test-pmd/testpmd.c
index 5507c0f..ec29908 100644
--- a/app/test-pmd/testpmd.c
+++ b/app/test-pmd/testpmd.c
@@ -339,6 +339,7 @@ struct rte_eth_rxmode rx_mode = {
.hw_vlan_extend = 0, /**< Extended VLAN disabled. */
.jumbo_frame = 0, /**< Jumbo Frame Support disabled. */
.hw_strip_crc = 1, /**< CRC stripping by hardware enabled. */
+ .hw_timestamp = 0, /**< HW timestamp enabled. */
};
struct rte_fdir_conf fdir_conf = {
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* [dpdk-dev] [PATCH 3/3] net/mlx5: add Rx HW timestamp
2017-10-02 14:50 ` [dpdk-dev] [PATCH " Raslan Darawsheh
2017-10-02 14:50 ` [dpdk-dev] [PATCH 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
@ 2017-10-02 14:50 ` Raslan Darawsheh
2017-10-02 18:48 ` [dpdk-dev] [PATCH 1/3] ethdev: add Rx HW timestamp capability Ferruh Yigit
2 siblings, 0 replies; 51+ messages in thread
From: Raslan Darawsheh @ 2017-10-02 14:50 UTC (permalink / raw)
To: dev; +Cc: yskoh, shahafs
Expose Rx HW timestamp to packet mbufs.
Signed-off-by :Raslan Darawsheh <rasland@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
---
drivers/net/mlx5/mlx5_ethdev.c | 3 ++-
drivers/net/mlx5/mlx5_rxq.c | 6 +++++-
drivers/net/mlx5/mlx5_rxtx.c | 5 +++++
drivers/net/mlx5/mlx5_rxtx.h | 3 ++-
drivers/net/mlx5/mlx5_rxtx_vec_sse.h | 13 ++++++++++++-
5 files changed, 26 insertions(+), 4 deletions(-)
diff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c
index d8bcef4..892c2cc 100644
--- a/drivers/net/mlx5/mlx5_ethdev.c
+++ b/drivers/net/mlx5/mlx5_ethdev.c
@@ -686,7 +686,8 @@ mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
DEV_RX_OFFLOAD_UDP_CKSUM |
DEV_RX_OFFLOAD_TCP_CKSUM) :
0) |
- (priv->hw_vlan_strip ? DEV_RX_OFFLOAD_VLAN_STRIP : 0);
+ (priv->hw_vlan_strip ? DEV_RX_OFFLOAD_VLAN_STRIP : 0) |
+ DEV_RX_OFFLOAD_TIMESTAMP;
if (!priv->mps)
info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT;
if (priv->hw_csum)
diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c
index 9bb6a29..e48e240 100644
--- a/drivers/net/mlx5/mlx5_rxq.c
+++ b/drivers/net/mlx5/mlx5_rxq.c
@@ -609,7 +609,7 @@ mlx5_priv_rxq_ibv_new(struct priv *priv, uint16_t idx)
attr.cq.mlx5 = (struct mlx5dv_cq_init_attr){
.comp_mask = 0,
};
- if (priv->cqe_comp) {
+ if (priv->cqe_comp && !rxq_data->hw_timestamp) {
attr.cq.ibv.comp_mask |= IBV_CQ_INIT_ATTR_MASK_FLAGS;
attr.cq.mlx5.comp_mask |=
MLX5DV_CQ_INIT_ATTR_MASK_COMPRESSED_CQE;
@@ -620,6 +620,8 @@ mlx5_priv_rxq_ibv_new(struct priv *priv, uint16_t idx)
*/
if (rxq_check_vec_support(rxq_data) < 0)
cqe_n *= 2;
+ } else if (priv->cqe_comp && rxq_data->hw_timestamp) {
+ DEBUG("Rx CQE compression is disabled for HW timestamp");
}
tmpl->cq = ibv_cq_ex_to_cq(mlx5dv_create_cq(priv->ctx, &attr.cq.ibv,
&attr.cq.mlx5));
@@ -936,6 +938,8 @@ mlx5_priv_rxq_new(struct priv *priv, uint16_t idx, uint16_t desc,
if (priv->hw_csum_l2tun)
tmpl->rxq.csum_l2tun =
!!dev->data->dev_conf.rxmode.hw_ip_checksum;
+ tmpl->rxq.hw_timestamp =
+ !!dev->data->dev_conf.rxmode.hw_timestamp;
/* Configure VLAN stripping. */
tmpl->rxq.vlan_strip = (priv->hw_vlan_strip &&
!!dev->data->dev_conf.rxmode.hw_vlan_strip);
diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c
index 275cd6a..961967b 100644
--- a/drivers/net/mlx5/mlx5_rxtx.c
+++ b/drivers/net/mlx5/mlx5_rxtx.c
@@ -1887,6 +1887,11 @@ mlx5_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
pkt->vlan_tci =
rte_be_to_cpu_16(cqe->vlan_info);
}
+ if (rxq->hw_timestamp) {
+ pkt->timestamp =
+ rte_be_to_cpu_64(cqe->timestamp);
+ pkt->ol_flags |= PKT_RX_TIMESTAMP;
+ }
if (rxq->crc_present)
len -= ETHER_CRC_LEN;
PKT_LEN(pkt) = len;
diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h
index 8470a55..c207a8b 100644
--- a/drivers/net/mlx5/mlx5_rxtx.h
+++ b/drivers/net/mlx5/mlx5_rxtx.h
@@ -106,6 +106,7 @@ struct rxq_zip {
struct mlx5_rxq_data {
unsigned int csum:1; /* Enable checksum offloading. */
unsigned int csum_l2tun:1; /* Same for L2 tunnels. */
+ unsigned int hw_timestamp:1; /* Enable HW timestamp. */
unsigned int vlan_strip:1; /* Enable VLAN stripping. */
unsigned int crc_present:1; /* CRC must be subtracted. */
unsigned int sges_n:2; /* Log 2 of SGEs (max buffers per packet). */
@@ -115,7 +116,7 @@ struct mlx5_rxq_data {
unsigned int rss_hash:1; /* RSS hash result is enabled. */
unsigned int mark:1; /* Marked flow available on the queue. */
unsigned int pending_err:1; /* CQE error needs to be handled. */
- unsigned int :7; /* Remaining bits. */
+ unsigned int :6; /* Remaining bits. */
volatile uint32_t *rq_db;
volatile uint32_t *cq_db;
uint16_t rq_ci;
diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
index c2142d7..e9819b7 100644
--- a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
+++ b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
@@ -545,7 +545,8 @@ rxq_cq_to_ptype_oflags_v(struct mlx5_rxq_data *rxq, __m128i cqes[4],
{
__m128i pinfo0, pinfo1;
__m128i pinfo, ptype;
- __m128i ol_flags = _mm_set1_epi32(rxq->rss_hash * PKT_RX_RSS_HASH);
+ __m128i ol_flags = _mm_set1_epi32(rxq->rss_hash * PKT_RX_RSS_HASH |
+ rxq->hw_timestamp * PKT_RX_TIMESTAMP);
__m128i cv_flags;
const __m128i zero = _mm_setzero_si128();
const __m128i ptype_mask =
@@ -938,6 +939,16 @@ rxq_burst_v(struct mlx5_rxq_data *rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
rxq->pending_err |= !!_mm_cvtsi128_si64(opcode);
/* D.5 fill in mbuf - rearm_data and packet_type. */
rxq_cq_to_ptype_oflags_v(rxq, cqes, opcode, &pkts[pos]);
+ if (rxq->hw_timestamp) {
+ pkts[pos]->timestamp =
+ rte_be_to_cpu_64(cq[pos].timestamp);
+ pkts[pos + 1]->timestamp =
+ rte_be_to_cpu_64(cq[pos + p1].timestamp);
+ pkts[pos + 2]->timestamp =
+ rte_be_to_cpu_64(cq[pos + p2].timestamp);
+ pkts[pos + 3]->timestamp =
+ rte_be_to_cpu_64(cq[pos + p3].timestamp);
+ }
#ifdef MLX5_PMD_SOFT_COUNTERS
/* Add up received bytes count. */
byte_cnt = _mm_shuffle_epi8(op_own, len_shuf_mask);
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [dpdk-dev] [PATCH 1/3] ethdev: add Rx HW timestamp capability
2017-10-02 14:50 ` [dpdk-dev] [PATCH " Raslan Darawsheh
2017-10-02 14:50 ` [dpdk-dev] [PATCH 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
2017-10-02 14:50 ` [dpdk-dev] [PATCH 3/3] net/mlx5: " Raslan Darawsheh
@ 2017-10-02 18:48 ` Ferruh Yigit
2017-10-03 0:39 ` Yongseok Koh
2 siblings, 1 reply; 51+ messages in thread
From: Ferruh Yigit @ 2017-10-02 18:48 UTC (permalink / raw)
To: Raslan Darawsheh, dev; +Cc: yskoh, shahafs
On 10/2/2017 3:50 PM, Raslan Darawsheh wrote:
> Add a new offload capability flag for Rx HW
> timestamp and enabling/disabling this via rte_eth_rxmode.
>
> Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
> Acked-by: Yongseok Koh <yskoh@mellanox.com>
Hi Raslan,
Is this v4? There are two versions sent today without version
information, it is confusing.
Can you please send latest version again with version information (v4 or
v5) so it will be possible to figure out latest version?
Thanks,
ferruh
^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [dpdk-dev] [PATCH 1/3] ethdev: add Rx HW timestamp capability
2017-10-02 18:48 ` [dpdk-dev] [PATCH 1/3] ethdev: add Rx HW timestamp capability Ferruh Yigit
@ 2017-10-03 0:39 ` Yongseok Koh
0 siblings, 0 replies; 51+ messages in thread
From: Yongseok Koh @ 2017-10-03 0:39 UTC (permalink / raw)
To: Raslan Darawsheh; +Cc: Ferruh Yigit, dev, Shahaf Shuler
> On Oct 2, 2017, at 11:48 AM, Ferruh Yigit <ferruh.yigit@intel.com> wrote:
>
> On 10/2/2017 3:50 PM, Raslan Darawsheh wrote:
>> Add a new offload capability flag for Rx HW
>> timestamp and enabling/disabling this via rte_eth_rxmode.
>>
>> Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
>> Acked-by: Yongseok Koh <yskoh@mellanox.com>
>
> Hi Raslan,
>
> Is this v4? There are two versions sent today without version
> information, it is confusing.
>
> Can you please send latest version again with version information (v4 or
> v5) so it will be possible to figure out latest version?
Raslan,
Did you make any change in the patches since I acked?
Then, you should remove my 'acked-by' tag and I have to review changes.
Hope you add a cover letter to document changes you make across versions.
Thanks
Yongseok
^ permalink raw reply [flat|nested] 51+ messages in thread
* [dpdk-dev] [PATCH v5 1/3] ethdev: add Rx HW timestamp capability
2017-09-28 16:48 ` [dpdk-dev] [PATCH v3 1/3] ethdev: add Rx HW timestamp capability Raslan Darawsheh
` (3 preceding siblings ...)
2017-10-02 14:50 ` [dpdk-dev] [PATCH " Raslan Darawsheh
@ 2017-10-03 6:33 ` Raslan Darawsheh
2017-10-03 6:33 ` [dpdk-dev] [PATCH v5 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
` (2 more replies)
2017-10-03 11:00 ` [dpdk-dev] [PATCH v6 " Raslan Darawsheh
5 siblings, 3 replies; 51+ messages in thread
From: Raslan Darawsheh @ 2017-10-03 6:33 UTC (permalink / raw)
To: dev; +Cc: yskoh, shahafs, ferruh.yigit
Add a new offload capability flag for Rx HW
timestamp and enabling/disabling this via rte_eth_rxmode.
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
---
This patch should be applied after after this series:
http://dpdk.org/dev/patchwork/patch/29368/
---
doc/guides/nics/features.rst | 11 +++++++++++
lib/librte_ether/rte_ethdev.c | 6 ++++++
lib/librte_ether/rte_ethdev.h | 5 ++++-
3 files changed, 21 insertions(+), 1 deletion(-)
diff --git a/doc/guides/nics/features.rst b/doc/guides/nics/features.rst
index ba0d19f..fbdd6eb 100644
--- a/doc/guides/nics/features.rst
+++ b/doc/guides/nics/features.rst
@@ -566,6 +566,17 @@ Supports L4 checksum offload.
* **[provides] rte_eth_dev_info**: ``rx_offload_capa:DEV_RX_OFFLOAD_UDP_CKSUM,DEV_RX_OFFLOAD_TCP_CKSUM``,
``tx_offload_capa:DEV_TX_OFFLOAD_UDP_CKSUM,DEV_TX_OFFLOAD_TCP_CKSUM,DEV_TX_OFFLOAD_SCTP_CKSUM``.
+.. _nic_features_hw_timestamp:
+
+Timestamp offload
+-----------------
+
+Supports Timestamp.
+
+* **[uses] rte_eth_rxconf,rte_eth_rxmode**: ``offloads:DEV_RX_OFFLOAD_TIMESTAMP``.
+* **[provides] mbuf**: ``mbuf.ol_flags:PKT_RX_TIMESTAMP``.
+ ``mbuf.timestamp``.
+ **[provides] rte_eth_dev_info**: ``rx_offload_capa:DEV_RX_OFFLOAD_TIMESTAMP``
.. _nic_features_macsec_offload:
diff --git a/lib/librte_ether/rte_ethdev.c b/lib/librte_ether/rte_ethdev.c
index 9b73d23..c5c5164 100644
--- a/lib/librte_ether/rte_ethdev.c
+++ b/lib/librte_ether/rte_ethdev.c
@@ -715,6 +715,8 @@ rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
offloads |= DEV_RX_OFFLOAD_SCATTER;
if (rxmode->enable_lro == 1)
offloads |= DEV_RX_OFFLOAD_TCP_LRO;
+ if (rxmode->hw_timestamp == 1)
+ offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
*rx_offloads = offloads;
}
@@ -763,6 +765,10 @@ rte_eth_convert_rx_offloads(const uint64_t rx_offloads,
rxmode->enable_lro = 1;
else
rxmode->enable_lro = 0;
+ if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
+ rxmode->hw_timestamp = 1;
+ else
+ rxmode->hw_timestamp = 0;
}
int
diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h
index ffd2ee5..bd63730 100644
--- a/lib/librte_ether/rte_ethdev.h
+++ b/lib/librte_ether/rte_ethdev.h
@@ -368,7 +368,8 @@ struct rte_eth_rxmode {
jumbo_frame : 1, /**< Jumbo Frame Receipt enable. */
hw_strip_crc : 1, /**< Enable CRC stripping by hardware. */
enable_scatter : 1, /**< Enable scatter packets rx handler */
- enable_lro : 1; /**< Enable LRO */
+ enable_lro : 1, /**< Enable LRO */
+ hw_timestamp : 1; /**< Enable HW timestamp */
};
/**
@@ -924,6 +925,8 @@ struct rte_eth_conf {
#define DEV_RX_OFFLOAD_QINQ_STRIP 0x00000020
#define DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM 0x00000040
#define DEV_RX_OFFLOAD_MACSEC_STRIP 0x00000080
+#define DEV_RX_OFFLOAD_TIMESTAMP 0x00000100
+/**< Device delivers timestamp of packet arrival. */
/**
* TX offload capabilities of a device.
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* [dpdk-dev] [PATCH v5 2/3] app/testpmd: add Rx HW timestamp
2017-10-03 6:33 ` [dpdk-dev] [PATCH v5 " Raslan Darawsheh
@ 2017-10-03 6:33 ` Raslan Darawsheh
2017-10-03 6:33 ` [dpdk-dev] [PATCH v5 3/3] net/mlx5: " Raslan Darawsheh
2017-10-03 6:40 ` [dpdk-dev] [PATCH v5 1/3] ethdev: add Rx HW timestamp capability Andrew Rybchenko
2 siblings, 0 replies; 51+ messages in thread
From: Raslan Darawsheh @ 2017-10-03 6:33 UTC (permalink / raw)
To: dev; +Cc: yskoh, shahafs, ferruh.yigit
Add enabling/disabling Rx HW timestamp from
command line and parameter.
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
---
app/test-pmd/cmdline.c | 15 ++++++++++++---
app/test-pmd/config.c | 8 ++++++++
app/test-pmd/parameters.c | 5 +++++
app/test-pmd/rxonly.c | 2 ++
app/test-pmd/testpmd.c | 1 +
5 files changed, 28 insertions(+), 3 deletions(-)
diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index 4f2d731..80a249e 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -675,7 +675,7 @@ static void cmd_help_long_parsed(void *parsed_result,
"port config all max-pkt-len (value)\n"
" Set the max packet length.\n\n"
- "port config all (crc-strip|scatter|rx-cksum|hw-vlan|hw-vlan-filter|"
+ "port config all (crc-strip|scatter|rx-cksum|rx-timestamp|hw-vlan|hw-vlan-filter|"
"hw-vlan-strip|hw-vlan-extend|drop-en)"
" (on|off)\n"
" Set crc-strip/scatter/rx-checksum/hardware-vlan/drop_en"
@@ -1588,6 +1588,15 @@ cmd_config_rx_mode_flag_parsed(void *parsed_result,
printf("Unknown parameter\n");
return;
}
+ } else if (!strcmp(res->name, "rx-timestamp")) {
+ if (!strcmp(res->value, "on"))
+ rx_mode.hw_timestamp = 1;
+ else if (!strcmp(res->value, "off"))
+ rx_mode.hw_timestamp = 0;
+ else {
+ printf("Unknown parameter\n");
+ return;
+ }
} else if (!strcmp(res->name, "hw-vlan")) {
if (!strcmp(res->value, "on")) {
rx_mode.hw_vlan_filter = 1;
@@ -1656,7 +1665,7 @@ cmdline_parse_token_string_t cmd_config_rx_mode_flag_all =
TOKEN_STRING_INITIALIZER(struct cmd_config_rx_mode_flag, all, "all");
cmdline_parse_token_string_t cmd_config_rx_mode_flag_name =
TOKEN_STRING_INITIALIZER(struct cmd_config_rx_mode_flag, name,
- "crc-strip#scatter#rx-cksum#hw-vlan#"
+ "crc-strip#scatter#rx-cksum#rx-timestamp#hw-vlan#"
"hw-vlan-filter#hw-vlan-strip#hw-vlan-extend");
cmdline_parse_token_string_t cmd_config_rx_mode_flag_value =
TOKEN_STRING_INITIALIZER(struct cmd_config_rx_mode_flag, value,
@@ -1665,7 +1674,7 @@ cmdline_parse_token_string_t cmd_config_rx_mode_flag_value =
cmdline_parse_inst_t cmd_config_rx_mode_flag = {
.f = cmd_config_rx_mode_flag_parsed,
.data = NULL,
- .help_str = "port config all crc-strip|scatter|rx-cksum|hw-vlan|"
+ .help_str = "port config all crc-strip|scatter|rx-cksum|rx-timestamp|hw-vlan|"
"hw-vlan-filter|hw-vlan-strip|hw-vlan-extend on|off",
.tokens = {
(void *)&cmd_config_rx_mode_flag_port,
diff --git a/app/test-pmd/config.c b/app/test-pmd/config.c
index e8e311c..76addf3 100644
--- a/app/test-pmd/config.c
+++ b/app/test-pmd/config.c
@@ -600,6 +600,14 @@ port_offload_cap_display(portid_t port_id)
printf("off\n");
}
+ if (dev_info.rx_offload_capa & DEV_RX_OFFLOAD_TIMESTAMP) {
+ printf("HW timestamp: ");
+ if (dev->data->dev_conf.rxmode.hw_timestamp)
+ printf("on\n");
+ else
+ printf("off\n");
+ }
+
if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_QINQ_INSERT) {
printf("Double VLANs insert: ");
if (ports[port_id].tx_ol_flags &
diff --git a/app/test-pmd/parameters.c b/app/test-pmd/parameters.c
index 2f7f70f..602d98d 100644
--- a/app/test-pmd/parameters.c
+++ b/app/test-pmd/parameters.c
@@ -162,6 +162,7 @@ usage(char* progname)
printf(" --disable-crc-strip: disable CRC stripping by hardware.\n");
printf(" --enable-lro: enable large receive offload.\n");
printf(" --enable-rx-cksum: enable rx hardware checksum offload.\n");
+ printf(" --enable-rx-timestamp: enable rx hardware timestamp offload.\n");
printf(" --disable-hw-vlan: disable hardware vlan.\n");
printf(" --disable-hw-vlan-filter: disable hardware vlan filter.\n");
printf(" --disable-hw-vlan-strip: disable hardware vlan strip.\n");
@@ -601,6 +602,7 @@ launch_args_parse(int argc, char** argv)
{ "disable-crc-strip", 0, 0, 0 },
{ "enable-lro", 0, 0, 0 },
{ "enable-rx-cksum", 0, 0, 0 },
+ { "enable-rx-timestamp", 0, 0, 0 },
{ "enable-scatter", 0, 0, 0 },
{ "disable-hw-vlan", 0, 0, 0 },
{ "disable-hw-vlan-filter", 0, 0, 0 },
@@ -899,6 +901,9 @@ launch_args_parse(int argc, char** argv)
rx_mode.enable_scatter = 1;
if (!strcmp(lgopts[opt_idx].name, "enable-rx-cksum"))
rx_mode.hw_ip_checksum = 1;
+ if (!strcmp(lgopts[opt_idx].name,
+ "enable-rx-timestamp"))
+ rx_mode.hw_timestamp = 1;
if (!strcmp(lgopts[opt_idx].name, "disable-hw-vlan")) {
rx_mode.hw_vlan_filter = 0;
diff --git a/app/test-pmd/rxonly.c b/app/test-pmd/rxonly.c
index 5ef0219..f4d35d7 100644
--- a/app/test-pmd/rxonly.c
+++ b/app/test-pmd/rxonly.c
@@ -158,6 +158,8 @@ pkt_burst_receive(struct fwd_stream *fs)
printf("hash=0x%x ID=0x%x ",
mb->hash.fdir.hash, mb->hash.fdir.id);
}
+ if (ol_flags & PKT_RX_TIMESTAMP)
+ printf(" - timestamp %lu ", mb->timestamp);
if (ol_flags & PKT_RX_VLAN_STRIPPED)
printf(" - VLAN tci=0x%x", mb->vlan_tci);
if (ol_flags & PKT_RX_QINQ_STRIPPED)
diff --git a/app/test-pmd/testpmd.c b/app/test-pmd/testpmd.c
index 5507c0f..ec29908 100644
--- a/app/test-pmd/testpmd.c
+++ b/app/test-pmd/testpmd.c
@@ -339,6 +339,7 @@ struct rte_eth_rxmode rx_mode = {
.hw_vlan_extend = 0, /**< Extended VLAN disabled. */
.jumbo_frame = 0, /**< Jumbo Frame Support disabled. */
.hw_strip_crc = 1, /**< CRC stripping by hardware enabled. */
+ .hw_timestamp = 0, /**< HW timestamp enabled. */
};
struct rte_fdir_conf fdir_conf = {
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* [dpdk-dev] [PATCH v5 3/3] net/mlx5: add Rx HW timestamp
2017-10-03 6:33 ` [dpdk-dev] [PATCH v5 " Raslan Darawsheh
2017-10-03 6:33 ` [dpdk-dev] [PATCH v5 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
@ 2017-10-03 6:33 ` Raslan Darawsheh
2017-10-03 6:40 ` [dpdk-dev] [PATCH v5 1/3] ethdev: add Rx HW timestamp capability Andrew Rybchenko
2 siblings, 0 replies; 51+ messages in thread
From: Raslan Darawsheh @ 2017-10-03 6:33 UTC (permalink / raw)
To: dev; +Cc: yskoh, shahafs, ferruh.yigit
Expose Rx HW timestamp to packet mbufs.
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
---
drivers/net/mlx5/mlx5_ethdev.c | 3 ++-
drivers/net/mlx5/mlx5_rxq.c | 6 +++++-
drivers/net/mlx5/mlx5_rxtx.c | 5 +++++
drivers/net/mlx5/mlx5_rxtx.h | 3 ++-
drivers/net/mlx5/mlx5_rxtx_vec_sse.h | 13 ++++++++++++-
5 files changed, 26 insertions(+), 4 deletions(-)
diff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c
index d8bcef4..892c2cc 100644
--- a/drivers/net/mlx5/mlx5_ethdev.c
+++ b/drivers/net/mlx5/mlx5_ethdev.c
@@ -686,7 +686,8 @@ mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
DEV_RX_OFFLOAD_UDP_CKSUM |
DEV_RX_OFFLOAD_TCP_CKSUM) :
0) |
- (priv->hw_vlan_strip ? DEV_RX_OFFLOAD_VLAN_STRIP : 0);
+ (priv->hw_vlan_strip ? DEV_RX_OFFLOAD_VLAN_STRIP : 0) |
+ DEV_RX_OFFLOAD_TIMESTAMP;
if (!priv->mps)
info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT;
if (priv->hw_csum)
diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c
index 9bb6a29..e48e240 100644
--- a/drivers/net/mlx5/mlx5_rxq.c
+++ b/drivers/net/mlx5/mlx5_rxq.c
@@ -609,7 +609,7 @@ mlx5_priv_rxq_ibv_new(struct priv *priv, uint16_t idx)
attr.cq.mlx5 = (struct mlx5dv_cq_init_attr){
.comp_mask = 0,
};
- if (priv->cqe_comp) {
+ if (priv->cqe_comp && !rxq_data->hw_timestamp) {
attr.cq.ibv.comp_mask |= IBV_CQ_INIT_ATTR_MASK_FLAGS;
attr.cq.mlx5.comp_mask |=
MLX5DV_CQ_INIT_ATTR_MASK_COMPRESSED_CQE;
@@ -620,6 +620,8 @@ mlx5_priv_rxq_ibv_new(struct priv *priv, uint16_t idx)
*/
if (rxq_check_vec_support(rxq_data) < 0)
cqe_n *= 2;
+ } else if (priv->cqe_comp && rxq_data->hw_timestamp) {
+ DEBUG("Rx CQE compression is disabled for HW timestamp");
}
tmpl->cq = ibv_cq_ex_to_cq(mlx5dv_create_cq(priv->ctx, &attr.cq.ibv,
&attr.cq.mlx5));
@@ -936,6 +938,8 @@ mlx5_priv_rxq_new(struct priv *priv, uint16_t idx, uint16_t desc,
if (priv->hw_csum_l2tun)
tmpl->rxq.csum_l2tun =
!!dev->data->dev_conf.rxmode.hw_ip_checksum;
+ tmpl->rxq.hw_timestamp =
+ !!dev->data->dev_conf.rxmode.hw_timestamp;
/* Configure VLAN stripping. */
tmpl->rxq.vlan_strip = (priv->hw_vlan_strip &&
!!dev->data->dev_conf.rxmode.hw_vlan_strip);
diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c
index 275cd6a..961967b 100644
--- a/drivers/net/mlx5/mlx5_rxtx.c
+++ b/drivers/net/mlx5/mlx5_rxtx.c
@@ -1887,6 +1887,11 @@ mlx5_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
pkt->vlan_tci =
rte_be_to_cpu_16(cqe->vlan_info);
}
+ if (rxq->hw_timestamp) {
+ pkt->timestamp =
+ rte_be_to_cpu_64(cqe->timestamp);
+ pkt->ol_flags |= PKT_RX_TIMESTAMP;
+ }
if (rxq->crc_present)
len -= ETHER_CRC_LEN;
PKT_LEN(pkt) = len;
diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h
index 8470a55..c207a8b 100644
--- a/drivers/net/mlx5/mlx5_rxtx.h
+++ b/drivers/net/mlx5/mlx5_rxtx.h
@@ -106,6 +106,7 @@ struct rxq_zip {
struct mlx5_rxq_data {
unsigned int csum:1; /* Enable checksum offloading. */
unsigned int csum_l2tun:1; /* Same for L2 tunnels. */
+ unsigned int hw_timestamp:1; /* Enable HW timestamp. */
unsigned int vlan_strip:1; /* Enable VLAN stripping. */
unsigned int crc_present:1; /* CRC must be subtracted. */
unsigned int sges_n:2; /* Log 2 of SGEs (max buffers per packet). */
@@ -115,7 +116,7 @@ struct mlx5_rxq_data {
unsigned int rss_hash:1; /* RSS hash result is enabled. */
unsigned int mark:1; /* Marked flow available on the queue. */
unsigned int pending_err:1; /* CQE error needs to be handled. */
- unsigned int :7; /* Remaining bits. */
+ unsigned int :6; /* Remaining bits. */
volatile uint32_t *rq_db;
volatile uint32_t *cq_db;
uint16_t rq_ci;
diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
index c2142d7..e9819b7 100644
--- a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
+++ b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
@@ -545,7 +545,8 @@ rxq_cq_to_ptype_oflags_v(struct mlx5_rxq_data *rxq, __m128i cqes[4],
{
__m128i pinfo0, pinfo1;
__m128i pinfo, ptype;
- __m128i ol_flags = _mm_set1_epi32(rxq->rss_hash * PKT_RX_RSS_HASH);
+ __m128i ol_flags = _mm_set1_epi32(rxq->rss_hash * PKT_RX_RSS_HASH |
+ rxq->hw_timestamp * PKT_RX_TIMESTAMP);
__m128i cv_flags;
const __m128i zero = _mm_setzero_si128();
const __m128i ptype_mask =
@@ -938,6 +939,16 @@ rxq_burst_v(struct mlx5_rxq_data *rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
rxq->pending_err |= !!_mm_cvtsi128_si64(opcode);
/* D.5 fill in mbuf - rearm_data and packet_type. */
rxq_cq_to_ptype_oflags_v(rxq, cqes, opcode, &pkts[pos]);
+ if (rxq->hw_timestamp) {
+ pkts[pos]->timestamp =
+ rte_be_to_cpu_64(cq[pos].timestamp);
+ pkts[pos + 1]->timestamp =
+ rte_be_to_cpu_64(cq[pos + p1].timestamp);
+ pkts[pos + 2]->timestamp =
+ rte_be_to_cpu_64(cq[pos + p2].timestamp);
+ pkts[pos + 3]->timestamp =
+ rte_be_to_cpu_64(cq[pos + p3].timestamp);
+ }
#ifdef MLX5_PMD_SOFT_COUNTERS
/* Add up received bytes count. */
byte_cnt = _mm_shuffle_epi8(op_own, len_shuf_mask);
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [dpdk-dev] [PATCH v5 1/3] ethdev: add Rx HW timestamp capability
2017-10-03 6:33 ` [dpdk-dev] [PATCH v5 " Raslan Darawsheh
2017-10-03 6:33 ` [dpdk-dev] [PATCH v5 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
2017-10-03 6:33 ` [dpdk-dev] [PATCH v5 3/3] net/mlx5: " Raslan Darawsheh
@ 2017-10-03 6:40 ` Andrew Rybchenko
2017-10-03 6:53 ` Yongseok Koh
2 siblings, 1 reply; 51+ messages in thread
From: Andrew Rybchenko @ 2017-10-03 6:40 UTC (permalink / raw)
To: Raslan Darawsheh, dev; +Cc: yskoh, shahafs, ferruh.yigit
On 10/03/2017 09:33 AM, Raslan Darawsheh wrote:
> Add a new offload capability flag for Rx HW
> timestamp and enabling/disabling this via rte_eth_rxmode.
>
> Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
> ---
> This patch should be applied after after this series:
> http://dpdk.org/dev/patchwork/patch/29368/
> ---
> doc/guides/nics/features.rst | 11 +++++++++++
> lib/librte_ether/rte_ethdev.c | 6 ++++++
> lib/librte_ether/rte_ethdev.h | 5 ++++-
> 3 files changed, 21 insertions(+), 1 deletion(-)
<...>
> diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h
> index ffd2ee5..bd63730 100644
> --- a/lib/librte_ether/rte_ethdev.h
> +++ b/lib/librte_ether/rte_ethdev.h
> @@ -368,7 +368,8 @@ struct rte_eth_rxmode {
> jumbo_frame : 1, /**< Jumbo Frame Receipt enable. */
> hw_strip_crc : 1, /**< Enable CRC stripping by hardware. */
> enable_scatter : 1, /**< Enable scatter packets rx handler */
> - enable_lro : 1; /**< Enable LRO */
> + enable_lro : 1, /**< Enable LRO */
> + hw_timestamp : 1; /**< Enable HW timestamp */
The code is definitely not rebased on top of a new Rx offload API patch
which adds
ignore_offload_bitfield : 1;
exactly in this place.
<...>
^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [dpdk-dev] [PATCH v5 1/3] ethdev: add Rx HW timestamp capability
2017-10-03 6:40 ` [dpdk-dev] [PATCH v5 1/3] ethdev: add Rx HW timestamp capability Andrew Rybchenko
@ 2017-10-03 6:53 ` Yongseok Koh
2017-10-03 7:24 ` Andrew Rybchenko
0 siblings, 1 reply; 51+ messages in thread
From: Yongseok Koh @ 2017-10-03 6:53 UTC (permalink / raw)
To: Andrew Rybchenko; +Cc: Raslan Darawsheh, dev, Shahaf Shuler, ferruh.yigit
> On Oct 2, 2017, at 11:40 PM, Andrew Rybchenko <arybchenko@solarflare.com> wrote:
>
> On 10/03/2017 09:33 AM, Raslan Darawsheh wrote:
>> Add a new offload capability flag for Rx HW
>> timestamp and enabling/disabling this via rte_eth_rxmode.
>>
>> Signed-off-by: Raslan Darawsheh
>> <rasland@mellanox.com>
>>
>> ---
>> This patch should be applied after after this series:
>>
>> http://dpdk.org/dev/patchwork/patch/29368/
>>
>> ---
>> doc/guides/nics/features.rst | 11 +++++++++++
>> lib/librte_ether/rte_ethdev.c | 6 ++++++
>> lib/librte_ether/rte_ethdev.h | 5 ++++-
>> 3 files changed, 21 insertions(+), 1 deletion(-)
>>
>
> <...>
>
>> diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h
>> index ffd2ee5..bd63730 100644
>> --- a/lib/librte_ether/rte_ethdev.h
>> +++ b/lib/librte_ether/rte_ethdev.h
>> @@ -368,7 +368,8 @@ struct rte_eth_rxmode {
>> jumbo_frame : 1, /**< Jumbo Frame Receipt enable. */
>> hw_strip_crc : 1, /**< Enable CRC stripping by hardware. */
>> enable_scatter : 1, /**< Enable scatter packets rx handler */
>> - enable_lro : 1; /**< Enable LRO */
>> + enable_lro : 1, /**< Enable LRO */
>> + hw_timestamp : 1; /**< Enable HW timestamp */
>>
>
> The code is definitely not rebased on top of a new Rx offload API patch which adds
> ignore_offload_bitfield : 1;
> exactly in this place.
Hi Andrew,
Did you check Shahaf's email regarding this? Looks like Shahaf suggests keeping it as is for now.
> On Sep 30, 2017, at 11:44 PM, Shahaf Shuler <shahafs@mellanox.com> wrote:
> >[1] http://dpdk.org/ml/archives/dev/2017-September/076872.html
>
> I agree it should be on top of [1].
> Unfortunately since the PMDs will move to the new API only on 18.02, and in the current state Rx offloads are disabled by default, there will be no way to enable this feature without a dedicated bit.
>
> So my suggestion is to keep the timestamp bit on rxmode, and to update the convert function introduced on [1]. This bit will be removed along with the entire bit-field array once the old offloads API will be deprecated.
Thanks,
Yongseok
^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [dpdk-dev] [PATCH v5 1/3] ethdev: add Rx HW timestamp capability
2017-10-03 6:53 ` Yongseok Koh
@ 2017-10-03 7:24 ` Andrew Rybchenko
0 siblings, 0 replies; 51+ messages in thread
From: Andrew Rybchenko @ 2017-10-03 7:24 UTC (permalink / raw)
To: Yongseok Koh; +Cc: Raslan Darawsheh, dev, Shahaf Shuler, ferruh.yigit
On 10/03/2017 09:53 AM, Yongseok Koh wrote:
>> On Oct 2, 2017, at 11:40 PM, Andrew Rybchenko <arybchenko@solarflare.com> wrote:
>>
>> On 10/03/2017 09:33 AM, Raslan Darawsheh wrote:
>>> Add a new offload capability flag for Rx HW
>>> timestamp and enabling/disabling this via rte_eth_rxmode.
>>>
>>> Signed-off-by: Raslan Darawsheh
>>> <rasland@mellanox.com>
>>>
>>> ---
>>> This patch should be applied after after this series:
>>>
>>> http://dpdk.org/dev/patchwork/patch/29368/
>>>
>>> ---
>>> doc/guides/nics/features.rst | 11 +++++++++++
>>> lib/librte_ether/rte_ethdev.c | 6 ++++++
>>> lib/librte_ether/rte_ethdev.h | 5 ++++-
>>> 3 files changed, 21 insertions(+), 1 deletion(-)
>>>
>> <...>
>>
>>> diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h
>>> index ffd2ee5..bd63730 100644
>>> --- a/lib/librte_ether/rte_ethdev.h
>>> +++ b/lib/librte_ether/rte_ethdev.h
>>> @@ -368,7 +368,8 @@ struct rte_eth_rxmode {
>>> jumbo_frame : 1, /**< Jumbo Frame Receipt enable. */
>>> hw_strip_crc : 1, /**< Enable CRC stripping by hardware. */
>>> enable_scatter : 1, /**< Enable scatter packets rx handler */
>>> - enable_lro : 1; /**< Enable LRO */
>>> + enable_lro : 1, /**< Enable LRO */
>>> + hw_timestamp : 1; /**< Enable HW timestamp */
>>>
>> The code is definitely not rebased on top of a new Rx offload API patch which adds
>> ignore_offload_bitfield : 1;
>> exactly in this place.
> Hi Andrew,
> Did you check Shahaf's email regarding this? Looks like Shahaf suggests keeping it as is for now.
Yes. But it simply fails to apply on top a new Rx offload API patch.
Above you say that it should be applied after that series.
>> On Sep 30, 2017, at 11:44 PM, Shahaf Shuler <shahafs@mellanox.com> wrote:
>>> [1] http://dpdk.org/ml/archives/dev/2017-September/076872.html
>>
>> I agree it should be on top of [1].
>> Unfortunately since the PMDs will move to the new API only on 18.02, and in the current state Rx offloads are disabled by default, there will be no way to enable this feature without a dedicated bit.
>>
>> So my suggestion is to keep the timestamp bit on rxmode, and to update the convert function introduced on [1]. This bit will be removed along with the entire bit-field array once the old offloads API will be deprecated.
>
> Thanks,
> Yongseok
>
^ permalink raw reply [flat|nested] 51+ messages in thread
* [dpdk-dev] [PATCH v6 1/3] ethdev: add Rx HW timestamp capability
2017-09-28 16:48 ` [dpdk-dev] [PATCH v3 1/3] ethdev: add Rx HW timestamp capability Raslan Darawsheh
` (4 preceding siblings ...)
2017-10-03 6:33 ` [dpdk-dev] [PATCH v5 " Raslan Darawsheh
@ 2017-10-03 11:00 ` Raslan Darawsheh
2017-10-03 11:00 ` [dpdk-dev] [PATCH v6 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
` (3 more replies)
5 siblings, 4 replies; 51+ messages in thread
From: Raslan Darawsheh @ 2017-10-03 11:00 UTC (permalink / raw)
To: dev; +Cc: yskoh, shahafs, ferruh.yigit
Add a new offload capability flag for Rx HW
timestamp and enabling/disabling this via rte_eth_rxmode.
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
---
This patch should be applied after after this series:
http://dpdk.org/dev/patchwork/patch/29368/
Changes in v6:
- Rebased properly on top of the mentioned patch series.
- Documentation update
---
doc/guides/nics/features.rst | 11 +++++++++++
lib/librte_ether/rte_ethdev.c | 6 ++++++
lib/librte_ether/rte_ethdev.h | 2 ++
3 files changed, 19 insertions(+)
diff --git a/doc/guides/nics/features.rst b/doc/guides/nics/features.rst
index 4e68144..e03e6d6 100644
--- a/doc/guides/nics/features.rst
+++ b/doc/guides/nics/features.rst
@@ -567,6 +567,17 @@ Supports L4 checksum offload.
* **[provides] rte_eth_dev_info**: ``rx_offload_capa,rx_queue_offload_capa:DEV_RX_OFFLOAD_UDP_CKSUM,DEV_RX_OFFLOAD_TCP_CKSUM``,
``tx_offload_capa:DEV_TX_OFFLOAD_UDP_CKSUM,DEV_TX_OFFLOAD_TCP_CKSUM,DEV_TX_OFFLOAD_SCTP_CKSUM``.
+.. _nic_features_hw_timestamp:
+
+Timestamp offload
+-----------------
+
+Supports Timestamp.
+
+* **[uses] rte_eth_rxconf,rte_eth_rxmode**: ``offloads:DEV_RX_OFFLOAD_TIMESTAMP``.
+* **[provides] mbuf**: ``mbuf.ol_flags:PKT_RX_TIMESTAMP``.
+* **[provides] mbuf**: ``mbuf.timestamp``.
+* **[provides] rte_eth_dev_info**: ``rx_offload_capa:DEV_RX_OFFLOAD_TIMESTAMP``.
.. _nic_features_macsec_offload:
diff --git a/lib/librte_ether/rte_ethdev.c b/lib/librte_ether/rte_ethdev.c
index 9b73d23..c5c5164 100644
--- a/lib/librte_ether/rte_ethdev.c
+++ b/lib/librte_ether/rte_ethdev.c
@@ -715,6 +715,8 @@ rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
offloads |= DEV_RX_OFFLOAD_SCATTER;
if (rxmode->enable_lro == 1)
offloads |= DEV_RX_OFFLOAD_TCP_LRO;
+ if (rxmode->hw_timestamp == 1)
+ offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
*rx_offloads = offloads;
}
@@ -763,6 +765,10 @@ rte_eth_convert_rx_offloads(const uint64_t rx_offloads,
rxmode->enable_lro = 1;
else
rxmode->enable_lro = 0;
+ if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
+ rxmode->hw_timestamp = 1;
+ else
+ rxmode->hw_timestamp = 0;
}
int
diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h
index e02d578..8bb9a6a 100644
--- a/lib/librte_ether/rte_ethdev.h
+++ b/lib/librte_ether/rte_ethdev.h
@@ -369,6 +369,7 @@ struct rte_eth_rxmode {
hw_strip_crc : 1, /**< Enable CRC stripping by hardware. */
enable_scatter : 1, /**< Enable scatter packets rx handler */
enable_lro : 1, /**< Enable LRO */
+ hw_timestamp : 1, /**< Enable HW timestamp */
/**
* When set the offload bitfield should be ignored.
* Instead per-port Rx offloads should be set on offloads
@@ -940,6 +941,7 @@ struct rte_eth_conf {
#define DEV_RX_OFFLOAD_JUMBO_FRAME 0x00000800
#define DEV_RX_OFFLOAD_CRC_STRIP 0x00001000
#define DEV_RX_OFFLOAD_SCATTER 0x00002000
+#define DEV_RX_OFFLOAD_TIMESTAMP 0x00004000
#define DEV_RX_OFFLOAD_CHECKSUM (DEV_RX_OFFLOAD_IPV4_CKSUM | \
DEV_RX_OFFLOAD_UDP_CKSUM | \
DEV_RX_OFFLOAD_TCP_CKSUM)
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* [dpdk-dev] [PATCH v6 2/3] app/testpmd: add Rx HW timestamp
2017-10-03 11:00 ` [dpdk-dev] [PATCH v6 " Raslan Darawsheh
@ 2017-10-03 11:00 ` Raslan Darawsheh
2017-10-05 23:11 ` Yongseok Koh
2017-10-03 11:00 ` [dpdk-dev] [PATCH v6 3/3] net/mlx5: " Raslan Darawsheh
` (2 subsequent siblings)
3 siblings, 1 reply; 51+ messages in thread
From: Raslan Darawsheh @ 2017-10-03 11:00 UTC (permalink / raw)
To: dev; +Cc: yskoh, shahafs, ferruh.yigit
Add enabling/disabling Rx HW timestamp from
command line and parameter.
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
---
app/test-pmd/cmdline.c | 15 ++++++++++++---
app/test-pmd/config.c | 8 ++++++++
app/test-pmd/parameters.c | 5 +++++
app/test-pmd/rxonly.c | 2 ++
app/test-pmd/testpmd.c | 1 +
5 files changed, 28 insertions(+), 3 deletions(-)
diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index 4f2d731..80a249e 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -675,7 +675,7 @@ static void cmd_help_long_parsed(void *parsed_result,
"port config all max-pkt-len (value)\n"
" Set the max packet length.\n\n"
- "port config all (crc-strip|scatter|rx-cksum|hw-vlan|hw-vlan-filter|"
+ "port config all (crc-strip|scatter|rx-cksum|rx-timestamp|hw-vlan|hw-vlan-filter|"
"hw-vlan-strip|hw-vlan-extend|drop-en)"
" (on|off)\n"
" Set crc-strip/scatter/rx-checksum/hardware-vlan/drop_en"
@@ -1588,6 +1588,15 @@ cmd_config_rx_mode_flag_parsed(void *parsed_result,
printf("Unknown parameter\n");
return;
}
+ } else if (!strcmp(res->name, "rx-timestamp")) {
+ if (!strcmp(res->value, "on"))
+ rx_mode.hw_timestamp = 1;
+ else if (!strcmp(res->value, "off"))
+ rx_mode.hw_timestamp = 0;
+ else {
+ printf("Unknown parameter\n");
+ return;
+ }
} else if (!strcmp(res->name, "hw-vlan")) {
if (!strcmp(res->value, "on")) {
rx_mode.hw_vlan_filter = 1;
@@ -1656,7 +1665,7 @@ cmdline_parse_token_string_t cmd_config_rx_mode_flag_all =
TOKEN_STRING_INITIALIZER(struct cmd_config_rx_mode_flag, all, "all");
cmdline_parse_token_string_t cmd_config_rx_mode_flag_name =
TOKEN_STRING_INITIALIZER(struct cmd_config_rx_mode_flag, name,
- "crc-strip#scatter#rx-cksum#hw-vlan#"
+ "crc-strip#scatter#rx-cksum#rx-timestamp#hw-vlan#"
"hw-vlan-filter#hw-vlan-strip#hw-vlan-extend");
cmdline_parse_token_string_t cmd_config_rx_mode_flag_value =
TOKEN_STRING_INITIALIZER(struct cmd_config_rx_mode_flag, value,
@@ -1665,7 +1674,7 @@ cmdline_parse_token_string_t cmd_config_rx_mode_flag_value =
cmdline_parse_inst_t cmd_config_rx_mode_flag = {
.f = cmd_config_rx_mode_flag_parsed,
.data = NULL,
- .help_str = "port config all crc-strip|scatter|rx-cksum|hw-vlan|"
+ .help_str = "port config all crc-strip|scatter|rx-cksum|rx-timestamp|hw-vlan|"
"hw-vlan-filter|hw-vlan-strip|hw-vlan-extend on|off",
.tokens = {
(void *)&cmd_config_rx_mode_flag_port,
diff --git a/app/test-pmd/config.c b/app/test-pmd/config.c
index e8e311c..76addf3 100644
--- a/app/test-pmd/config.c
+++ b/app/test-pmd/config.c
@@ -600,6 +600,14 @@ port_offload_cap_display(portid_t port_id)
printf("off\n");
}
+ if (dev_info.rx_offload_capa & DEV_RX_OFFLOAD_TIMESTAMP) {
+ printf("HW timestamp: ");
+ if (dev->data->dev_conf.rxmode.hw_timestamp)
+ printf("on\n");
+ else
+ printf("off\n");
+ }
+
if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_QINQ_INSERT) {
printf("Double VLANs insert: ");
if (ports[port_id].tx_ol_flags &
diff --git a/app/test-pmd/parameters.c b/app/test-pmd/parameters.c
index 2f7f70f..602d98d 100644
--- a/app/test-pmd/parameters.c
+++ b/app/test-pmd/parameters.c
@@ -162,6 +162,7 @@ usage(char* progname)
printf(" --disable-crc-strip: disable CRC stripping by hardware.\n");
printf(" --enable-lro: enable large receive offload.\n");
printf(" --enable-rx-cksum: enable rx hardware checksum offload.\n");
+ printf(" --enable-rx-timestamp: enable rx hardware timestamp offload.\n");
printf(" --disable-hw-vlan: disable hardware vlan.\n");
printf(" --disable-hw-vlan-filter: disable hardware vlan filter.\n");
printf(" --disable-hw-vlan-strip: disable hardware vlan strip.\n");
@@ -601,6 +602,7 @@ launch_args_parse(int argc, char** argv)
{ "disable-crc-strip", 0, 0, 0 },
{ "enable-lro", 0, 0, 0 },
{ "enable-rx-cksum", 0, 0, 0 },
+ { "enable-rx-timestamp", 0, 0, 0 },
{ "enable-scatter", 0, 0, 0 },
{ "disable-hw-vlan", 0, 0, 0 },
{ "disable-hw-vlan-filter", 0, 0, 0 },
@@ -899,6 +901,9 @@ launch_args_parse(int argc, char** argv)
rx_mode.enable_scatter = 1;
if (!strcmp(lgopts[opt_idx].name, "enable-rx-cksum"))
rx_mode.hw_ip_checksum = 1;
+ if (!strcmp(lgopts[opt_idx].name,
+ "enable-rx-timestamp"))
+ rx_mode.hw_timestamp = 1;
if (!strcmp(lgopts[opt_idx].name, "disable-hw-vlan")) {
rx_mode.hw_vlan_filter = 0;
diff --git a/app/test-pmd/rxonly.c b/app/test-pmd/rxonly.c
index 5ef0219..f4d35d7 100644
--- a/app/test-pmd/rxonly.c
+++ b/app/test-pmd/rxonly.c
@@ -158,6 +158,8 @@ pkt_burst_receive(struct fwd_stream *fs)
printf("hash=0x%x ID=0x%x ",
mb->hash.fdir.hash, mb->hash.fdir.id);
}
+ if (ol_flags & PKT_RX_TIMESTAMP)
+ printf(" - timestamp %lu ", mb->timestamp);
if (ol_flags & PKT_RX_VLAN_STRIPPED)
printf(" - VLAN tci=0x%x", mb->vlan_tci);
if (ol_flags & PKT_RX_QINQ_STRIPPED)
diff --git a/app/test-pmd/testpmd.c b/app/test-pmd/testpmd.c
index 5507c0f..ec29908 100644
--- a/app/test-pmd/testpmd.c
+++ b/app/test-pmd/testpmd.c
@@ -339,6 +339,7 @@ struct rte_eth_rxmode rx_mode = {
.hw_vlan_extend = 0, /**< Extended VLAN disabled. */
.jumbo_frame = 0, /**< Jumbo Frame Support disabled. */
.hw_strip_crc = 1, /**< CRC stripping by hardware enabled. */
+ .hw_timestamp = 0, /**< HW timestamp enabled. */
};
struct rte_fdir_conf fdir_conf = {
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* [dpdk-dev] [PATCH v6 3/3] net/mlx5: add Rx HW timestamp
2017-10-03 11:00 ` [dpdk-dev] [PATCH v6 " Raslan Darawsheh
2017-10-03 11:00 ` [dpdk-dev] [PATCH v6 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
@ 2017-10-03 11:00 ` Raslan Darawsheh
2017-10-05 23:23 ` Yongseok Koh
` (3 more replies)
2017-10-04 5:57 ` [dpdk-dev] [PATCH v6 " Shahaf Shuler
2017-10-06 0:54 ` Ferruh Yigit
3 siblings, 4 replies; 51+ messages in thread
From: Raslan Darawsheh @ 2017-10-03 11:00 UTC (permalink / raw)
To: dev; +Cc: yskoh, shahafs, ferruh.yigit
Expose Rx HW timestamp to packet mbufs.
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
---
Changes in v6:
- Rebasing the work on top of 217b1421 ("net/mlx5: separate DPDK from Verbs Rx queue objects")
---
drivers/net/mlx5/mlx5_ethdev.c | 3 ++-
drivers/net/mlx5/mlx5_rxq.c | 6 +++++-
drivers/net/mlx5/mlx5_rxtx.c | 5 +++++
drivers/net/mlx5/mlx5_rxtx.h | 3 ++-
drivers/net/mlx5/mlx5_rxtx_vec_sse.h | 13 ++++++++++++-
5 files changed, 26 insertions(+), 4 deletions(-)
diff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c
index d8bcef4..892c2cc 100644
--- a/drivers/net/mlx5/mlx5_ethdev.c
+++ b/drivers/net/mlx5/mlx5_ethdev.c
@@ -686,7 +686,8 @@ mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
DEV_RX_OFFLOAD_UDP_CKSUM |
DEV_RX_OFFLOAD_TCP_CKSUM) :
0) |
- (priv->hw_vlan_strip ? DEV_RX_OFFLOAD_VLAN_STRIP : 0);
+ (priv->hw_vlan_strip ? DEV_RX_OFFLOAD_VLAN_STRIP : 0) |
+ DEV_RX_OFFLOAD_TIMESTAMP;
if (!priv->mps)
info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT;
if (priv->hw_csum)
diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c
index 9bb6a29..e48e240 100644
--- a/drivers/net/mlx5/mlx5_rxq.c
+++ b/drivers/net/mlx5/mlx5_rxq.c
@@ -609,7 +609,7 @@ mlx5_priv_rxq_ibv_new(struct priv *priv, uint16_t idx)
attr.cq.mlx5 = (struct mlx5dv_cq_init_attr){
.comp_mask = 0,
};
- if (priv->cqe_comp) {
+ if (priv->cqe_comp && !rxq_data->hw_timestamp) {
attr.cq.ibv.comp_mask |= IBV_CQ_INIT_ATTR_MASK_FLAGS;
attr.cq.mlx5.comp_mask |=
MLX5DV_CQ_INIT_ATTR_MASK_COMPRESSED_CQE;
@@ -620,6 +620,8 @@ mlx5_priv_rxq_ibv_new(struct priv *priv, uint16_t idx)
*/
if (rxq_check_vec_support(rxq_data) < 0)
cqe_n *= 2;
+ } else if (priv->cqe_comp && rxq_data->hw_timestamp) {
+ DEBUG("Rx CQE compression is disabled for HW timestamp");
}
tmpl->cq = ibv_cq_ex_to_cq(mlx5dv_create_cq(priv->ctx, &attr.cq.ibv,
&attr.cq.mlx5));
@@ -936,6 +938,8 @@ mlx5_priv_rxq_new(struct priv *priv, uint16_t idx, uint16_t desc,
if (priv->hw_csum_l2tun)
tmpl->rxq.csum_l2tun =
!!dev->data->dev_conf.rxmode.hw_ip_checksum;
+ tmpl->rxq.hw_timestamp =
+ !!dev->data->dev_conf.rxmode.hw_timestamp;
/* Configure VLAN stripping. */
tmpl->rxq.vlan_strip = (priv->hw_vlan_strip &&
!!dev->data->dev_conf.rxmode.hw_vlan_strip);
diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c
index 275cd6a..961967b 100644
--- a/drivers/net/mlx5/mlx5_rxtx.c
+++ b/drivers/net/mlx5/mlx5_rxtx.c
@@ -1887,6 +1887,11 @@ mlx5_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
pkt->vlan_tci =
rte_be_to_cpu_16(cqe->vlan_info);
}
+ if (rxq->hw_timestamp) {
+ pkt->timestamp =
+ rte_be_to_cpu_64(cqe->timestamp);
+ pkt->ol_flags |= PKT_RX_TIMESTAMP;
+ }
if (rxq->crc_present)
len -= ETHER_CRC_LEN;
PKT_LEN(pkt) = len;
diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h
index 8470a55..c207a8b 100644
--- a/drivers/net/mlx5/mlx5_rxtx.h
+++ b/drivers/net/mlx5/mlx5_rxtx.h
@@ -106,6 +106,7 @@ struct rxq_zip {
struct mlx5_rxq_data {
unsigned int csum:1; /* Enable checksum offloading. */
unsigned int csum_l2tun:1; /* Same for L2 tunnels. */
+ unsigned int hw_timestamp:1; /* Enable HW timestamp. */
unsigned int vlan_strip:1; /* Enable VLAN stripping. */
unsigned int crc_present:1; /* CRC must be subtracted. */
unsigned int sges_n:2; /* Log 2 of SGEs (max buffers per packet). */
@@ -115,7 +116,7 @@ struct mlx5_rxq_data {
unsigned int rss_hash:1; /* RSS hash result is enabled. */
unsigned int mark:1; /* Marked flow available on the queue. */
unsigned int pending_err:1; /* CQE error needs to be handled. */
- unsigned int :7; /* Remaining bits. */
+ unsigned int :6; /* Remaining bits. */
volatile uint32_t *rq_db;
volatile uint32_t *cq_db;
uint16_t rq_ci;
diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
index c2142d7..e9819b7 100644
--- a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
+++ b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
@@ -545,7 +545,8 @@ rxq_cq_to_ptype_oflags_v(struct mlx5_rxq_data *rxq, __m128i cqes[4],
{
__m128i pinfo0, pinfo1;
__m128i pinfo, ptype;
- __m128i ol_flags = _mm_set1_epi32(rxq->rss_hash * PKT_RX_RSS_HASH);
+ __m128i ol_flags = _mm_set1_epi32(rxq->rss_hash * PKT_RX_RSS_HASH |
+ rxq->hw_timestamp * PKT_RX_TIMESTAMP);
__m128i cv_flags;
const __m128i zero = _mm_setzero_si128();
const __m128i ptype_mask =
@@ -938,6 +939,16 @@ rxq_burst_v(struct mlx5_rxq_data *rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
rxq->pending_err |= !!_mm_cvtsi128_si64(opcode);
/* D.5 fill in mbuf - rearm_data and packet_type. */
rxq_cq_to_ptype_oflags_v(rxq, cqes, opcode, &pkts[pos]);
+ if (rxq->hw_timestamp) {
+ pkts[pos]->timestamp =
+ rte_be_to_cpu_64(cq[pos].timestamp);
+ pkts[pos + 1]->timestamp =
+ rte_be_to_cpu_64(cq[pos + p1].timestamp);
+ pkts[pos + 2]->timestamp =
+ rte_be_to_cpu_64(cq[pos + p2].timestamp);
+ pkts[pos + 3]->timestamp =
+ rte_be_to_cpu_64(cq[pos + p3].timestamp);
+ }
#ifdef MLX5_PMD_SOFT_COUNTERS
/* Add up received bytes count. */
byte_cnt = _mm_shuffle_epi8(op_own, len_shuf_mask);
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [dpdk-dev] [PATCH v6 1/3] ethdev: add Rx HW timestamp capability
2017-10-03 11:00 ` [dpdk-dev] [PATCH v6 " Raslan Darawsheh
2017-10-03 11:00 ` [dpdk-dev] [PATCH v6 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
2017-10-03 11:00 ` [dpdk-dev] [PATCH v6 3/3] net/mlx5: " Raslan Darawsheh
@ 2017-10-04 5:57 ` Shahaf Shuler
2017-10-06 0:54 ` Ferruh Yigit
3 siblings, 0 replies; 51+ messages in thread
From: Shahaf Shuler @ 2017-10-04 5:57 UTC (permalink / raw)
To: Raslan Darawsheh, dev; +Cc: Yongseok Koh, ferruh.yigit
Hi Raslan,
Tuesday, October 3, 2017 2:00 PM, Raslan Darawsheh
> Add a new offload capability flag for Rx HW timestamp and enabling/disabling
> this via rte_eth_rxmode.
>
> Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
> ---
> This patch should be applied after after this series:
> http://dpdk.org/dev/patchwork/patch/29368/
>
> Changes in v6:
> - Rebased properly on top of the mentioned patch series.
> - Documentation update
> ---
> doc/guides/nics/features.rst | 11 +++++++++++
> lib/librte_ether/rte_ethdev.c | 6 ++++++ lib/librte_ether/rte_ethdev.h | 2
> ++
> 3 files changed, 19 insertions(+)
>
> diff --git a/doc/guides/nics/features.rst b/doc/guides/nics/features.rst index
> 4e68144..e03e6d6 100644
> --- a/doc/guides/nics/features.rst
> +++ b/doc/guides/nics/features.rst
> @@ -567,6 +567,17 @@ Supports L4 checksum offload.
> * **[provides] rte_eth_dev_info**:
> ``rx_offload_capa,rx_queue_offload_capa:DEV_RX_OFFLOAD_UDP_CKSUM
> ,DEV_RX_OFFLOAD_TCP_CKSUM``,
>
> ``tx_offload_capa:DEV_TX_OFFLOAD_UDP_CKSUM,DEV_TX_OFFLOAD_TCP
> _CKSUM,DEV_TX_OFFLOAD_SCTP_CKSUM``.
>
> +.. _nic_features_hw_timestamp:
> +
> +Timestamp offload
> +-----------------
> +
> +Supports Timestamp.
> +
> +* **[uses] rte_eth_rxconf,rte_eth_rxmode**:
> ``offloads:DEV_RX_OFFLOAD_TIMESTAMP``.
> +* **[provides] mbuf**: ``mbuf.ol_flags:PKT_RX_TIMESTAMP``.
> +* **[provides] mbuf**: ``mbuf.timestamp``.
> +* **[provides] rte_eth_dev_info**:
> ``rx_offload_capa:DEV_RX_OFFLOAD_TIMESTAMP``.
The capability can be reported on both rx_offload_capa and rx_queue_offload_capa. Better to have it:
rx_offload_capa,rx_queue_offload_capa: DEV_RX_OFFLOAD_TIMESTAMP.
>
> .. _nic_features_macsec_offload:
>
> diff --git a/lib/librte_ether/rte_ethdev.c b/lib/librte_ether/rte_ethdev.c
> index 9b73d23..c5c5164 100644
> --- a/lib/librte_ether/rte_ethdev.c
> +++ b/lib/librte_ether/rte_ethdev.c
> @@ -715,6 +715,8 @@ rte_eth_convert_rx_offload_bitfield(const struct
> rte_eth_rxmode *rxmode,
> offloads |= DEV_RX_OFFLOAD_SCATTER;
> if (rxmode->enable_lro == 1)
> offloads |= DEV_RX_OFFLOAD_TCP_LRO;
> + if (rxmode->hw_timestamp == 1)
> + offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
>
> *rx_offloads = offloads;
> }
> @@ -763,6 +765,10 @@ rte_eth_convert_rx_offloads(const uint64_t
> rx_offloads,
> rxmode->enable_lro = 1;
> else
> rxmode->enable_lro = 0;
> + if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
> + rxmode->hw_timestamp = 1;
> + else
> + rxmode->hw_timestamp = 0;
> }
>
> int
> diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h
> index e02d578..8bb9a6a 100644
> --- a/lib/librte_ether/rte_ethdev.h
> +++ b/lib/librte_ether/rte_ethdev.h
> @@ -369,6 +369,7 @@ struct rte_eth_rxmode {
> hw_strip_crc : 1, /**< Enable CRC stripping by hardware. */
> enable_scatter : 1, /**< Enable scatter packets rx handler */
> enable_lro : 1, /**< Enable LRO */
> + hw_timestamp : 1, /**< Enable HW timestamp */
> /**
> * When set the offload bitfield should be ignored.
> * Instead per-port Rx offloads should be set on offloads @@
> -940,6 +941,7 @@ struct rte_eth_conf {
> #define DEV_RX_OFFLOAD_JUMBO_FRAME 0x00000800
> #define DEV_RX_OFFLOAD_CRC_STRIP 0x00001000
> #define DEV_RX_OFFLOAD_SCATTER 0x00002000
> +#define DEV_RX_OFFLOAD_TIMESTAMP 0x00004000
> #define DEV_RX_OFFLOAD_CHECKSUM (DEV_RX_OFFLOAD_IPV4_CKSUM |
> \
> DEV_RX_OFFLOAD_UDP_CKSUM | \
> DEV_RX_OFFLOAD_TCP_CKSUM)
> --
> 2.7.4
Otherwise,
Reviewed-By: Shahaf Shuler <shahafs@mellanox.com>
^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [dpdk-dev] [PATCH v6 2/3] app/testpmd: add Rx HW timestamp
2017-10-03 11:00 ` [dpdk-dev] [PATCH v6 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
@ 2017-10-05 23:11 ` Yongseok Koh
0 siblings, 0 replies; 51+ messages in thread
From: Yongseok Koh @ 2017-10-05 23:11 UTC (permalink / raw)
To: Raslan Darawsheh; +Cc: dev, Shahaf Shuler, ferruh.yigit
> On Oct 3, 2017, at 4:00 AM, Raslan Darawsheh <rasland@mellanox.com> wrote:
>
> Add enabling/disabling Rx HW timestamp from
> command line and parameter.
>
> Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
> ---
Acked-by: Yongseok Koh <yskoh@mellanox.com>
Thanks
^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [dpdk-dev] [PATCH v6 3/3] net/mlx5: add Rx HW timestamp
2017-10-03 11:00 ` [dpdk-dev] [PATCH v6 3/3] net/mlx5: " Raslan Darawsheh
@ 2017-10-05 23:23 ` Yongseok Koh
2017-10-08 8:24 ` [dpdk-dev] [PATCH v7 1/3] ethdev: add Rx HW timestamp capability Raslan Darawsheh
` (2 subsequent siblings)
3 siblings, 0 replies; 51+ messages in thread
From: Yongseok Koh @ 2017-10-05 23:23 UTC (permalink / raw)
To: Raslan Darawsheh; +Cc: dev, Shahaf Shuler, ferruh.yigit
> On Oct 3, 2017, at 4:00 AM, Raslan Darawsheh <rasland@mellanox.com> wrote:
>
> Expose Rx HW timestamp to packet mbufs.
>
> Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
> ---
> Changes in v6:
> - Rebasing the work on top of 217b1421 ("net/mlx5: separate DPDK from Verbs Rx queue objects")
> ---
Raslan,
It looks like you also rebased it on top of my ARM NEON patch set:
[PATCH v1 0/7] net/mlx5: add vectorized Rx/Tx burst for ARM
So, it might not be possible for Ferruh to apply on Nelio's patchset, because
filenames are different.
You can either
1) Rebase it on only Nelio's patchset, then I need to add the timestamp code for
ARM NEON to my patch.
2) Rebase it on my patchset with adding the timestamp code for ARM NEON by
yourself.
I'm okay with both ways.
If you choose 1), I ack this patch.
Acked-by: Yongseok Koh <yskoh@mellanox.com>
Yongseok
^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [dpdk-dev] [PATCH v6 1/3] ethdev: add Rx HW timestamp capability
2017-10-03 11:00 ` [dpdk-dev] [PATCH v6 " Raslan Darawsheh
` (2 preceding siblings ...)
2017-10-04 5:57 ` [dpdk-dev] [PATCH v6 " Shahaf Shuler
@ 2017-10-06 0:54 ` Ferruh Yigit
3 siblings, 0 replies; 51+ messages in thread
From: Ferruh Yigit @ 2017-10-06 0:54 UTC (permalink / raw)
To: Raslan Darawsheh, dev; +Cc: yskoh, shahafs
On 10/3/2017 12:00 PM, Raslan Darawsheh wrote:
> Add a new offload capability flag for Rx HW
> timestamp and enabling/disabling this via rte_eth_rxmode.
>
> Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
<...>
> +++ b/doc/guides/nics/features.rst
> @@ -567,6 +567,17 @@ Supports L4 checksum offload.
> * **[provides] rte_eth_dev_info**: ``rx_offload_capa,rx_queue_offload_capa:DEV_RX_OFFLOAD_UDP_CKSUM,DEV_RX_OFFLOAD_TCP_CKSUM``,
> ``tx_offload_capa:DEV_TX_OFFLOAD_UDP_CKSUM,DEV_TX_OFFLOAD_TCP_CKSUM,DEV_TX_OFFLOAD_SCTP_CKSUM``.
>
> +.. _nic_features_hw_timestamp:
> +
> +Timestamp offload
> +-----------------
> +
> +Supports Timestamp.
> +
> +* **[uses] rte_eth_rxconf,rte_eth_rxmode**: ``offloads:DEV_RX_OFFLOAD_TIMESTAMP``.
> +* **[provides] mbuf**: ``mbuf.ol_flags:PKT_RX_TIMESTAMP``.
> +* **[provides] mbuf**: ``mbuf.timestamp``.
> +* **[provides] rte_eth_dev_info**: ``rx_offload_capa:DEV_RX_OFFLOAD_TIMESTAMP``.
Can you also add this new feature to default.ini file?
^ permalink raw reply [flat|nested] 51+ messages in thread
* [dpdk-dev] [PATCH v7 1/3] ethdev: add Rx HW timestamp capability
2017-10-03 11:00 ` [dpdk-dev] [PATCH v6 3/3] net/mlx5: " Raslan Darawsheh
2017-10-05 23:23 ` Yongseok Koh
@ 2017-10-08 8:24 ` Raslan Darawsheh
2017-10-08 8:24 ` [dpdk-dev] [PATCH v7 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
2017-10-08 8:24 ` [dpdk-dev] [PATCH v7 3/3] net/mlx5: " Raslan Darawsheh
2017-10-10 7:45 ` [dpdk-dev] [PATCH v8 1/3] ethdev: add Rx HW timestamp capability Raslan Darawsheh
2017-10-10 14:37 ` [dpdk-dev] [PATCH v9 " Raslan Darawsheh
3 siblings, 2 replies; 51+ messages in thread
From: Raslan Darawsheh @ 2017-10-08 8:24 UTC (permalink / raw)
To: dev; +Cc: shahafs, yskoh, ferruh.yigit
Add a new offload capability flag for Rx HW
timestamp and enabling/disabling this via rte_eth_rxmode.
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
---
Changes in v7:
- Updated features.rst to use both rx_offload_capa,rx_queue_offload_capa
- Updated default.ini to have Timestamp offload
---
doc/guides/nics/features.rst | 11 +++++++++++
doc/guides/nics/features/default.ini | 1 +
lib/librte_ether/rte_ethdev.c | 6 ++++++
lib/librte_ether/rte_ethdev.h | 2 ++
4 files changed, 20 insertions(+)
diff --git a/doc/guides/nics/features.rst b/doc/guides/nics/features.rst
index 4e68144..1d691b9 100644
--- a/doc/guides/nics/features.rst
+++ b/doc/guides/nics/features.rst
@@ -567,6 +567,17 @@ Supports L4 checksum offload.
* **[provides] rte_eth_dev_info**: ``rx_offload_capa,rx_queue_offload_capa:DEV_RX_OFFLOAD_UDP_CKSUM,DEV_RX_OFFLOAD_TCP_CKSUM``,
``tx_offload_capa:DEV_TX_OFFLOAD_UDP_CKSUM,DEV_TX_OFFLOAD_TCP_CKSUM,DEV_TX_OFFLOAD_SCTP_CKSUM``.
+.. _nic_features_hw_timestamp:
+
+Timestamp offload
+-----------------
+
+Supports Timestamp.
+
+* **[uses] rte_eth_rxconf,rte_eth_rxmode**: ``offloads:DEV_RX_OFFLOAD_TIMESTAMP``.
+* **[provides] mbuf**: ``mbuf.ol_flags:PKT_RX_TIMESTAMP``.
+* **[provides] mbuf**: ``mbuf.timestamp``.
+* **[provides] rte_eth_dev_info**: ``rx_offload_capa,rx_queue_offload_capa: DEV_RX_OFFLOAD_TIMESTAMP``.
.. _nic_features_macsec_offload:
diff --git a/doc/guides/nics/features/default.ini b/doc/guides/nics/features/default.ini
index 5424306..f9a1e6b 100644
--- a/doc/guides/nics/features/default.ini
+++ b/doc/guides/nics/features/default.ini
@@ -48,6 +48,7 @@ VLAN offload =
QinQ offload =
L3 checksum offload =
L4 checksum offload =
+Timestamp offload =
MACsec offload =
Inner L3 checksum =
Inner L4 checksum =
diff --git a/lib/librte_ether/rte_ethdev.c b/lib/librte_ether/rte_ethdev.c
index 9b73d23..c5c5164 100644
--- a/lib/librte_ether/rte_ethdev.c
+++ b/lib/librte_ether/rte_ethdev.c
@@ -715,6 +715,8 @@ rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
offloads |= DEV_RX_OFFLOAD_SCATTER;
if (rxmode->enable_lro == 1)
offloads |= DEV_RX_OFFLOAD_TCP_LRO;
+ if (rxmode->hw_timestamp == 1)
+ offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
*rx_offloads = offloads;
}
@@ -763,6 +765,10 @@ rte_eth_convert_rx_offloads(const uint64_t rx_offloads,
rxmode->enable_lro = 1;
else
rxmode->enable_lro = 0;
+ if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
+ rxmode->hw_timestamp = 1;
+ else
+ rxmode->hw_timestamp = 0;
}
int
diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h
index e02d578..8bb9a6a 100644
--- a/lib/librte_ether/rte_ethdev.h
+++ b/lib/librte_ether/rte_ethdev.h
@@ -369,6 +369,7 @@ struct rte_eth_rxmode {
hw_strip_crc : 1, /**< Enable CRC stripping by hardware. */
enable_scatter : 1, /**< Enable scatter packets rx handler */
enable_lro : 1, /**< Enable LRO */
+ hw_timestamp : 1, /**< Enable HW timestamp */
/**
* When set the offload bitfield should be ignored.
* Instead per-port Rx offloads should be set on offloads
@@ -940,6 +941,7 @@ struct rte_eth_conf {
#define DEV_RX_OFFLOAD_JUMBO_FRAME 0x00000800
#define DEV_RX_OFFLOAD_CRC_STRIP 0x00001000
#define DEV_RX_OFFLOAD_SCATTER 0x00002000
+#define DEV_RX_OFFLOAD_TIMESTAMP 0x00004000
#define DEV_RX_OFFLOAD_CHECKSUM (DEV_RX_OFFLOAD_IPV4_CKSUM | \
DEV_RX_OFFLOAD_UDP_CKSUM | \
DEV_RX_OFFLOAD_TCP_CKSUM)
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* [dpdk-dev] [PATCH v7 2/3] app/testpmd: add Rx HW timestamp
2017-10-08 8:24 ` [dpdk-dev] [PATCH v7 1/3] ethdev: add Rx HW timestamp capability Raslan Darawsheh
@ 2017-10-08 8:24 ` Raslan Darawsheh
2017-10-08 8:24 ` [dpdk-dev] [PATCH v7 3/3] net/mlx5: " Raslan Darawsheh
1 sibling, 0 replies; 51+ messages in thread
From: Raslan Darawsheh @ 2017-10-08 8:24 UTC (permalink / raw)
To: dev; +Cc: shahafs, yskoh, ferruh.yigit
Add enabling/disabling Rx HW timestamp from
command line and parameter.
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
---
app/test-pmd/cmdline.c | 15 ++++++++++++---
app/test-pmd/config.c | 8 ++++++++
app/test-pmd/parameters.c | 5 +++++
app/test-pmd/rxonly.c | 2 ++
app/test-pmd/testpmd.c | 1 +
5 files changed, 28 insertions(+), 3 deletions(-)
diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index 4f2d731..80a249e 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -675,7 +675,7 @@ static void cmd_help_long_parsed(void *parsed_result,
"port config all max-pkt-len (value)\n"
" Set the max packet length.\n\n"
- "port config all (crc-strip|scatter|rx-cksum|hw-vlan|hw-vlan-filter|"
+ "port config all (crc-strip|scatter|rx-cksum|rx-timestamp|hw-vlan|hw-vlan-filter|"
"hw-vlan-strip|hw-vlan-extend|drop-en)"
" (on|off)\n"
" Set crc-strip/scatter/rx-checksum/hardware-vlan/drop_en"
@@ -1588,6 +1588,15 @@ cmd_config_rx_mode_flag_parsed(void *parsed_result,
printf("Unknown parameter\n");
return;
}
+ } else if (!strcmp(res->name, "rx-timestamp")) {
+ if (!strcmp(res->value, "on"))
+ rx_mode.hw_timestamp = 1;
+ else if (!strcmp(res->value, "off"))
+ rx_mode.hw_timestamp = 0;
+ else {
+ printf("Unknown parameter\n");
+ return;
+ }
} else if (!strcmp(res->name, "hw-vlan")) {
if (!strcmp(res->value, "on")) {
rx_mode.hw_vlan_filter = 1;
@@ -1656,7 +1665,7 @@ cmdline_parse_token_string_t cmd_config_rx_mode_flag_all =
TOKEN_STRING_INITIALIZER(struct cmd_config_rx_mode_flag, all, "all");
cmdline_parse_token_string_t cmd_config_rx_mode_flag_name =
TOKEN_STRING_INITIALIZER(struct cmd_config_rx_mode_flag, name,
- "crc-strip#scatter#rx-cksum#hw-vlan#"
+ "crc-strip#scatter#rx-cksum#rx-timestamp#hw-vlan#"
"hw-vlan-filter#hw-vlan-strip#hw-vlan-extend");
cmdline_parse_token_string_t cmd_config_rx_mode_flag_value =
TOKEN_STRING_INITIALIZER(struct cmd_config_rx_mode_flag, value,
@@ -1665,7 +1674,7 @@ cmdline_parse_token_string_t cmd_config_rx_mode_flag_value =
cmdline_parse_inst_t cmd_config_rx_mode_flag = {
.f = cmd_config_rx_mode_flag_parsed,
.data = NULL,
- .help_str = "port config all crc-strip|scatter|rx-cksum|hw-vlan|"
+ .help_str = "port config all crc-strip|scatter|rx-cksum|rx-timestamp|hw-vlan|"
"hw-vlan-filter|hw-vlan-strip|hw-vlan-extend on|off",
.tokens = {
(void *)&cmd_config_rx_mode_flag_port,
diff --git a/app/test-pmd/config.c b/app/test-pmd/config.c
index e8e311c..76addf3 100644
--- a/app/test-pmd/config.c
+++ b/app/test-pmd/config.c
@@ -600,6 +600,14 @@ port_offload_cap_display(portid_t port_id)
printf("off\n");
}
+ if (dev_info.rx_offload_capa & DEV_RX_OFFLOAD_TIMESTAMP) {
+ printf("HW timestamp: ");
+ if (dev->data->dev_conf.rxmode.hw_timestamp)
+ printf("on\n");
+ else
+ printf("off\n");
+ }
+
if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_QINQ_INSERT) {
printf("Double VLANs insert: ");
if (ports[port_id].tx_ol_flags &
diff --git a/app/test-pmd/parameters.c b/app/test-pmd/parameters.c
index 2f7f70f..602d98d 100644
--- a/app/test-pmd/parameters.c
+++ b/app/test-pmd/parameters.c
@@ -162,6 +162,7 @@ usage(char* progname)
printf(" --disable-crc-strip: disable CRC stripping by hardware.\n");
printf(" --enable-lro: enable large receive offload.\n");
printf(" --enable-rx-cksum: enable rx hardware checksum offload.\n");
+ printf(" --enable-rx-timestamp: enable rx hardware timestamp offload.\n");
printf(" --disable-hw-vlan: disable hardware vlan.\n");
printf(" --disable-hw-vlan-filter: disable hardware vlan filter.\n");
printf(" --disable-hw-vlan-strip: disable hardware vlan strip.\n");
@@ -601,6 +602,7 @@ launch_args_parse(int argc, char** argv)
{ "disable-crc-strip", 0, 0, 0 },
{ "enable-lro", 0, 0, 0 },
{ "enable-rx-cksum", 0, 0, 0 },
+ { "enable-rx-timestamp", 0, 0, 0 },
{ "enable-scatter", 0, 0, 0 },
{ "disable-hw-vlan", 0, 0, 0 },
{ "disable-hw-vlan-filter", 0, 0, 0 },
@@ -899,6 +901,9 @@ launch_args_parse(int argc, char** argv)
rx_mode.enable_scatter = 1;
if (!strcmp(lgopts[opt_idx].name, "enable-rx-cksum"))
rx_mode.hw_ip_checksum = 1;
+ if (!strcmp(lgopts[opt_idx].name,
+ "enable-rx-timestamp"))
+ rx_mode.hw_timestamp = 1;
if (!strcmp(lgopts[opt_idx].name, "disable-hw-vlan")) {
rx_mode.hw_vlan_filter = 0;
diff --git a/app/test-pmd/rxonly.c b/app/test-pmd/rxonly.c
index 5ef0219..f4d35d7 100644
--- a/app/test-pmd/rxonly.c
+++ b/app/test-pmd/rxonly.c
@@ -158,6 +158,8 @@ pkt_burst_receive(struct fwd_stream *fs)
printf("hash=0x%x ID=0x%x ",
mb->hash.fdir.hash, mb->hash.fdir.id);
}
+ if (ol_flags & PKT_RX_TIMESTAMP)
+ printf(" - timestamp %lu ", mb->timestamp);
if (ol_flags & PKT_RX_VLAN_STRIPPED)
printf(" - VLAN tci=0x%x", mb->vlan_tci);
if (ol_flags & PKT_RX_QINQ_STRIPPED)
diff --git a/app/test-pmd/testpmd.c b/app/test-pmd/testpmd.c
index 5507c0f..ec29908 100644
--- a/app/test-pmd/testpmd.c
+++ b/app/test-pmd/testpmd.c
@@ -339,6 +339,7 @@ struct rte_eth_rxmode rx_mode = {
.hw_vlan_extend = 0, /**< Extended VLAN disabled. */
.jumbo_frame = 0, /**< Jumbo Frame Support disabled. */
.hw_strip_crc = 1, /**< CRC stripping by hardware enabled. */
+ .hw_timestamp = 0, /**< HW timestamp enabled. */
};
struct rte_fdir_conf fdir_conf = {
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* [dpdk-dev] [PATCH v7 3/3] net/mlx5: add Rx HW timestamp
2017-10-08 8:24 ` [dpdk-dev] [PATCH v7 1/3] ethdev: add Rx HW timestamp capability Raslan Darawsheh
2017-10-08 8:24 ` [dpdk-dev] [PATCH v7 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
@ 2017-10-08 8:24 ` Raslan Darawsheh
2017-10-09 19:17 ` Ferruh Yigit
1 sibling, 1 reply; 51+ messages in thread
From: Raslan Darawsheh @ 2017-10-08 8:24 UTC (permalink / raw)
To: dev; +Cc: shahafs, yskoh, ferruh.yigit
Expose Rx HW timestamp to packet mbufs.
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
---
Changes in v7:
- Rebasing the work on top ot c814b93b ("net/mlx5: add vectorized Rx/Tx burst for ARM")
- Adding the timestamp code for ARM NEON
Changes in v6:
- Rebasing the work on top of 217b1421 ("net/mlx5: separate DPDK from Verbs Rx queue objects")
---
drivers/net/mlx5/mlx5_ethdev.c | 3 ++-
drivers/net/mlx5/mlx5_rxq.c | 6 +++++-
drivers/net/mlx5/mlx5_rxtx.c | 5 +++++
drivers/net/mlx5/mlx5_rxtx.h | 3 ++-
drivers/net/mlx5/mlx5_rxtx_vec_neon.h | 14 +++++++++++++-
drivers/net/mlx5/mlx5_rxtx_vec_sse.h | 13 ++++++++++++-
6 files changed, 39 insertions(+), 5 deletions(-)
diff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c
index d8bcef4..892c2cc 100644
--- a/drivers/net/mlx5/mlx5_ethdev.c
+++ b/drivers/net/mlx5/mlx5_ethdev.c
@@ -686,7 +686,8 @@ mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
DEV_RX_OFFLOAD_UDP_CKSUM |
DEV_RX_OFFLOAD_TCP_CKSUM) :
0) |
- (priv->hw_vlan_strip ? DEV_RX_OFFLOAD_VLAN_STRIP : 0);
+ (priv->hw_vlan_strip ? DEV_RX_OFFLOAD_VLAN_STRIP : 0) |
+ DEV_RX_OFFLOAD_TIMESTAMP;
if (!priv->mps)
info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT;
if (priv->hw_csum)
diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c
index 9bb6a29..e48e240 100644
--- a/drivers/net/mlx5/mlx5_rxq.c
+++ b/drivers/net/mlx5/mlx5_rxq.c
@@ -609,7 +609,7 @@ mlx5_priv_rxq_ibv_new(struct priv *priv, uint16_t idx)
attr.cq.mlx5 = (struct mlx5dv_cq_init_attr){
.comp_mask = 0,
};
- if (priv->cqe_comp) {
+ if (priv->cqe_comp && !rxq_data->hw_timestamp) {
attr.cq.ibv.comp_mask |= IBV_CQ_INIT_ATTR_MASK_FLAGS;
attr.cq.mlx5.comp_mask |=
MLX5DV_CQ_INIT_ATTR_MASK_COMPRESSED_CQE;
@@ -620,6 +620,8 @@ mlx5_priv_rxq_ibv_new(struct priv *priv, uint16_t idx)
*/
if (rxq_check_vec_support(rxq_data) < 0)
cqe_n *= 2;
+ } else if (priv->cqe_comp && rxq_data->hw_timestamp) {
+ DEBUG("Rx CQE compression is disabled for HW timestamp");
}
tmpl->cq = ibv_cq_ex_to_cq(mlx5dv_create_cq(priv->ctx, &attr.cq.ibv,
&attr.cq.mlx5));
@@ -936,6 +938,8 @@ mlx5_priv_rxq_new(struct priv *priv, uint16_t idx, uint16_t desc,
if (priv->hw_csum_l2tun)
tmpl->rxq.csum_l2tun =
!!dev->data->dev_conf.rxmode.hw_ip_checksum;
+ tmpl->rxq.hw_timestamp =
+ !!dev->data->dev_conf.rxmode.hw_timestamp;
/* Configure VLAN stripping. */
tmpl->rxq.vlan_strip = (priv->hw_vlan_strip &&
!!dev->data->dev_conf.rxmode.hw_vlan_strip);
diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c
index 275cd6a..961967b 100644
--- a/drivers/net/mlx5/mlx5_rxtx.c
+++ b/drivers/net/mlx5/mlx5_rxtx.c
@@ -1887,6 +1887,11 @@ mlx5_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
pkt->vlan_tci =
rte_be_to_cpu_16(cqe->vlan_info);
}
+ if (rxq->hw_timestamp) {
+ pkt->timestamp =
+ rte_be_to_cpu_64(cqe->timestamp);
+ pkt->ol_flags |= PKT_RX_TIMESTAMP;
+ }
if (rxq->crc_present)
len -= ETHER_CRC_LEN;
PKT_LEN(pkt) = len;
diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h
index 8470a55..c207a8b 100644
--- a/drivers/net/mlx5/mlx5_rxtx.h
+++ b/drivers/net/mlx5/mlx5_rxtx.h
@@ -106,6 +106,7 @@ struct rxq_zip {
struct mlx5_rxq_data {
unsigned int csum:1; /* Enable checksum offloading. */
unsigned int csum_l2tun:1; /* Same for L2 tunnels. */
+ unsigned int hw_timestamp:1; /* Enable HW timestamp. */
unsigned int vlan_strip:1; /* Enable VLAN stripping. */
unsigned int crc_present:1; /* CRC must be subtracted. */
unsigned int sges_n:2; /* Log 2 of SGEs (max buffers per packet). */
@@ -115,7 +116,7 @@ struct mlx5_rxq_data {
unsigned int rss_hash:1; /* RSS hash result is enabled. */
unsigned int mark:1; /* Marked flow available on the queue. */
unsigned int pending_err:1; /* CQE error needs to be handled. */
- unsigned int :7; /* Remaining bits. */
+ unsigned int :6; /* Remaining bits. */
volatile uint32_t *rq_db;
volatile uint32_t *cq_db;
uint16_t rq_ci;
diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h
index 86b37d5..c8d8d64 100644
--- a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h
+++ b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h
@@ -566,7 +566,9 @@ rxq_cq_to_ptype_oflags_v(struct mlx5_rxq_data *rxq,
{
uint16x4_t ptype;
uint32x4_t pinfo, cv_flags;
- uint32x4_t ol_flags = vdupq_n_u32(rxq->rss_hash * PKT_RX_RSS_HASH);
+ uint32x4_t ol_flags =
+ vdupq_n_u32(rxq->rss_hash * PKT_RX_RSS_HASH |
+ rxq->hw_timestamp * PKT_RX_TIMESTAMP);
const uint32x4_t ptype_ol_mask = { 0x106, 0x106, 0x106, 0x106 };
const uint8x16_t cv_flag_sel = {
0,
@@ -973,6 +975,16 @@ rxq_burst_v(struct mlx5_rxq_data *rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
/* C.4 fill in mbuf - rearm_data and packet_type. */
rxq_cq_to_ptype_oflags_v(rxq, ptype_info, flow_tag,
opcode, &elts[pos]);
+ if (rxq->hw_timestamp) {
+ pkts[pos]->timestamp =
+ rte_be_to_cpu_64(cq[pos].timestamp);
+ pkts[pos + 1]->timestamp =
+ rte_be_to_cpu_64(cq[pos + 1].timestamp);
+ pkts[pos + 2]->timestamp =
+ rte_be_to_cpu_64(cq[pos + 2].timestamp);
+ pkts[pos + 3]->timestamp =
+ rte_be_to_cpu_64(cq[pos + 3].timestamp);
+ }
#ifdef MLX5_PMD_SOFT_COUNTERS
/* Add up received bytes count. */
byte_cnt = vbic_u16(byte_cnt, invalid_mask);
diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
index c2142d7..e9819b7 100644
--- a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
+++ b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
@@ -545,7 +545,8 @@ rxq_cq_to_ptype_oflags_v(struct mlx5_rxq_data *rxq, __m128i cqes[4],
{
__m128i pinfo0, pinfo1;
__m128i pinfo, ptype;
- __m128i ol_flags = _mm_set1_epi32(rxq->rss_hash * PKT_RX_RSS_HASH);
+ __m128i ol_flags = _mm_set1_epi32(rxq->rss_hash * PKT_RX_RSS_HASH |
+ rxq->hw_timestamp * PKT_RX_TIMESTAMP);
__m128i cv_flags;
const __m128i zero = _mm_setzero_si128();
const __m128i ptype_mask =
@@ -938,6 +939,16 @@ rxq_burst_v(struct mlx5_rxq_data *rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
rxq->pending_err |= !!_mm_cvtsi128_si64(opcode);
/* D.5 fill in mbuf - rearm_data and packet_type. */
rxq_cq_to_ptype_oflags_v(rxq, cqes, opcode, &pkts[pos]);
+ if (rxq->hw_timestamp) {
+ pkts[pos]->timestamp =
+ rte_be_to_cpu_64(cq[pos].timestamp);
+ pkts[pos + 1]->timestamp =
+ rte_be_to_cpu_64(cq[pos + p1].timestamp);
+ pkts[pos + 2]->timestamp =
+ rte_be_to_cpu_64(cq[pos + p2].timestamp);
+ pkts[pos + 3]->timestamp =
+ rte_be_to_cpu_64(cq[pos + p3].timestamp);
+ }
#ifdef MLX5_PMD_SOFT_COUNTERS
/* Add up received bytes count. */
byte_cnt = _mm_shuffle_epi8(op_own, len_shuf_mask);
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [dpdk-dev] [PATCH v7 3/3] net/mlx5: add Rx HW timestamp
2017-10-08 8:24 ` [dpdk-dev] [PATCH v7 3/3] net/mlx5: " Raslan Darawsheh
@ 2017-10-09 19:17 ` Ferruh Yigit
0 siblings, 0 replies; 51+ messages in thread
From: Ferruh Yigit @ 2017-10-09 19:17 UTC (permalink / raw)
To: Raslan Darawsheh, dev; +Cc: shahafs, yskoh
On 10/8/2017 9:24 AM, Raslan Darawsheh wrote:
> Expose Rx HW timestamp to packet mbufs.
>
> Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
> ---
> Changes in v7:
> - Rebasing the work on top ot c814b93b ("net/mlx5: add vectorized Rx/Tx burst for ARM")
Hi Raslan,
Since dependent patches merged into next-net, can you please rebase on
top of latest next-net? Sorry, I hope this will be last time.
Thanks,
ferruh
> - Adding the timestamp code for ARM NEON
>
> Changes in v6:
> - Rebasing the work on top of 217b1421 ("net/mlx5: separate DPDK from Verbs Rx queue objects")
<...>
^ permalink raw reply [flat|nested] 51+ messages in thread
* [dpdk-dev] [PATCH v8 1/3] ethdev: add Rx HW timestamp capability
2017-10-03 11:00 ` [dpdk-dev] [PATCH v6 3/3] net/mlx5: " Raslan Darawsheh
2017-10-05 23:23 ` Yongseok Koh
2017-10-08 8:24 ` [dpdk-dev] [PATCH v7 1/3] ethdev: add Rx HW timestamp capability Raslan Darawsheh
@ 2017-10-10 7:45 ` Raslan Darawsheh
2017-10-10 7:45 ` [dpdk-dev] [PATCH v8 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
` (2 more replies)
2017-10-10 14:37 ` [dpdk-dev] [PATCH v9 " Raslan Darawsheh
3 siblings, 3 replies; 51+ messages in thread
From: Raslan Darawsheh @ 2017-10-10 7:45 UTC (permalink / raw)
To: dev; +Cc: shahafs, yskoh, ferruh.yigit
Add a new offload capability flag for Rx HW
timestamp and enabling/disabling this via rte_eth_rxmode.
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
Reviewed-by: Shahaf Shuler <shahafs@mellanox.com>
---
Changes in v7:
- Updated features.rst to use both rx_offload_capa,rx_queue_offload_capa
- Updated default.ini to have Timestamp offload
---
doc/guides/nics/features.rst | 11 +++++++++++
doc/guides/nics/features/default.ini | 1 +
lib/librte_ether/rte_ethdev.c | 6 ++++++
lib/librte_ether/rte_ethdev.h | 2 ++
4 files changed, 20 insertions(+)
diff --git a/doc/guides/nics/features.rst b/doc/guides/nics/features.rst
index 6538470..ef7283b 100644
--- a/doc/guides/nics/features.rst
+++ b/doc/guides/nics/features.rst
@@ -573,6 +573,17 @@ Supports L4 checksum offload.
* **[provides] rte_eth_dev_info**: ``rx_offload_capa,rx_queue_offload_capa:DEV_RX_OFFLOAD_UDP_CKSUM,DEV_RX_OFFLOAD_TCP_CKSUM``,
``tx_offload_capa,tx_queue_offload_capa:DEV_TX_OFFLOAD_UDP_CKSUM,DEV_TX_OFFLOAD_TCP_CKSUM,DEV_TX_OFFLOAD_SCTP_CKSUM``.
+.. _nic_features_hw_timestamp:
+
+Timestamp offload
+-----------------
+
+Supports Timestamp.
+
+* **[uses] rte_eth_rxconf,rte_eth_rxmode**: ``offloads:DEV_RX_OFFLOAD_TIMESTAMP``.
+* **[provides] mbuf**: ``mbuf.ol_flags:PKT_RX_TIMESTAMP``.
+* **[provides] mbuf**: ``mbuf.timestamp``.
+* **[provides] rte_eth_dev_info**: ``rx_offload_capa,rx_queue_offload_capa: DEV_RX_OFFLOAD_TIMESTAMP``.
.. _nic_features_macsec_offload:
diff --git a/doc/guides/nics/features/default.ini b/doc/guides/nics/features/default.ini
index 9a59901..dc527dd 100644
--- a/doc/guides/nics/features/default.ini
+++ b/doc/guides/nics/features/default.ini
@@ -48,6 +48,7 @@ VLAN offload =
QinQ offload =
L3 checksum offload =
L4 checksum offload =
+Timestamp offload =
MACsec offload =
Inner L3 checksum =
Inner L4 checksum =
diff --git a/lib/librte_ether/rte_ethdev.c b/lib/librte_ether/rte_ethdev.c
index 3c5441e..ea56978 100644
--- a/lib/librte_ether/rte_ethdev.c
+++ b/lib/librte_ether/rte_ethdev.c
@@ -715,6 +715,8 @@ rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
offloads |= DEV_RX_OFFLOAD_SCATTER;
if (rxmode->enable_lro == 1)
offloads |= DEV_RX_OFFLOAD_TCP_LRO;
+ if (rxmode->hw_timestamp == 1)
+ offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
*rx_offloads = offloads;
}
@@ -763,6 +765,10 @@ rte_eth_convert_rx_offloads(const uint64_t rx_offloads,
rxmode->enable_lro = 1;
else
rxmode->enable_lro = 0;
+ if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
+ rxmode->hw_timestamp = 1;
+ else
+ rxmode->hw_timestamp = 0;
}
int
diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h
index 8e928da..0b731bb 100644
--- a/lib/librte_ether/rte_ethdev.h
+++ b/lib/librte_ether/rte_ethdev.h
@@ -369,6 +369,7 @@ struct rte_eth_rxmode {
hw_strip_crc : 1, /**< Enable CRC stripping by hardware. */
enable_scatter : 1, /**< Enable scatter packets rx handler */
enable_lro : 1, /**< Enable LRO */
+ hw_timestamp : 1, /**< Enable HW timestamp */
/**
* When set the offload bitfield should be ignored.
* Instead per-port Rx offloads should be set on offloads
@@ -961,6 +962,7 @@ struct rte_eth_conf {
#define DEV_RX_OFFLOAD_JUMBO_FRAME 0x00000800
#define DEV_RX_OFFLOAD_CRC_STRIP 0x00001000
#define DEV_RX_OFFLOAD_SCATTER 0x00002000
+#define DEV_RX_OFFLOAD_TIMESTAMP 0x00004000
#define DEV_RX_OFFLOAD_CHECKSUM (DEV_RX_OFFLOAD_IPV4_CKSUM | \
DEV_RX_OFFLOAD_UDP_CKSUM | \
DEV_RX_OFFLOAD_TCP_CKSUM)
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* [dpdk-dev] [PATCH v8 2/3] app/testpmd: add Rx HW timestamp
2017-10-10 7:45 ` [dpdk-dev] [PATCH v8 1/3] ethdev: add Rx HW timestamp capability Raslan Darawsheh
@ 2017-10-10 7:45 ` Raslan Darawsheh
2017-10-10 7:45 ` [dpdk-dev] [PATCH v8 3/3] net/mlx5: " Raslan Darawsheh
2017-10-10 13:33 ` [dpdk-dev] [PATCH v8 1/3] ethdev: add Rx HW timestamp capability Yongseok Koh
2 siblings, 0 replies; 51+ messages in thread
From: Raslan Darawsheh @ 2017-10-10 7:45 UTC (permalink / raw)
To: dev; +Cc: shahafs, yskoh, ferruh.yigit
Add enabling/disabling Rx HW timestamp from
command line and parameter.
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
---
app/test-pmd/cmdline.c | 15 ++++++++++++---
app/test-pmd/config.c | 8 ++++++++
app/test-pmd/parameters.c | 5 +++++
app/test-pmd/rxonly.c | 2 ++
app/test-pmd/testpmd.c | 1 +
5 files changed, 28 insertions(+), 3 deletions(-)
diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index 8dc5c85..50744cb 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -693,7 +693,7 @@ static void cmd_help_long_parsed(void *parsed_result,
"port config all max-pkt-len (value)\n"
" Set the max packet length.\n\n"
- "port config all (crc-strip|scatter|rx-cksum|hw-vlan|hw-vlan-filter|"
+ "port config all (crc-strip|scatter|rx-cksum|rx-timestamp|hw-vlan|hw-vlan-filter|"
"hw-vlan-strip|hw-vlan-extend|drop-en)"
" (on|off)\n"
" Set crc-strip/scatter/rx-checksum/hardware-vlan/drop_en"
@@ -1614,6 +1614,15 @@ cmd_config_rx_mode_flag_parsed(void *parsed_result,
printf("Unknown parameter\n");
return;
}
+ } else if (!strcmp(res->name, "rx-timestamp")) {
+ if (!strcmp(res->value, "on"))
+ rx_mode.hw_timestamp = 1;
+ else if (!strcmp(res->value, "off"))
+ rx_mode.hw_timestamp = 0;
+ else {
+ printf("Unknown parameter\n");
+ return;
+ }
} else if (!strcmp(res->name, "hw-vlan")) {
if (!strcmp(res->value, "on")) {
rx_mode.hw_vlan_filter = 1;
@@ -1682,7 +1691,7 @@ cmdline_parse_token_string_t cmd_config_rx_mode_flag_all =
TOKEN_STRING_INITIALIZER(struct cmd_config_rx_mode_flag, all, "all");
cmdline_parse_token_string_t cmd_config_rx_mode_flag_name =
TOKEN_STRING_INITIALIZER(struct cmd_config_rx_mode_flag, name,
- "crc-strip#scatter#rx-cksum#hw-vlan#"
+ "crc-strip#scatter#rx-cksum#rx-timestamp#hw-vlan#"
"hw-vlan-filter#hw-vlan-strip#hw-vlan-extend");
cmdline_parse_token_string_t cmd_config_rx_mode_flag_value =
TOKEN_STRING_INITIALIZER(struct cmd_config_rx_mode_flag, value,
@@ -1691,7 +1700,7 @@ cmdline_parse_token_string_t cmd_config_rx_mode_flag_value =
cmdline_parse_inst_t cmd_config_rx_mode_flag = {
.f = cmd_config_rx_mode_flag_parsed,
.data = NULL,
- .help_str = "port config all crc-strip|scatter|rx-cksum|hw-vlan|"
+ .help_str = "port config all crc-strip|scatter|rx-cksum|rx-timestamp|hw-vlan|"
"hw-vlan-filter|hw-vlan-strip|hw-vlan-extend on|off",
.tokens = {
(void *)&cmd_config_rx_mode_flag_port,
diff --git a/app/test-pmd/config.c b/app/test-pmd/config.c
index ecd5166..7ff0bb2 100644
--- a/app/test-pmd/config.c
+++ b/app/test-pmd/config.c
@@ -607,6 +607,14 @@ port_offload_cap_display(portid_t port_id)
printf("off\n");
}
+ if (dev_info.rx_offload_capa & DEV_RX_OFFLOAD_TIMESTAMP) {
+ printf("HW timestamp: ");
+ if (dev->data->dev_conf.rxmode.hw_timestamp)
+ printf("on\n");
+ else
+ printf("off\n");
+ }
+
if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_QINQ_INSERT) {
printf("Double VLANs insert: ");
if (ports[port_id].tx_ol_flags &
diff --git a/app/test-pmd/parameters.c b/app/test-pmd/parameters.c
index 72ff971..5d64f0d 100644
--- a/app/test-pmd/parameters.c
+++ b/app/test-pmd/parameters.c
@@ -162,6 +162,7 @@ usage(char* progname)
printf(" --disable-crc-strip: disable CRC stripping by hardware.\n");
printf(" --enable-lro: enable large receive offload.\n");
printf(" --enable-rx-cksum: enable rx hardware checksum offload.\n");
+ printf(" --enable-rx-timestamp: enable rx hardware timestamp offload.\n");
printf(" --disable-hw-vlan: disable hardware vlan.\n");
printf(" --disable-hw-vlan-filter: disable hardware vlan filter.\n");
printf(" --disable-hw-vlan-strip: disable hardware vlan strip.\n");
@@ -605,6 +606,7 @@ launch_args_parse(int argc, char** argv)
{ "disable-crc-strip", 0, 0, 0 },
{ "enable-lro", 0, 0, 0 },
{ "enable-rx-cksum", 0, 0, 0 },
+ { "enable-rx-timestamp", 0, 0, 0 },
{ "enable-scatter", 0, 0, 0 },
{ "disable-hw-vlan", 0, 0, 0 },
{ "disable-hw-vlan-filter", 0, 0, 0 },
@@ -903,6 +905,9 @@ launch_args_parse(int argc, char** argv)
rx_mode.enable_scatter = 1;
if (!strcmp(lgopts[opt_idx].name, "enable-rx-cksum"))
rx_mode.hw_ip_checksum = 1;
+ if (!strcmp(lgopts[opt_idx].name,
+ "enable-rx-timestamp"))
+ rx_mode.hw_timestamp = 1;
if (!strcmp(lgopts[opt_idx].name, "disable-hw-vlan")) {
rx_mode.hw_vlan_filter = 0;
diff --git a/app/test-pmd/rxonly.c b/app/test-pmd/rxonly.c
index 57df014..2a27f72 100644
--- a/app/test-pmd/rxonly.c
+++ b/app/test-pmd/rxonly.c
@@ -158,6 +158,8 @@ pkt_burst_receive(struct fwd_stream *fs)
printf("hash=0x%x ID=0x%x ",
mb->hash.fdir.hash, mb->hash.fdir.id);
}
+ if (ol_flags & PKT_RX_TIMESTAMP)
+ printf(" - timestamp %lu ", mb->timestamp);
if (ol_flags & PKT_RX_VLAN_STRIPPED)
printf(" - VLAN tci=0x%x", mb->vlan_tci);
if (ol_flags & PKT_RX_QINQ_STRIPPED)
diff --git a/app/test-pmd/testpmd.c b/app/test-pmd/testpmd.c
index 667c228..1b1d75f 100644
--- a/app/test-pmd/testpmd.c
+++ b/app/test-pmd/testpmd.c
@@ -343,6 +343,7 @@ struct rte_eth_rxmode rx_mode = {
.hw_vlan_extend = 0, /**< Extended VLAN disabled. */
.jumbo_frame = 0, /**< Jumbo Frame Support disabled. */
.hw_strip_crc = 1, /**< CRC stripping by hardware enabled. */
+ .hw_timestamp = 0, /**< HW timestamp enabled. */
};
struct rte_fdir_conf fdir_conf = {
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* [dpdk-dev] [PATCH v8 3/3] net/mlx5: add Rx HW timestamp
2017-10-10 7:45 ` [dpdk-dev] [PATCH v8 1/3] ethdev: add Rx HW timestamp capability Raslan Darawsheh
2017-10-10 7:45 ` [dpdk-dev] [PATCH v8 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
@ 2017-10-10 7:45 ` Raslan Darawsheh
2017-10-10 13:33 ` [dpdk-dev] [PATCH v8 1/3] ethdev: add Rx HW timestamp capability Yongseok Koh
2 siblings, 0 replies; 51+ messages in thread
From: Raslan Darawsheh @ 2017-10-10 7:45 UTC (permalink / raw)
To: dev; +Cc: shahafs, yskoh, ferruh.yigit
Expose Rx HW timestamp to packet mbufs.
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
---
Changes in V8:
- Rebasing the work on top of next-net
Changes in v7:
- Rebasing the work on top ot c814b93b ("net/mlx5: add vectorized Rx/Tx burst for ARM")
- Adding the timestamp code for ARM NEON
Changes in v6:
- Rebasing the work on top of 217b1421 ("net/mlx5: separate DPDK from Verbs Rx queue objects")
---
drivers/net/mlx5/mlx5_ethdev.c | 4 +++-
drivers/net/mlx5/mlx5_rxq.c | 6 +++++-
drivers/net/mlx5/mlx5_rxtx.c | 5 +++++
drivers/net/mlx5/mlx5_rxtx.h | 3 ++-
drivers/net/mlx5/mlx5_rxtx_vec_neon.h | 22 +++++++++++++++++++++-
drivers/net/mlx5/mlx5_rxtx_vec_sse.h | 13 ++++++++++++-
6 files changed, 48 insertions(+), 5 deletions(-)
diff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c
index 9f5b489..e06dce3 100644
--- a/drivers/net/mlx5/mlx5_ethdev.c
+++ b/drivers/net/mlx5/mlx5_ethdev.c
@@ -697,7 +697,9 @@ mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
DEV_RX_OFFLOAD_UDP_CKSUM |
DEV_RX_OFFLOAD_TCP_CKSUM) :
0) |
- (priv->hw_vlan_strip ? DEV_RX_OFFLOAD_VLAN_STRIP : 0);
+ (priv->hw_vlan_strip ? DEV_RX_OFFLOAD_VLAN_STRIP : 0) |
+ DEV_RX_OFFLOAD_TIMESTAMP;
+
if (!priv->mps)
info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT;
if (priv->hw_csum)
diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c
index e1867cb..632d451 100644
--- a/drivers/net/mlx5/mlx5_rxq.c
+++ b/drivers/net/mlx5/mlx5_rxq.c
@@ -608,7 +608,7 @@ mlx5_priv_rxq_ibv_new(struct priv *priv, uint16_t idx)
attr.cq.mlx5 = (struct mlx5dv_cq_init_attr){
.comp_mask = 0,
};
- if (priv->cqe_comp) {
+ if (priv->cqe_comp && !rxq_data->hw_timestamp) {
attr.cq.mlx5.comp_mask |=
MLX5DV_CQ_INIT_ATTR_MASK_COMPRESSED_CQE;
attr.cq.mlx5.cqe_comp_res_format = MLX5DV_CQE_RES_FORMAT_HASH;
@@ -618,6 +618,8 @@ mlx5_priv_rxq_ibv_new(struct priv *priv, uint16_t idx)
*/
if (rxq_check_vec_support(rxq_data) < 0)
cqe_n *= 2;
+ } else if (priv->cqe_comp && rxq_data->hw_timestamp) {
+ DEBUG("Rx CQE compression is disabled for HW timestamp");
}
tmpl->cq = ibv_cq_ex_to_cq(mlx5dv_create_cq(priv->ctx, &attr.cq.ibv,
&attr.cq.mlx5));
@@ -939,6 +941,8 @@ mlx5_priv_rxq_new(struct priv *priv, uint16_t idx, uint16_t desc,
if (priv->hw_csum_l2tun)
tmpl->rxq.csum_l2tun =
!!dev->data->dev_conf.rxmode.hw_ip_checksum;
+ tmpl->rxq.hw_timestamp =
+ !!dev->data->dev_conf.rxmode.hw_timestamp;
/* Configure VLAN stripping. */
tmpl->rxq.vlan_strip = (priv->hw_vlan_strip &&
!!dev->data->dev_conf.rxmode.hw_vlan_strip);
diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c
index 275cd6a..961967b 100644
--- a/drivers/net/mlx5/mlx5_rxtx.c
+++ b/drivers/net/mlx5/mlx5_rxtx.c
@@ -1887,6 +1887,11 @@ mlx5_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
pkt->vlan_tci =
rte_be_to_cpu_16(cqe->vlan_info);
}
+ if (rxq->hw_timestamp) {
+ pkt->timestamp =
+ rte_be_to_cpu_64(cqe->timestamp);
+ pkt->ol_flags |= PKT_RX_TIMESTAMP;
+ }
if (rxq->crc_present)
len -= ETHER_CRC_LEN;
PKT_LEN(pkt) = len;
diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h
index 827cb3c..ea03742 100644
--- a/drivers/net/mlx5/mlx5_rxtx.h
+++ b/drivers/net/mlx5/mlx5_rxtx.h
@@ -106,6 +106,7 @@ struct rxq_zip {
struct mlx5_rxq_data {
unsigned int csum:1; /* Enable checksum offloading. */
unsigned int csum_l2tun:1; /* Same for L2 tunnels. */
+ unsigned int hw_timestamp:1; /* Enable HW timestamp. */
unsigned int vlan_strip:1; /* Enable VLAN stripping. */
unsigned int crc_present:1; /* CRC must be subtracted. */
unsigned int sges_n:2; /* Log 2 of SGEs (max buffers per packet). */
@@ -114,7 +115,7 @@ struct mlx5_rxq_data {
unsigned int rss_hash:1; /* RSS hash result is enabled. */
unsigned int mark:1; /* Marked flow available on the queue. */
unsigned int pending_err:1; /* CQE error needs to be handled. */
- unsigned int :15; /* Remaining bits. */
+ unsigned int :14; /* Remaining bits. */
volatile uint32_t *rq_db;
volatile uint32_t *cq_db;
uint16_t port_id;
diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h
index 6dd18b6..ee8ecfa 100644
--- a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h
+++ b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h
@@ -573,7 +573,9 @@ rxq_cq_to_ptype_oflags_v(struct mlx5_rxq_data *rxq,
{
uint16x4_t ptype;
uint32x4_t pinfo, cv_flags;
- uint32x4_t ol_flags = vdupq_n_u32(rxq->rss_hash * PKT_RX_RSS_HASH);
+ uint32x4_t ol_flags =
+ vdupq_n_u32(rxq->rss_hash * PKT_RX_RSS_HASH |
+ rxq->hw_timestamp * PKT_RX_TIMESTAMP);
const uint32x4_t ptype_ol_mask = { 0x106, 0x106, 0x106, 0x106 };
const uint8x16_t cv_flag_sel = {
0,
@@ -982,6 +984,24 @@ rxq_burst_v(struct mlx5_rxq_data *rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
/* C.4 fill in mbuf - rearm_data and packet_type. */
rxq_cq_to_ptype_oflags_v(rxq, ptype_info, flow_tag,
opcode, &elts[pos]);
+ if (rxq->hw_timestamp) {
+ elts[pos]->timestamp =
+ rte_be_to_cpu_64(
+ container_of(p0, struct mlx5_cqe,
+ pkt_info)->timestamp);
+ elts[pos + 1]->timestamp =
+ rte_be_to_cpu_64(
+ container_of(p1, struct mlx5_cqe,
+ pkt_info)->timestamp);
+ elts[pos + 2]->timestamp =
+ rte_be_to_cpu_64(
+ container_of(p2, struct mlx5_cqe,
+ pkt_info)->timestamp);
+ elts[pos + 3]->timestamp =
+ rte_be_to_cpu_64(
+ container_of(p3, struct mlx5_cqe,
+ pkt_info)->timestamp);
+ }
#ifdef MLX5_PMD_SOFT_COUNTERS
/* Add up received bytes count. */
byte_cnt = vbic_u16(byte_cnt, invalid_mask);
diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
index 88c5d75..ab2d05b 100644
--- a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
+++ b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
@@ -552,7 +552,8 @@ rxq_cq_to_ptype_oflags_v(struct mlx5_rxq_data *rxq, __m128i cqes[4],
{
__m128i pinfo0, pinfo1;
__m128i pinfo, ptype;
- __m128i ol_flags = _mm_set1_epi32(rxq->rss_hash * PKT_RX_RSS_HASH);
+ __m128i ol_flags = _mm_set1_epi32(rxq->rss_hash * PKT_RX_RSS_HASH |
+ rxq->hw_timestamp * PKT_RX_TIMESTAMP);
__m128i cv_flags;
const __m128i zero = _mm_setzero_si128();
const __m128i ptype_mask =
@@ -947,6 +948,16 @@ rxq_burst_v(struct mlx5_rxq_data *rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
rxq->pending_err |= !!_mm_cvtsi128_si64(opcode);
/* D.5 fill in mbuf - rearm_data and packet_type. */
rxq_cq_to_ptype_oflags_v(rxq, cqes, opcode, &pkts[pos]);
+ if (rxq->hw_timestamp) {
+ pkts[pos]->timestamp =
+ rte_be_to_cpu_64(cq[pos].timestamp);
+ pkts[pos + 1]->timestamp =
+ rte_be_to_cpu_64(cq[pos + p1].timestamp);
+ pkts[pos + 2]->timestamp =
+ rte_be_to_cpu_64(cq[pos + p2].timestamp);
+ pkts[pos + 3]->timestamp =
+ rte_be_to_cpu_64(cq[pos + p3].timestamp);
+ }
#ifdef MLX5_PMD_SOFT_COUNTERS
/* Add up received bytes count. */
byte_cnt = _mm_shuffle_epi8(op_own, len_shuf_mask);
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [dpdk-dev] [PATCH v8 1/3] ethdev: add Rx HW timestamp capability
2017-10-10 7:45 ` [dpdk-dev] [PATCH v8 1/3] ethdev: add Rx HW timestamp capability Raslan Darawsheh
2017-10-10 7:45 ` [dpdk-dev] [PATCH v8 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
2017-10-10 7:45 ` [dpdk-dev] [PATCH v8 3/3] net/mlx5: " Raslan Darawsheh
@ 2017-10-10 13:33 ` Yongseok Koh
2 siblings, 0 replies; 51+ messages in thread
From: Yongseok Koh @ 2017-10-10 13:33 UTC (permalink / raw)
To: Raslan Darawsheh; +Cc: dev, Shahaf Shuler, ferruh.yigit
> On Oct 10, 2017, at 12:45 AM, Raslan Darawsheh <rasland@mellanox.com> wrote:
>
> Add a new offload capability flag for Rx HW
> timestamp and enabling/disabling this via rte_eth_rxmode.
>
> Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
> Reviewed-by: Shahaf Shuler <shahafs@mellanox.com>
> ---
Acked-by: Yongseok Koh <yskoh@mellanox.com>
Thanks
^ permalink raw reply [flat|nested] 51+ messages in thread
* [dpdk-dev] [PATCH v9 1/3] ethdev: add Rx HW timestamp capability
2017-10-03 11:00 ` [dpdk-dev] [PATCH v6 3/3] net/mlx5: " Raslan Darawsheh
` (2 preceding siblings ...)
2017-10-10 7:45 ` [dpdk-dev] [PATCH v8 1/3] ethdev: add Rx HW timestamp capability Raslan Darawsheh
@ 2017-10-10 14:37 ` Raslan Darawsheh
2017-10-10 14:37 ` [dpdk-dev] [PATCH v9 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
` (2 more replies)
3 siblings, 3 replies; 51+ messages in thread
From: Raslan Darawsheh @ 2017-10-10 14:37 UTC (permalink / raw)
To: dev; +Cc: shahafs, yskoh, ferruh.yigit
Add a new offload capability flag for Rx HW
timestamp and enabling/disabling this via rte_eth_rxmode.
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
Reviewed-by: Shahaf Shuler <shahafs@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
---
Changes in v7:
- Updated features.rst to use both rx_offload_capa,rx_queue_offload_capa
- Updated default.ini to have Timestamp offload
---
doc/guides/nics/features.rst | 11 +++++++++++
doc/guides/nics/features/default.ini | 1 +
lib/librte_ether/rte_ethdev.c | 6 ++++++
lib/librte_ether/rte_ethdev.h | 2 ++
4 files changed, 20 insertions(+)
diff --git a/doc/guides/nics/features.rst b/doc/guides/nics/features.rst
index 6538470..ef7283b 100644
--- a/doc/guides/nics/features.rst
+++ b/doc/guides/nics/features.rst
@@ -573,6 +573,17 @@ Supports L4 checksum offload.
* **[provides] rte_eth_dev_info**: ``rx_offload_capa,rx_queue_offload_capa:DEV_RX_OFFLOAD_UDP_CKSUM,DEV_RX_OFFLOAD_TCP_CKSUM``,
``tx_offload_capa,tx_queue_offload_capa:DEV_TX_OFFLOAD_UDP_CKSUM,DEV_TX_OFFLOAD_TCP_CKSUM,DEV_TX_OFFLOAD_SCTP_CKSUM``.
+.. _nic_features_hw_timestamp:
+
+Timestamp offload
+-----------------
+
+Supports Timestamp.
+
+* **[uses] rte_eth_rxconf,rte_eth_rxmode**: ``offloads:DEV_RX_OFFLOAD_TIMESTAMP``.
+* **[provides] mbuf**: ``mbuf.ol_flags:PKT_RX_TIMESTAMP``.
+* **[provides] mbuf**: ``mbuf.timestamp``.
+* **[provides] rte_eth_dev_info**: ``rx_offload_capa,rx_queue_offload_capa: DEV_RX_OFFLOAD_TIMESTAMP``.
.. _nic_features_macsec_offload:
diff --git a/doc/guides/nics/features/default.ini b/doc/guides/nics/features/default.ini
index 9a59901..dc527dd 100644
--- a/doc/guides/nics/features/default.ini
+++ b/doc/guides/nics/features/default.ini
@@ -48,6 +48,7 @@ VLAN offload =
QinQ offload =
L3 checksum offload =
L4 checksum offload =
+Timestamp offload =
MACsec offload =
Inner L3 checksum =
Inner L4 checksum =
diff --git a/lib/librte_ether/rte_ethdev.c b/lib/librte_ether/rte_ethdev.c
index 3c5441e..ea56978 100644
--- a/lib/librte_ether/rte_ethdev.c
+++ b/lib/librte_ether/rte_ethdev.c
@@ -715,6 +715,8 @@ rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
offloads |= DEV_RX_OFFLOAD_SCATTER;
if (rxmode->enable_lro == 1)
offloads |= DEV_RX_OFFLOAD_TCP_LRO;
+ if (rxmode->hw_timestamp == 1)
+ offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
*rx_offloads = offloads;
}
@@ -763,6 +765,10 @@ rte_eth_convert_rx_offloads(const uint64_t rx_offloads,
rxmode->enable_lro = 1;
else
rxmode->enable_lro = 0;
+ if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
+ rxmode->hw_timestamp = 1;
+ else
+ rxmode->hw_timestamp = 0;
}
int
diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h
index 8e928da..0b731bb 100644
--- a/lib/librte_ether/rte_ethdev.h
+++ b/lib/librte_ether/rte_ethdev.h
@@ -369,6 +369,7 @@ struct rte_eth_rxmode {
hw_strip_crc : 1, /**< Enable CRC stripping by hardware. */
enable_scatter : 1, /**< Enable scatter packets rx handler */
enable_lro : 1, /**< Enable LRO */
+ hw_timestamp : 1, /**< Enable HW timestamp */
/**
* When set the offload bitfield should be ignored.
* Instead per-port Rx offloads should be set on offloads
@@ -961,6 +962,7 @@ struct rte_eth_conf {
#define DEV_RX_OFFLOAD_JUMBO_FRAME 0x00000800
#define DEV_RX_OFFLOAD_CRC_STRIP 0x00001000
#define DEV_RX_OFFLOAD_SCATTER 0x00002000
+#define DEV_RX_OFFLOAD_TIMESTAMP 0x00004000
#define DEV_RX_OFFLOAD_CHECKSUM (DEV_RX_OFFLOAD_IPV4_CKSUM | \
DEV_RX_OFFLOAD_UDP_CKSUM | \
DEV_RX_OFFLOAD_TCP_CKSUM)
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* [dpdk-dev] [PATCH v9 2/3] app/testpmd: add Rx HW timestamp
2017-10-10 14:37 ` [dpdk-dev] [PATCH v9 " Raslan Darawsheh
@ 2017-10-10 14:37 ` Raslan Darawsheh
2017-10-10 14:37 ` [dpdk-dev] [PATCH v9 3/3] net/mlx5: " Raslan Darawsheh
2017-10-11 1:14 ` [dpdk-dev] [PATCH v9 1/3] ethdev: add Rx HW timestamp capability Ferruh Yigit
2 siblings, 0 replies; 51+ messages in thread
From: Raslan Darawsheh @ 2017-10-10 14:37 UTC (permalink / raw)
To: dev; +Cc: shahafs, yskoh, ferruh.yigit
Add enabling/disabling Rx HW timestamp from
command line and parameter.
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
---
app/test-pmd/cmdline.c | 15 ++++++++++++---
app/test-pmd/config.c | 8 ++++++++
app/test-pmd/parameters.c | 5 +++++
app/test-pmd/rxonly.c | 2 ++
app/test-pmd/testpmd.c | 1 +
5 files changed, 28 insertions(+), 3 deletions(-)
diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index 8dc5c85..50744cb 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -693,7 +693,7 @@ static void cmd_help_long_parsed(void *parsed_result,
"port config all max-pkt-len (value)\n"
" Set the max packet length.\n\n"
- "port config all (crc-strip|scatter|rx-cksum|hw-vlan|hw-vlan-filter|"
+ "port config all (crc-strip|scatter|rx-cksum|rx-timestamp|hw-vlan|hw-vlan-filter|"
"hw-vlan-strip|hw-vlan-extend|drop-en)"
" (on|off)\n"
" Set crc-strip/scatter/rx-checksum/hardware-vlan/drop_en"
@@ -1614,6 +1614,15 @@ cmd_config_rx_mode_flag_parsed(void *parsed_result,
printf("Unknown parameter\n");
return;
}
+ } else if (!strcmp(res->name, "rx-timestamp")) {
+ if (!strcmp(res->value, "on"))
+ rx_mode.hw_timestamp = 1;
+ else if (!strcmp(res->value, "off"))
+ rx_mode.hw_timestamp = 0;
+ else {
+ printf("Unknown parameter\n");
+ return;
+ }
} else if (!strcmp(res->name, "hw-vlan")) {
if (!strcmp(res->value, "on")) {
rx_mode.hw_vlan_filter = 1;
@@ -1682,7 +1691,7 @@ cmdline_parse_token_string_t cmd_config_rx_mode_flag_all =
TOKEN_STRING_INITIALIZER(struct cmd_config_rx_mode_flag, all, "all");
cmdline_parse_token_string_t cmd_config_rx_mode_flag_name =
TOKEN_STRING_INITIALIZER(struct cmd_config_rx_mode_flag, name,
- "crc-strip#scatter#rx-cksum#hw-vlan#"
+ "crc-strip#scatter#rx-cksum#rx-timestamp#hw-vlan#"
"hw-vlan-filter#hw-vlan-strip#hw-vlan-extend");
cmdline_parse_token_string_t cmd_config_rx_mode_flag_value =
TOKEN_STRING_INITIALIZER(struct cmd_config_rx_mode_flag, value,
@@ -1691,7 +1700,7 @@ cmdline_parse_token_string_t cmd_config_rx_mode_flag_value =
cmdline_parse_inst_t cmd_config_rx_mode_flag = {
.f = cmd_config_rx_mode_flag_parsed,
.data = NULL,
- .help_str = "port config all crc-strip|scatter|rx-cksum|hw-vlan|"
+ .help_str = "port config all crc-strip|scatter|rx-cksum|rx-timestamp|hw-vlan|"
"hw-vlan-filter|hw-vlan-strip|hw-vlan-extend on|off",
.tokens = {
(void *)&cmd_config_rx_mode_flag_port,
diff --git a/app/test-pmd/config.c b/app/test-pmd/config.c
index ecd5166..7ff0bb2 100644
--- a/app/test-pmd/config.c
+++ b/app/test-pmd/config.c
@@ -607,6 +607,14 @@ port_offload_cap_display(portid_t port_id)
printf("off\n");
}
+ if (dev_info.rx_offload_capa & DEV_RX_OFFLOAD_TIMESTAMP) {
+ printf("HW timestamp: ");
+ if (dev->data->dev_conf.rxmode.hw_timestamp)
+ printf("on\n");
+ else
+ printf("off\n");
+ }
+
if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_QINQ_INSERT) {
printf("Double VLANs insert: ");
if (ports[port_id].tx_ol_flags &
diff --git a/app/test-pmd/parameters.c b/app/test-pmd/parameters.c
index 72ff971..5d64f0d 100644
--- a/app/test-pmd/parameters.c
+++ b/app/test-pmd/parameters.c
@@ -162,6 +162,7 @@ usage(char* progname)
printf(" --disable-crc-strip: disable CRC stripping by hardware.\n");
printf(" --enable-lro: enable large receive offload.\n");
printf(" --enable-rx-cksum: enable rx hardware checksum offload.\n");
+ printf(" --enable-rx-timestamp: enable rx hardware timestamp offload.\n");
printf(" --disable-hw-vlan: disable hardware vlan.\n");
printf(" --disable-hw-vlan-filter: disable hardware vlan filter.\n");
printf(" --disable-hw-vlan-strip: disable hardware vlan strip.\n");
@@ -605,6 +606,7 @@ launch_args_parse(int argc, char** argv)
{ "disable-crc-strip", 0, 0, 0 },
{ "enable-lro", 0, 0, 0 },
{ "enable-rx-cksum", 0, 0, 0 },
+ { "enable-rx-timestamp", 0, 0, 0 },
{ "enable-scatter", 0, 0, 0 },
{ "disable-hw-vlan", 0, 0, 0 },
{ "disable-hw-vlan-filter", 0, 0, 0 },
@@ -903,6 +905,9 @@ launch_args_parse(int argc, char** argv)
rx_mode.enable_scatter = 1;
if (!strcmp(lgopts[opt_idx].name, "enable-rx-cksum"))
rx_mode.hw_ip_checksum = 1;
+ if (!strcmp(lgopts[opt_idx].name,
+ "enable-rx-timestamp"))
+ rx_mode.hw_timestamp = 1;
if (!strcmp(lgopts[opt_idx].name, "disable-hw-vlan")) {
rx_mode.hw_vlan_filter = 0;
diff --git a/app/test-pmd/rxonly.c b/app/test-pmd/rxonly.c
index 57df014..2a27f72 100644
--- a/app/test-pmd/rxonly.c
+++ b/app/test-pmd/rxonly.c
@@ -158,6 +158,8 @@ pkt_burst_receive(struct fwd_stream *fs)
printf("hash=0x%x ID=0x%x ",
mb->hash.fdir.hash, mb->hash.fdir.id);
}
+ if (ol_flags & PKT_RX_TIMESTAMP)
+ printf(" - timestamp %lu ", mb->timestamp);
if (ol_flags & PKT_RX_VLAN_STRIPPED)
printf(" - VLAN tci=0x%x", mb->vlan_tci);
if (ol_flags & PKT_RX_QINQ_STRIPPED)
diff --git a/app/test-pmd/testpmd.c b/app/test-pmd/testpmd.c
index 667c228..1b1d75f 100644
--- a/app/test-pmd/testpmd.c
+++ b/app/test-pmd/testpmd.c
@@ -343,6 +343,7 @@ struct rte_eth_rxmode rx_mode = {
.hw_vlan_extend = 0, /**< Extended VLAN disabled. */
.jumbo_frame = 0, /**< Jumbo Frame Support disabled. */
.hw_strip_crc = 1, /**< CRC stripping by hardware enabled. */
+ .hw_timestamp = 0, /**< HW timestamp enabled. */
};
struct rte_fdir_conf fdir_conf = {
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* [dpdk-dev] [PATCH v9 3/3] net/mlx5: add Rx HW timestamp
2017-10-10 14:37 ` [dpdk-dev] [PATCH v9 " Raslan Darawsheh
2017-10-10 14:37 ` [dpdk-dev] [PATCH v9 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
@ 2017-10-10 14:37 ` Raslan Darawsheh
2017-10-10 14:40 ` Yongseok Koh
2017-10-11 1:14 ` [dpdk-dev] [PATCH v9 1/3] ethdev: add Rx HW timestamp capability Ferruh Yigit
2 siblings, 1 reply; 51+ messages in thread
From: Raslan Darawsheh @ 2017-10-10 14:37 UTC (permalink / raw)
To: dev; +Cc: shahafs, yskoh, ferruh.yigit
Expose Rx HW timestamp to packet mbufs.
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
---
Changes in v9:
- Fix indentation issue in mlx5_rxtx_vec_neon.h
Changes in v8:
- Rebasing the work on top of next-net
Changes in v7:
- Rebasing the work on top ot c814b93b ("net/mlx5: add vectorized Rx/Tx burst for ARM")
- Adding the timestamp code for ARM NEON
Changes in v6:
- Rebasing the work on top of 217b1421 ("net/mlx5: separate DPDK from Verbs Rx queue objects")
---
drivers/net/mlx5/mlx5_ethdev.c | 4 +++-
drivers/net/mlx5/mlx5_rxq.c | 6 +++++-
drivers/net/mlx5/mlx5_rxtx.c | 5 +++++
drivers/net/mlx5/mlx5_rxtx.h | 3 ++-
drivers/net/mlx5/mlx5_rxtx_vec_neon.h | 22 +++++++++++++++++++++-
drivers/net/mlx5/mlx5_rxtx_vec_sse.h | 13 ++++++++++++-
6 files changed, 48 insertions(+), 5 deletions(-)
diff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c
index 9f5b489..e06dce3 100644
--- a/drivers/net/mlx5/mlx5_ethdev.c
+++ b/drivers/net/mlx5/mlx5_ethdev.c
@@ -697,7 +697,9 @@ mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
DEV_RX_OFFLOAD_UDP_CKSUM |
DEV_RX_OFFLOAD_TCP_CKSUM) :
0) |
- (priv->hw_vlan_strip ? DEV_RX_OFFLOAD_VLAN_STRIP : 0);
+ (priv->hw_vlan_strip ? DEV_RX_OFFLOAD_VLAN_STRIP : 0) |
+ DEV_RX_OFFLOAD_TIMESTAMP;
+
if (!priv->mps)
info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT;
if (priv->hw_csum)
diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c
index e1867cb..632d451 100644
--- a/drivers/net/mlx5/mlx5_rxq.c
+++ b/drivers/net/mlx5/mlx5_rxq.c
@@ -608,7 +608,7 @@ mlx5_priv_rxq_ibv_new(struct priv *priv, uint16_t idx)
attr.cq.mlx5 = (struct mlx5dv_cq_init_attr){
.comp_mask = 0,
};
- if (priv->cqe_comp) {
+ if (priv->cqe_comp && !rxq_data->hw_timestamp) {
attr.cq.mlx5.comp_mask |=
MLX5DV_CQ_INIT_ATTR_MASK_COMPRESSED_CQE;
attr.cq.mlx5.cqe_comp_res_format = MLX5DV_CQE_RES_FORMAT_HASH;
@@ -618,6 +618,8 @@ mlx5_priv_rxq_ibv_new(struct priv *priv, uint16_t idx)
*/
if (rxq_check_vec_support(rxq_data) < 0)
cqe_n *= 2;
+ } else if (priv->cqe_comp && rxq_data->hw_timestamp) {
+ DEBUG("Rx CQE compression is disabled for HW timestamp");
}
tmpl->cq = ibv_cq_ex_to_cq(mlx5dv_create_cq(priv->ctx, &attr.cq.ibv,
&attr.cq.mlx5));
@@ -939,6 +941,8 @@ mlx5_priv_rxq_new(struct priv *priv, uint16_t idx, uint16_t desc,
if (priv->hw_csum_l2tun)
tmpl->rxq.csum_l2tun =
!!dev->data->dev_conf.rxmode.hw_ip_checksum;
+ tmpl->rxq.hw_timestamp =
+ !!dev->data->dev_conf.rxmode.hw_timestamp;
/* Configure VLAN stripping. */
tmpl->rxq.vlan_strip = (priv->hw_vlan_strip &&
!!dev->data->dev_conf.rxmode.hw_vlan_strip);
diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c
index 275cd6a..961967b 100644
--- a/drivers/net/mlx5/mlx5_rxtx.c
+++ b/drivers/net/mlx5/mlx5_rxtx.c
@@ -1887,6 +1887,11 @@ mlx5_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
pkt->vlan_tci =
rte_be_to_cpu_16(cqe->vlan_info);
}
+ if (rxq->hw_timestamp) {
+ pkt->timestamp =
+ rte_be_to_cpu_64(cqe->timestamp);
+ pkt->ol_flags |= PKT_RX_TIMESTAMP;
+ }
if (rxq->crc_present)
len -= ETHER_CRC_LEN;
PKT_LEN(pkt) = len;
diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h
index 827cb3c..ea03742 100644
--- a/drivers/net/mlx5/mlx5_rxtx.h
+++ b/drivers/net/mlx5/mlx5_rxtx.h
@@ -106,6 +106,7 @@ struct rxq_zip {
struct mlx5_rxq_data {
unsigned int csum:1; /* Enable checksum offloading. */
unsigned int csum_l2tun:1; /* Same for L2 tunnels. */
+ unsigned int hw_timestamp:1; /* Enable HW timestamp. */
unsigned int vlan_strip:1; /* Enable VLAN stripping. */
unsigned int crc_present:1; /* CRC must be subtracted. */
unsigned int sges_n:2; /* Log 2 of SGEs (max buffers per packet). */
@@ -114,7 +115,7 @@ struct mlx5_rxq_data {
unsigned int rss_hash:1; /* RSS hash result is enabled. */
unsigned int mark:1; /* Marked flow available on the queue. */
unsigned int pending_err:1; /* CQE error needs to be handled. */
- unsigned int :15; /* Remaining bits. */
+ unsigned int :14; /* Remaining bits. */
volatile uint32_t *rq_db;
volatile uint32_t *cq_db;
uint16_t port_id;
diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h
index 6dd18b6..eb17a63 100644
--- a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h
+++ b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h
@@ -573,7 +573,9 @@ rxq_cq_to_ptype_oflags_v(struct mlx5_rxq_data *rxq,
{
uint16x4_t ptype;
uint32x4_t pinfo, cv_flags;
- uint32x4_t ol_flags = vdupq_n_u32(rxq->rss_hash * PKT_RX_RSS_HASH);
+ uint32x4_t ol_flags =
+ vdupq_n_u32(rxq->rss_hash * PKT_RX_RSS_HASH |
+ rxq->hw_timestamp * PKT_RX_TIMESTAMP);
const uint32x4_t ptype_ol_mask = { 0x106, 0x106, 0x106, 0x106 };
const uint8x16_t cv_flag_sel = {
0,
@@ -982,6 +984,24 @@ rxq_burst_v(struct mlx5_rxq_data *rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
/* C.4 fill in mbuf - rearm_data and packet_type. */
rxq_cq_to_ptype_oflags_v(rxq, ptype_info, flow_tag,
opcode, &elts[pos]);
+ if (rxq->hw_timestamp) {
+ elts[pos]->timestamp =
+ rte_be_to_cpu_64(
+ container_of(p0, struct mlx5_cqe,
+ pkt_info)->timestamp);
+ elts[pos + 1]->timestamp =
+ rte_be_to_cpu_64(
+ container_of(p1, struct mlx5_cqe,
+ pkt_info)->timestamp);
+ elts[pos + 2]->timestamp =
+ rte_be_to_cpu_64(
+ container_of(p2, struct mlx5_cqe,
+ pkt_info)->timestamp);
+ elts[pos + 3]->timestamp =
+ rte_be_to_cpu_64(
+ container_of(p3, struct mlx5_cqe,
+ pkt_info)->timestamp);
+ }
#ifdef MLX5_PMD_SOFT_COUNTERS
/* Add up received bytes count. */
byte_cnt = vbic_u16(byte_cnt, invalid_mask);
diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
index 88c5d75..ab2d05b 100644
--- a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
+++ b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
@@ -552,7 +552,8 @@ rxq_cq_to_ptype_oflags_v(struct mlx5_rxq_data *rxq, __m128i cqes[4],
{
__m128i pinfo0, pinfo1;
__m128i pinfo, ptype;
- __m128i ol_flags = _mm_set1_epi32(rxq->rss_hash * PKT_RX_RSS_HASH);
+ __m128i ol_flags = _mm_set1_epi32(rxq->rss_hash * PKT_RX_RSS_HASH |
+ rxq->hw_timestamp * PKT_RX_TIMESTAMP);
__m128i cv_flags;
const __m128i zero = _mm_setzero_si128();
const __m128i ptype_mask =
@@ -947,6 +948,16 @@ rxq_burst_v(struct mlx5_rxq_data *rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
rxq->pending_err |= !!_mm_cvtsi128_si64(opcode);
/* D.5 fill in mbuf - rearm_data and packet_type. */
rxq_cq_to_ptype_oflags_v(rxq, cqes, opcode, &pkts[pos]);
+ if (rxq->hw_timestamp) {
+ pkts[pos]->timestamp =
+ rte_be_to_cpu_64(cq[pos].timestamp);
+ pkts[pos + 1]->timestamp =
+ rte_be_to_cpu_64(cq[pos + p1].timestamp);
+ pkts[pos + 2]->timestamp =
+ rte_be_to_cpu_64(cq[pos + p2].timestamp);
+ pkts[pos + 3]->timestamp =
+ rte_be_to_cpu_64(cq[pos + p3].timestamp);
+ }
#ifdef MLX5_PMD_SOFT_COUNTERS
/* Add up received bytes count. */
byte_cnt = _mm_shuffle_epi8(op_own, len_shuf_mask);
--
2.7.4
^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [dpdk-dev] [PATCH v9 3/3] net/mlx5: add Rx HW timestamp
2017-10-10 14:37 ` [dpdk-dev] [PATCH v9 3/3] net/mlx5: " Raslan Darawsheh
@ 2017-10-10 14:40 ` Yongseok Koh
0 siblings, 0 replies; 51+ messages in thread
From: Yongseok Koh @ 2017-10-10 14:40 UTC (permalink / raw)
To: Raslan Darawsheh; +Cc: dev, Shahaf Shuler, ferruh.yigit
> On Oct 10, 2017, at 7:37 AM, Raslan Darawsheh <rasland@mellanox.com> wrote:
>
> Expose Rx HW timestamp to packet mbufs.
>
> Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
> ---
Acked-by: Yongseok Koh <yskoh@mellanox.com>
Thanks
^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [dpdk-dev] [PATCH v9 1/3] ethdev: add Rx HW timestamp capability
2017-10-10 14:37 ` [dpdk-dev] [PATCH v9 " Raslan Darawsheh
2017-10-10 14:37 ` [dpdk-dev] [PATCH v9 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
2017-10-10 14:37 ` [dpdk-dev] [PATCH v9 3/3] net/mlx5: " Raslan Darawsheh
@ 2017-10-11 1:14 ` Ferruh Yigit
2017-10-11 1:22 ` Yongseok Koh
2 siblings, 1 reply; 51+ messages in thread
From: Ferruh Yigit @ 2017-10-11 1:14 UTC (permalink / raw)
To: Raslan Darawsheh, dev; +Cc: shahafs, yskoh
On 10/10/2017 3:37 PM, Raslan Darawsheh wrote:
> Add a new offload capability flag for Rx HW
> timestamp and enabling/disabling this via rte_eth_rxmode.
>
> Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
> Reviewed-by: Shahaf Shuler <shahafs@mellanox.com>
> Acked-by: Yongseok Koh <yskoh@mellanox.com>
Series applied to dpdk-next-net/master, thanks.
(fixed testpmd 32bits build error while applying, please confirm the commit)
^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [dpdk-dev] [PATCH v9 1/3] ethdev: add Rx HW timestamp capability
2017-10-11 1:14 ` [dpdk-dev] [PATCH v9 1/3] ethdev: add Rx HW timestamp capability Ferruh Yigit
@ 2017-10-11 1:22 ` Yongseok Koh
2017-10-11 1:30 ` Ferruh Yigit
0 siblings, 1 reply; 51+ messages in thread
From: Yongseok Koh @ 2017-10-11 1:22 UTC (permalink / raw)
To: Ferruh Yigit; +Cc: Raslan Darawsheh, dev, Shahaf Shuler
> On Oct 10, 2017, at 6:14 PM, Ferruh Yigit <ferruh.yigit@intel.com> wrote:
>
> On 10/10/2017 3:37 PM, Raslan Darawsheh wrote:
>> Add a new offload capability flag for Rx HW
>> timestamp and enabling/disabling this via rte_eth_rxmode.
>>
>> Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
>> Reviewed-by: Shahaf Shuler <shahafs@mellanox.com>
>> Acked-by: Yongseok Koh <yskoh@mellanox.com>
>
> Series applied to dpdk-next-net/master, thanks.
>
> (fixed testpmd 32bits build error while applying, please confirm the commit)
There seems to be one line of change in "app/testpmd: add Rx HW timestamp"
< + printf(" - timestamp %lu ", mb->timestamp);
---
> + printf(" - timestamp %"PRIu64" ", mb->timestamp);
And we are okay with it.
Thanks,
Yongseok
^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [dpdk-dev] [PATCH v9 1/3] ethdev: add Rx HW timestamp capability
2017-10-11 1:22 ` Yongseok Koh
@ 2017-10-11 1:30 ` Ferruh Yigit
0 siblings, 0 replies; 51+ messages in thread
From: Ferruh Yigit @ 2017-10-11 1:30 UTC (permalink / raw)
To: Yongseok Koh; +Cc: Raslan Darawsheh, dev, Shahaf Shuler
On 10/11/2017 2:22 AM, Yongseok Koh wrote:
>
>> On Oct 10, 2017, at 6:14 PM, Ferruh Yigit <ferruh.yigit@intel.com> wrote:
>>
>> On 10/10/2017 3:37 PM, Raslan Darawsheh wrote:
>>> Add a new offload capability flag for Rx HW
>>> timestamp and enabling/disabling this via rte_eth_rxmode.
>>>
>>> Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
>>> Reviewed-by: Shahaf Shuler <shahafs@mellanox.com>
>>> Acked-by: Yongseok Koh <yskoh@mellanox.com>
>>
>> Series applied to dpdk-next-net/master, thanks.
>>
>> (fixed testpmd 32bits build error while applying, please confirm the commit)
>
> There seems to be one line of change in "app/testpmd: add Rx HW timestamp"
>
> < + printf(" - timestamp %lu ", mb->timestamp);
> ---
>> + printf(" - timestamp %"PRIu64" ", mb->timestamp);
>
Yes, only this one.
> And we are okay with it.
Thanks.
>
> Thanks,
> Yongseok
>
^ permalink raw reply [flat|nested] 51+ messages in thread
end of thread, other threads:[~2017-10-11 1:30 UTC | newest]
Thread overview: 51+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-08-22 13:46 [dpdk-dev] [PATCH 1/3] ethdev: expose Rx hardware timestamp Raslan Darawsheh
2017-08-22 13:46 ` [dpdk-dev] [PATCH 2/3] app/testpmd: add Rx timestamp in testpmd Raslan Darawsheh
2017-08-22 13:46 ` [dpdk-dev] [PATCH 3/3] net/mlx5: add hardware timestamp Raslan Darawsheh
2017-08-23 15:02 ` Nélio Laranjeiro
2017-08-24 7:46 ` [dpdk-dev] [PATCH v2 1/3] ethdev: expose Rx " Raslan Darawsheh
2017-08-24 7:46 ` [dpdk-dev] [PATCH v2 2/3] app/testpmd: add Rx timestamp in testpmd Raslan Darawsheh
2017-08-24 13:49 ` Nélio Laranjeiro
2017-08-24 7:46 ` [dpdk-dev] [PATCH v2 3/3] net/mlx5: add hardware timestamp Raslan Darawsheh
2017-08-24 14:01 ` Nélio Laranjeiro
2017-08-24 13:47 ` [dpdk-dev] [PATCH v2 1/3] ethdev: expose Rx " Nélio Laranjeiro
2017-09-28 16:48 ` [dpdk-dev] [PATCH v3 1/3] ethdev: add Rx HW timestamp capability Raslan Darawsheh
2017-09-28 16:48 ` [dpdk-dev] [PATCH v3 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
2017-09-28 16:48 ` [dpdk-dev] [PATCH v3 3/3] net/mlx5: " Raslan Darawsheh
2017-09-29 7:25 ` [dpdk-dev] [PATCH v3 1/3] ethdev: add Rx HW timestamp capability Andrew Rybchenko
2017-10-01 6:44 ` Shahaf Shuler
2017-10-02 14:50 ` [dpdk-dev] [PATCH " Raslan Darawsheh
2017-10-02 14:50 ` [dpdk-dev] [PATCH 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
2017-10-02 14:50 ` [dpdk-dev] [PATCH 3/3] net/mlx5: " Raslan Darawsheh
2017-10-02 18:48 ` [dpdk-dev] [PATCH 1/3] ethdev: add Rx HW timestamp capability Ferruh Yigit
2017-10-03 0:39 ` Yongseok Koh
2017-10-03 6:33 ` [dpdk-dev] [PATCH v5 " Raslan Darawsheh
2017-10-03 6:33 ` [dpdk-dev] [PATCH v5 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
2017-10-03 6:33 ` [dpdk-dev] [PATCH v5 3/3] net/mlx5: " Raslan Darawsheh
2017-10-03 6:40 ` [dpdk-dev] [PATCH v5 1/3] ethdev: add Rx HW timestamp capability Andrew Rybchenko
2017-10-03 6:53 ` Yongseok Koh
2017-10-03 7:24 ` Andrew Rybchenko
2017-10-03 11:00 ` [dpdk-dev] [PATCH v6 " Raslan Darawsheh
2017-10-03 11:00 ` [dpdk-dev] [PATCH v6 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
2017-10-05 23:11 ` Yongseok Koh
2017-10-03 11:00 ` [dpdk-dev] [PATCH v6 3/3] net/mlx5: " Raslan Darawsheh
2017-10-05 23:23 ` Yongseok Koh
2017-10-08 8:24 ` [dpdk-dev] [PATCH v7 1/3] ethdev: add Rx HW timestamp capability Raslan Darawsheh
2017-10-08 8:24 ` [dpdk-dev] [PATCH v7 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
2017-10-08 8:24 ` [dpdk-dev] [PATCH v7 3/3] net/mlx5: " Raslan Darawsheh
2017-10-09 19:17 ` Ferruh Yigit
2017-10-10 7:45 ` [dpdk-dev] [PATCH v8 1/3] ethdev: add Rx HW timestamp capability Raslan Darawsheh
2017-10-10 7:45 ` [dpdk-dev] [PATCH v8 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
2017-10-10 7:45 ` [dpdk-dev] [PATCH v8 3/3] net/mlx5: " Raslan Darawsheh
2017-10-10 13:33 ` [dpdk-dev] [PATCH v8 1/3] ethdev: add Rx HW timestamp capability Yongseok Koh
2017-10-10 14:37 ` [dpdk-dev] [PATCH v9 " Raslan Darawsheh
2017-10-10 14:37 ` [dpdk-dev] [PATCH v9 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
2017-10-10 14:37 ` [dpdk-dev] [PATCH v9 3/3] net/mlx5: " Raslan Darawsheh
2017-10-10 14:40 ` Yongseok Koh
2017-10-11 1:14 ` [dpdk-dev] [PATCH v9 1/3] ethdev: add Rx HW timestamp capability Ferruh Yigit
2017-10-11 1:22 ` Yongseok Koh
2017-10-11 1:30 ` Ferruh Yigit
2017-10-04 5:57 ` [dpdk-dev] [PATCH v6 " Shahaf Shuler
2017-10-06 0:54 ` Ferruh Yigit
2017-10-02 14:01 ` [dpdk-dev] [PATCH " Raslan Darawsheh
2017-10-02 14:01 ` [dpdk-dev] [PATCH 2/3] app/testpmd: add Rx HW timestamp Raslan Darawsheh
2017-10-02 14:01 ` [dpdk-dev] [PATCH 3/3] net/mlx5: " Raslan Darawsheh
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