From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9BF5745501; Wed, 26 Jun 2024 14:03:17 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C134743407; Wed, 26 Jun 2024 13:56:34 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by mails.dpdk.org (Postfix) with ESMTP id 142ED42EDA for ; Wed, 26 Jun 2024 13:44:57 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1719402298; x=1750938298; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=m9vF99b5OoiHfhM0zGiwTCUde4OyF79RLw6Gm00oFXo=; b=DLBfKdZFqJ2ICcVldNKDsuJnRAV0tnzcDkU2aLJLwkqYwUrkQzILuagY j7BQ5TvimbZJvsT/yvz5QTfGHuew58rSjixYs4bP3br1/GzQ5XEOJ7MvF YszUkr51bKlfBWUpgPGTW7h12hR358jcU1XKHMh0MVIdbnSa8ufNnHciY 6n806KCTWJY23lQPCNux/6j3K+aYL476cIiPF9Q6vd+j4CcZ17X20srQ7 moq9seJGwmU7lCF4giGD3faRgFWxq90RRjvE+4E04KYQpqbRBKOaq+wL7 1tHVPDRcwKkQkEAHJwEr7iF0p2BhxAwRZzOFmtZHfdaq9Q+TVYDgM0m/K g==; X-CSE-ConnectionGUID: sXoBgQwtSMCF9sxJJo4slg== X-CSE-MsgGUID: wo+UGZ6zTSu8mI8gCS35CA== X-IronPort-AV: E=McAfee;i="6700,10204,11114"; a="38979481" X-IronPort-AV: E=Sophos;i="6.08,266,1712646000"; d="scan'208";a="38979481" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Jun 2024 04:44:57 -0700 X-CSE-ConnectionGUID: F2YKtcqaSsq5dnCrjlvkHQ== X-CSE-MsgGUID: 4eBWjrZSRY6fJPOE9KdWCg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,266,1712646000"; d="scan'208";a="43874126" Received: from unknown (HELO silpixa00401119.ir.intel.com) ([10.55.129.167]) by orviesa010.jf.intel.com with ESMTP; 26 Jun 2024 04:44:57 -0700 From: Anatoly Burakov To: dev@dpdk.org Cc: Sergey Temerkhanov , ian.stokes@intel.com, bruce.richardson@intel.com Subject: [PATCH v4 070/103] net/ice/base: remove switch-related code Date: Wed, 26 Jun 2024 12:41:58 +0100 Message-ID: <138354ceb25ae79d3425b6c51cc6dbc12dce4bfb.1719401848.git.anatoly.burakov@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Sergey Temerkhanov There are some checks related to switch mode that were added to DPDK by accident. Remove them. Signed-off-by: Sergey Temerkhanov Signed-off-by: Anatoly Burakov --- drivers/net/ice/base/ice_ptp_hw.c | 13 +------------ 1 file changed, 1 insertion(+), 12 deletions(-) diff --git a/drivers/net/ice/base/ice_ptp_hw.c b/drivers/net/ice/base/ice_ptp_hw.c index f880cb2c5d..77e30c2306 100644 --- a/drivers/net/ice/base/ice_ptp_hw.c +++ b/drivers/net/ice/base/ice_ptp_hw.c @@ -1509,9 +1509,6 @@ static void ice_ptp_reset_ts_memory_eth56g(struct ice_hw *hw) unsigned int port; for (port = 0; port < hw->max_phy_port; port++) { - if (!(hw->ena_lports & BIT(port))) - continue; - ice_write_phy_reg_eth56g(hw, port, PHY_REG_TX_MEMORY_STATUS_L, 0); ice_write_phy_reg_eth56g(hw, port, PHY_REG_TX_MEMORY_STATUS_U, @@ -1568,8 +1565,7 @@ ice_ptp_prep_phy_time_eth56g(struct ice_hw *hw, u32 time) for (port = 0; port < hw->max_phy_port; port++) { int err; - if (!(hw->ena_lports & BIT(port))) - continue; + err = ice_ptp_prep_port_phy_time_eth56g(hw, port, phy_time); if (err) { @@ -1664,8 +1660,6 @@ ice_ptp_prep_phy_adj_eth56g(struct ice_hw *hw, s32 adj, bool lock_sbq) cycles = (s64)adj << 32; for (port = 0; port < hw->max_phy_port; port++) { - if (!(hw->ena_lports & BIT(port))) - continue; err = ice_ptp_prep_port_adj_eth56g(hw, port, cycles, lock_sbq); if (err) @@ -1691,8 +1685,6 @@ ice_ptp_prep_phy_incval_eth56g(struct ice_hw *hw, u64 incval) for (port = 0; port < hw->max_phy_port; port++) { int err; - if (!(hw->ena_lports & BIT(port))) - continue; err = ice_write_40b_phy_reg_eth56g(hw, port, PHY_REG_TIMETUS_L, incval); if (err) { @@ -1752,9 +1744,6 @@ ice_ptp_prep_phy_adj_target_eth56g(struct ice_hw *hw, u32 target_time) u8 port; for (port = 0; port < hw->max_phy_port; port++) { - if (!(hw->ena_lports & BIT(port))) - continue; - /* Tx case */ /* No sub-nanoseconds data */ err = ice_write_phy_reg_eth56g_lp(hw, port, -- 2.43.0