From: Didier Pallard <didier.pallard@6wind.com>
To: dev@dpdk.org
Subject: [dpdk-dev] [PATCH] timer: add lfence before TSC read
Date: Fri, 24 Jan 2014 12:17:57 +0100 [thread overview]
Message-ID: <1390562277-24769-1-git-send-email-didier.pallard@6wind.com> (raw)
According to Intel Developer's Manual:
"The RDTSC instruction is not a serializing instruction. It does not necessarily wait
until all previous instructions have been executed before reading the counter. Simi-
larly, subsequent instructions may begin execution before the read operation is
performed. If software requires RDTSC to be executed only after all previous instruc-
tions have completed locally, it can either use RDTSCP (if the processor supports that
instruction) or execute the sequence LFENCE;RDTSC."
So add a lfence instruction before rdtsc to synchronize read operations and ensure
that the read is done at the expected instant.
Signed-off-by: Didier Pallard <didier.pallard@6wind.com>
---
lib/librte_eal/common/include/rte_cycles.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/lib/librte_eal/common/include/rte_cycles.h b/lib/librte_eal/common/include/rte_cycles.h
index cc6fe71..487dba6 100644
--- a/lib/librte_eal/common/include/rte_cycles.h
+++ b/lib/librte_eal/common/include/rte_cycles.h
@@ -110,6 +110,9 @@ rte_rdtsc(void)
};
} tsc;
+ /* serialize previous load instructions in pipe */
+ asm volatile("lfence");
+
#ifdef RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT
if (unlikely(rte_cycles_vmware_tsc_map)) {
/* ecx = 0x10000 corresponds to the physical TSC for VMware */
--
1.7.10.4
next reply other threads:[~2014-01-24 11:16 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-24 11:17 Didier Pallard [this message]
2014-01-24 11:42 ` François-Frédéric Ozog
2014-01-24 12:48 ` Ananyev, Konstantin
2014-01-27 9:57 ` Thomas Monjalon
2014-01-27 11:58 ` didier.pallard
2014-01-28 1:28 ` Sangjin Han
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