From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-we0-f180.google.com (mail-we0-f180.google.com [74.125.82.180]) by dpdk.org (Postfix) with ESMTP id 362AE5320 for ; Fri, 24 Jan 2014 12:16:48 +0100 (CET) Received: by mail-we0-f180.google.com with SMTP id q59so2450051wes.25 for ; Fri, 24 Jan 2014 03:18:05 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:subject:date:message-id; bh=JcdHAEVNNKSwoIGQ0XJvgbYfLAcgmeNJtJpBnJP2L2c=; b=jwicdWxS1HUL3SMNkNN7F7Y1Z6GA0Yrx+VPS6KOiR5GYms7PlZ0w7MrBNJE+EUFBv0 ORcGyuETHYefAtLFKhCwuKkXPkU+7zoJhI0p5ioqtn21HnvHzDv3Lh+QKjVVndec7rRH DW27y5K4MTq8h6e/tHEU0sejRwOS8BpCebzujN9J/dk4YXgLv1tXwdR8rlIcIDsHf58j ZYEICB4jppbAEajGX4++s4RWeOwrcJRZSUx3ToBz8KNffXGYegdjSY8LAw13eF9XHhr2 0nyE7Td9Q7BOXjftFs2TmJ0AarUeAG54sESpO2mFKOFE0d3YjjCcz+FG5dmUYLKMIK3i hojg== X-Gm-Message-State: ALoCoQnDkYucOp+YqIzXqjzFsMnrOeKQB1A8Yb4GBkI98rL59HhPwYyX2yuCd3cAYKi/38lAmEmi X-Received: by 10.180.72.195 with SMTP id f3mr2641570wiv.61.1390562284938; Fri, 24 Jan 2014 03:18:04 -0800 (PST) Received: from pala.dev.6wind.com (6wind.net2.nerim.net. [213.41.180.237]) by mx.google.com with ESMTPSA id bj3sm1423481wjb.14.2014.01.24.03.18.03 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 24 Jan 2014 03:18:04 -0800 (PST) From: Didier Pallard To: dev@dpdk.org Date: Fri, 24 Jan 2014 12:17:57 +0100 Message-Id: <1390562277-24769-1-git-send-email-didier.pallard@6wind.com> X-Mailer: git-send-email 1.7.10.4 Subject: [dpdk-dev] [PATCH] timer: add lfence before TSC read X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 24 Jan 2014 11:16:48 -0000 According to Intel Developer's Manual: "The RDTSC instruction is not a serializing instruction. It does not necessarily wait until all previous instructions have been executed before reading the counter. Simi- larly, subsequent instructions may begin execution before the read operation is performed. If software requires RDTSC to be executed only after all previous instruc- tions have completed locally, it can either use RDTSCP (if the processor supports that instruction) or execute the sequence LFENCE;RDTSC." So add a lfence instruction before rdtsc to synchronize read operations and ensure that the read is done at the expected instant. Signed-off-by: Didier Pallard --- lib/librte_eal/common/include/rte_cycles.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/lib/librte_eal/common/include/rte_cycles.h b/lib/librte_eal/common/include/rte_cycles.h index cc6fe71..487dba6 100644 --- a/lib/librte_eal/common/include/rte_cycles.h +++ b/lib/librte_eal/common/include/rte_cycles.h @@ -110,6 +110,9 @@ rte_rdtsc(void) }; } tsc; + /* serialize previous load instructions in pipe */ + asm volatile("lfence"); + #ifdef RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT if (unlikely(rte_cycles_vmware_tsc_map)) { /* ecx = 0x10000 corresponds to the physical TSC for VMware */ -- 1.7.10.4