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From: Anatoly Burakov <anatoly.burakov@intel.com>
To: dev@dpdk.org
Cc: Milena Olech <milena.olech@intel.com>, ian.stokes@intel.com,
bruce.richardson@intel.com
Subject: [PATCH v4 094/103] net/ice/base: change a method to get pca9575 handle
Date: Wed, 26 Jun 2024 12:42:22 +0100
Message-ID: <13bba2433e1edb98c35094efa1bc6382d3e48fd7.1719401848.git.anatoly.burakov@intel.com>
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From: Milena Olech <milena.olech@intel.com>
More universal method for getting pca9575 handle is introduced. The first step
is to look for CLK_MUX handle. Having that it is possible to find CLK_MUX GPIO
pin. Provided data let check what is driving the pin - the expectation is that
pca9575 node part number is returned.
Signed-off-by: Milena Olech <milena.olech@intel.com>
Signed-off-by: Ian Stokes <ian.stokes@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 12 +++++--
drivers/net/ice/base/ice_ptp_hw.c | 50 +++++++++++++++++++++++----
2 files changed, 53 insertions(+), 9 deletions(-)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 936735022d..96ba19f94a 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1761,6 +1761,8 @@ struct ice_aqc_link_topo_params {
#define ICE_AQC_LINK_TOPO_NODE_TYPE_CAGE 6
#define ICE_AQC_LINK_TOPO_NODE_TYPE_MEZZ 7
#define ICE_AQC_LINK_TOPO_NODE_TYPE_ID_EEPROM 8
+#define ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL 9
+#define ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_MUX 10
#define ICE_AQC_LINK_TOPO_NODE_TYPE_GPS 11
#define ICE_AQC_LINK_TOPO_NODE_CTX_S 4
#define ICE_AQC_LINK_TOPO_NODE_CTX_M \
@@ -1798,8 +1800,13 @@ struct ice_aqc_link_topo_addr {
struct ice_aqc_get_link_topo {
struct ice_aqc_link_topo_addr addr;
u8 node_part_num;
-#define ICE_ACQ_GET_LINK_TOPO_NODE_NR_PCA9575 0x21
-#define ICE_ACQ_GET_LINK_TOPO_NODE_NR_GEN_GPS 0x48
+#define ICE_AQC_GET_LINK_TOPO_NODE_NR_PCA9575 0x21
+#define ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032 0x24
+#define ICE_AQC_GET_LINK_TOPO_NODE_NR_SI5383_5384 0x25
+#define ICE_AQC_GET_LINK_TOPO_NODE_NR_E822_PHY 0x30
+#define ICE_AQC_GET_LINK_TOPO_NODE_NR_C827 0x31
+#define ICE_AQC_GET_LINK_TOPO_NODE_NR_GEN_CLK_MUX 0x47
+#define ICE_AQC_GET_LINK_TOPO_NODE_NR_GEN_GPS 0x48
u8 rsvd[9];
};
@@ -1827,6 +1834,7 @@ struct ice_aqc_get_link_topo_pin {
#define ICE_AQC_LINK_TOPO_IO_FUNC_RED_LED 12
#define ICE_AQC_LINK_TOPO_IO_FUNC_GREEN_LED 13
#define ICE_AQC_LINK_TOPO_IO_FUNC_BLUE_LED 14
+#define ICE_AQC_LINK_TOPO_IO_FUNC_CLK_IN 20
#define ICE_AQC_LINK_TOPO_INPUT_IO_TYPE_S 5
#define ICE_AQC_LINK_TOPO_INPUT_IO_TYPE_M \
(0x7 << ICE_AQC_LINK_TOPO_INPUT_IO_TYPE_S)
diff --git a/drivers/net/ice/base/ice_ptp_hw.c b/drivers/net/ice/base/ice_ptp_hw.c
index b340b4aa6d..cb689c1a25 100644
--- a/drivers/net/ice/base/ice_ptp_hw.c
+++ b/drivers/net/ice/base/ice_ptp_hw.c
@@ -5167,10 +5167,11 @@ ice_get_phy_tx_tstamp_ready_e810(struct ice_hw *hw, u8 port, u64 *tstamp_ready)
static int
ice_get_pca9575_handle(struct ice_hw *hw, u16 *pca9575_handle)
{
+ u8 node_part_number, idx, node_type_ctx_clk_mux, node_part_num_clk_mux;
+ struct ice_aqc_get_link_topo_pin cmd_pin;
+ u16 node_handle, clock_mux_handle;
struct ice_aqc_get_link_topo cmd;
- u8 node_part_number, idx;
int status;
- u16 node_handle;
if (!hw || !pca9575_handle)
return ICE_ERR_PARAM;
@@ -5182,11 +5183,46 @@ ice_get_pca9575_handle(struct ice_hw *hw, u16 *pca9575_handle)
}
memset(&cmd, 0, sizeof(cmd));
+ memset(&cmd_pin, 0, sizeof(cmd_pin));
- /* Set node type to GPIO controller */
+ node_type_ctx_clk_mux = (ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_MUX <<
+ ICE_AQC_LINK_TOPO_NODE_TYPE_S);
+ node_type_ctx_clk_mux |= (ICE_AQC_LINK_TOPO_NODE_CTX_GLOBAL <<
+ ICE_AQC_LINK_TOPO_NODE_CTX_S);
+ node_part_num_clk_mux = ICE_AQC_GET_LINK_TOPO_NODE_NR_GEN_CLK_MUX;
+
+ /* Look for CLOCK MUX handle in the netlist */
+ status = ice_find_netlist_node(hw, node_type_ctx_clk_mux,
+ node_part_num_clk_mux,
+ &clock_mux_handle);
+ if (status)
+ return ICE_ERR_NOT_SUPPORTED;
+
+ /* Take CLOCK MUX GPIO pin */
+ cmd_pin.input_io_params = (ICE_AQC_LINK_TOPO_INPUT_IO_TYPE_GPIO <<
+ ICE_AQC_LINK_TOPO_INPUT_IO_TYPE_S);
+ cmd_pin.input_io_params |= (ICE_AQC_LINK_TOPO_IO_FUNC_CLK_IN <<
+ ICE_AQC_LINK_TOPO_INPUT_IO_FUNC_S);
+ cmd_pin.addr.handle = CPU_TO_LE16(clock_mux_handle);
+ cmd_pin.addr.topo_params.node_type_ctx =
+ (ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_MUX <<
+ ICE_AQC_LINK_TOPO_NODE_TYPE_S);
+ cmd_pin.addr.topo_params.node_type_ctx |=
+ (ICE_AQC_LINK_TOPO_NODE_CTX_PROVIDED <<
+ ICE_AQC_LINK_TOPO_NODE_CTX_S);
+
+ status = ice_aq_get_netlist_node_pin(hw, &cmd_pin, &node_handle);
+ if (status)
+ return ICE_ERR_NOT_SUPPORTED;
+
+ /* Check what is driving the pin */
cmd.addr.topo_params.node_type_ctx =
- (ICE_AQC_LINK_TOPO_NODE_TYPE_M &
- ICE_AQC_LINK_TOPO_NODE_TYPE_GPIO_CTRL);
+ (ICE_AQC_LINK_TOPO_NODE_TYPE_GPIO_CTRL <<
+ ICE_AQC_LINK_TOPO_NODE_TYPE_S);
+ cmd.addr.topo_params.node_type_ctx |=
+ (ICE_AQC_LINK_TOPO_NODE_CTX_GLOBAL <<
+ ICE_AQC_LINK_TOPO_NODE_CTX_S);
+ cmd.addr.handle = CPU_TO_LE16(node_handle);
#define SW_PCA9575_SFP_TOPO_IDX 2
#define SW_PCA9575_QSFP_TOPO_IDX 1
@@ -5207,7 +5243,7 @@ ice_get_pca9575_handle(struct ice_hw *hw, u16 *pca9575_handle)
return ICE_ERR_NOT_SUPPORTED;
/* Verify if we found the right IO expander type */
- if (node_part_number != ICE_ACQ_GET_LINK_TOPO_NODE_NR_PCA9575)
+ if (node_part_number != ICE_AQC_GET_LINK_TOPO_NODE_NR_PCA9575)
return ICE_ERR_NOT_SUPPORTED;
/* If present save the handle and return it */
@@ -5226,7 +5262,7 @@ ice_get_pca9575_handle(struct ice_hw *hw, u16 *pca9575_handle)
bool ice_is_gps_present_e810t(struct ice_hw *hw)
{
if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_GPS,
- ICE_ACQ_GET_LINK_TOPO_NODE_NR_GEN_GPS, NULL))
+ ICE_AQC_GET_LINK_TOPO_NODE_NR_GEN_GPS, NULL))
return false;
return true;
--
2.43.0