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Tue, 12 Mar 2019 15:24:59 +0000 From: Igor Russkikh To: "dev@dpdk.org" CC: Pavel Belous , Igor Russkikh , Pavel Belous Thread-Topic: [PATCH v3 05/10] net/atlantic: use EEPROM magic as a device address Thread-Index: AQHU2OfBHYDDICbFE0mHbxUJxXx3LQ== Date: Tue, 12 Mar 2019 15:24:59 +0000 Message-ID: <13dc16dc55b42d6ba0df358ad727308938fde8cf.1552402263.git.igor.russkikh@aquantia.com> References: In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HE1PR0901CA0050.eurprd09.prod.outlook.com (2603:10a6:3:45::18) To DM6PR11MB3625.namprd11.prod.outlook.com (2603:10b6:5:13a::21) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Igor.Russkikh@aquantia.com; x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.17.1 x-originating-ip: [95.79.108.179] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 553eefff-3191-4a17-0b10-08d6a6fee3da x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600127)(711020)(4605104)(2017052603328)(7153060)(7193020); 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: aquantia.com X-MS-Exchange-CrossTenant-Network-Message-Id: 553eefff-3191-4a17-0b10-08d6a6fee3da X-MS-Exchange-CrossTenant-originalarrivaltime: 12 Mar 2019 15:24:59.7898 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 83e2e134-991c-4ede-8ced-34d47e38e6b1 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR11MB2747 Subject: [dpdk-dev] [PATCH v3 05/10] net/atlantic: use EEPROM magic as a device address X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 12 Mar 2019 15:25:02 -0000 From: Pavel Belous Default dev addr is replaced with magic field from the request. Length is allowed to be less than maximum. SMBUS access bit definitions also better organised now. Signed-off-by: Igor Russkikh Signed-off-by: Pavel Belous --- drivers/net/atlantic/atl_ethdev.c | 25 +++++++++++----- drivers/net/atlantic/atl_types.h | 7 +++-- drivers/net/atlantic/hw_atl/hw_atl_utils.c | 4 +++ drivers/net/atlantic/hw_atl/hw_atl_utils.h | 23 +++++++------- .../net/atlantic/hw_atl/hw_atl_utils_fw2x.c | 30 +++++++++++-------- 5 files changed, 58 insertions(+), 31 deletions(-) diff --git a/drivers/net/atlantic/atl_ethdev.c b/drivers/net/atlantic/atl_e= thdev.c index 5bc04f55cc21..a510646a5f7e 100644 --- a/drivers/net/atlantic/atl_ethdev.c +++ b/drivers/net/atlantic/atl_ethdev.c @@ -1102,24 +1102,31 @@ atl_dev_get_eeprom_length(struct rte_eth_dev *dev _= _rte_unused) return SFP_EEPROM_SIZE; } =20 -static int -atl_dev_get_eeprom(struct rte_eth_dev *dev, struct rte_dev_eeprom_info *ee= prom) +int atl_dev_get_eeprom(struct rte_eth_dev *dev, + struct rte_dev_eeprom_info *eeprom) { struct aq_hw_s *hw =3D ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private); + uint32_t dev_addr =3D SMBUS_DEVICE_ID; =20 if (hw->aq_fw_ops->get_eeprom =3D=3D NULL) return -ENOTSUP; =20 - if (eeprom->length !=3D SFP_EEPROM_SIZE || eeprom->data =3D=3D NULL) + if (eeprom->length + eeprom->offset > SFP_EEPROM_SIZE || + eeprom->data =3D=3D NULL) return -EINVAL; =20 - return hw->aq_fw_ops->get_eeprom(hw, eeprom->data, eeprom->length); + if (eeprom->magic) + dev_addr =3D eeprom->magic; + + return hw->aq_fw_ops->get_eeprom(hw, dev_addr, eeprom->data, + eeprom->length, eeprom->offset); } =20 -static int -atl_dev_set_eeprom(struct rte_eth_dev *dev, struct rte_dev_eeprom_info *ee= prom) +int atl_dev_set_eeprom(struct rte_eth_dev *dev, + struct rte_dev_eeprom_info *eeprom) { struct aq_hw_s *hw =3D ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private); + uint32_t dev_addr =3D SMBUS_DEVICE_ID; =20 if (hw->aq_fw_ops->set_eeprom =3D=3D NULL) return -ENOTSUP; @@ -1127,7 +1134,11 @@ atl_dev_set_eeprom(struct rte_eth_dev *dev, struct r= te_dev_eeprom_info *eeprom) if (eeprom->length !=3D SFP_EEPROM_SIZE || eeprom->data =3D=3D NULL) return -EINVAL; =20 - return hw->aq_fw_ops->set_eeprom(hw, eeprom->data, eeprom->length); + if (eeprom->magic) + dev_addr =3D eeprom->magic; + + return hw->aq_fw_ops->set_eeprom(hw, dev_addr, + eeprom->data, eeprom->length); } =20 static int diff --git a/drivers/net/atlantic/atl_types.h b/drivers/net/atlantic/atl_ty= pes.h index 3d90f6caefc2..3edaf0c7c047 100644 --- a/drivers/net/atlantic/atl_types.h +++ b/drivers/net/atlantic/atl_types.h @@ -137,9 +137,12 @@ struct aq_fw_ops { =20 int (*led_control)(struct aq_hw_s *self, u32 mode); =20 - int (*get_eeprom)(struct aq_hw_s *self, u32 *data, u32 len); + int (*get_eeprom)(struct aq_hw_s *self, int dev_addr, + u32 *data, u32 len, u32 offset); + + int (*set_eeprom)(struct aq_hw_s *self, int dev_addr, + u32 *data, u32 len); =20 - int (*set_eeprom)(struct aq_hw_s *self, u32 *data, u32 len); }; =20 struct atl_sw_stats { diff --git a/drivers/net/atlantic/hw_atl/hw_atl_utils.c b/drivers/net/atlan= tic/hw_atl/hw_atl_utils.c index 13f02b9f99c5..4299b7016e2f 100644 --- a/drivers/net/atlantic/hw_atl/hw_atl_utils.c +++ b/drivers/net/atlantic/hw_atl/hw_atl_utils.c @@ -305,6 +305,10 @@ int hw_atl_utils_fw_downld_dwords(struct aq_hw_s *self= , u32 a, AQ_HW_WAIT_FOR(!(0x100 & aq_hw_read_reg(self, HW_ATL_MIF_CMD)), 1, 1000U); + if (err) { + err =3D -ETIMEDOUT; + goto err_exit; + } =20 *(p++) =3D aq_hw_read_reg(self, HW_ATL_MIF_VAL); a +=3D 4; diff --git a/drivers/net/atlantic/hw_atl/hw_atl_utils.h b/drivers/net/atlan= tic/hw_atl/hw_atl_utils.h index 5f3f70847310..f2a87826c0d1 100644 --- a/drivers/net/atlantic/hw_atl/hw_atl_utils.h +++ b/drivers/net/atlantic/hw_atl/hw_atl_utils.h @@ -8,6 +8,7 @@ #ifndef HW_ATL_UTILS_H #define HW_ATL_UTILS_H =20 +#define BIT(x) (1UL << (x)) #define HW_ATL_FLUSH() { (void)aq_hw_read_reg(self, 0x10); } =20 /* Hardware tx descriptor */ @@ -389,18 +390,8 @@ enum hal_atl_utils_fw_state_e { #define HAL_ATLANTIC_UTILS_FW_MSG_OFFLOAD_DEL 10U #define HAL_ATLANTIC_UTILS_FW_MSG_CABLE_DIAG 13U // 0xd =20 -#define SMBUS_READ_REQUEST BIT(13) -#define SMBUS_WRITE_REQUEST BIT(14) #define SMBUS_DEVICE_ID 0x50 =20 -enum hw_atl_fw2x_rate { - FW2X_RATE_100M =3D 0x20, - FW2X_RATE_1G =3D 0x100, - FW2X_RATE_2G5 =3D 0x200, - FW2X_RATE_5G =3D 0x400, - FW2X_RATE_10G =3D 0x800, -}; - enum hw_atl_fw2x_caps_lo { CAPS_LO_10BASET_HD =3D 0x00, CAPS_LO_10BASET_FD, @@ -414,6 +405,10 @@ enum hw_atl_fw2x_caps_lo { CAPS_LO_2P5GBASET_FD, CAPS_LO_5GBASET_FD, CAPS_LO_10GBASET_FD, + CAPS_LO_AUTONEG, + CAPS_LO_SMBUS_READ, + CAPS_LO_SMBUS_WRITE, + CAPS_LO_MACSEC }; =20 enum hw_atl_fw2x_caps_hi { @@ -451,6 +446,14 @@ enum hw_atl_fw2x_caps_hi { CAPS_HI_TRANSACTION_ID, }; =20 +enum hw_atl_fw2x_rate { + FW2X_RATE_100M =3D BIT(CAPS_LO_100BASETX_FD), + FW2X_RATE_1G =3D BIT(CAPS_LO_1000BASET_FD), + FW2X_RATE_2G5 =3D BIT(CAPS_LO_2P5GBASET_FD), + FW2X_RATE_5G =3D BIT(CAPS_LO_5GBASET_FD), + FW2X_RATE_10G =3D BIT(CAPS_LO_10GBASET_FD), +}; + struct aq_hw_s; struct aq_fw_ops; struct aq_hw_link_status_s; diff --git a/drivers/net/atlantic/hw_atl/hw_atl_utils_fw2x.c b/drivers/net/= atlantic/hw_atl/hw_atl_utils_fw2x.c index f90ccfe9e010..1d9190155421 100644 --- a/drivers/net/atlantic/hw_atl/hw_atl_utils_fw2x.c +++ b/drivers/net/atlantic/hw_atl/hw_atl_utils_fw2x.c @@ -129,7 +129,11 @@ static u32 fw2x_to_eee_mask(u32 speed) =20 static int aq_fw2x_set_link_speed(struct aq_hw_s *self, u32 speed) { - u32 val =3D link_speed_mask_2fw2x_ratemask(speed); + u32 rate_mask =3D link_speed_mask_2fw2x_ratemask(speed); + u32 reg_val =3D aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL_ADDR); + u32 val =3D rate_mask | ((BIT(CAPS_LO_SMBUS_READ) | + BIT(CAPS_LO_SMBUS_WRITE) | + BIT(CAPS_LO_MACSEC)) & reg_val); =20 aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL_ADDR, val); =20 @@ -484,7 +488,8 @@ static int aq_fw2x_led_control(struct aq_hw_s *self, u3= 2 mode) return 0; } =20 -static int aq_fw2x_get_eeprom(struct aq_hw_s *self, u32 *data, u32 len) +static int aq_fw2x_get_eeprom(struct aq_hw_s *self, int dev_addr, + u32 *data, u32 len, u32 offset) { int err =3D 0; struct smbus_read_request request; @@ -494,8 +499,8 @@ static int aq_fw2x_get_eeprom(struct aq_hw_s *self, u32= *data, u32 len) if (self->fw_ver_actual < HW_ATL_FW_FEATURE_EEPROM) return -EOPNOTSUPP; =20 - request.device_id =3D SMBUS_DEVICE_ID; - request.address =3D 0; + request.device_id =3D dev_addr; + request.address =3D offset; request.length =3D len; =20 /* Write SMBUS request to cfg memory */ @@ -506,16 +511,16 @@ static int aq_fw2x_get_eeprom(struct aq_hw_s *self, u= 32 *data, u32 len) if (err < 0) return err; =20 - /* Toggle 0x368.SMBUS_READ_REQUEST bit */ + /* Toggle 0x368.CAPS_LO_SMBUS_READ bit */ mpi_opts =3D aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL_ADDR); - mpi_opts ^=3D SMBUS_READ_REQUEST; + mpi_opts ^=3D BIT(CAPS_LO_SMBUS_READ); =20 aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL_ADDR, mpi_opts); =20 /* Wait until REQUEST_BIT matched in 0x370 */ =20 AQ_HW_WAIT_FOR((aq_hw_read_reg(self, HW_ATL_FW2X_MPI_STATE_ADDR) & - SMBUS_READ_REQUEST) =3D=3D (mpi_opts & SMBUS_READ_REQUEST), + BIT(CAPS_LO_SMBUS_READ)) =3D=3D (mpi_opts & BIT(CAPS_LO_SMBUS_READ)), 10U, 10000U); =20 if (err < 0) @@ -542,7 +547,8 @@ static int aq_fw2x_get_eeprom(struct aq_hw_s *self, u32= *data, u32 len) } =20 =20 -static int aq_fw2x_set_eeprom(struct aq_hw_s *self, u32 *data, u32 len) +static int aq_fw2x_set_eeprom(struct aq_hw_s *self, int dev_addr, + u32 *data, u32 len) { struct smbus_write_request request; u32 mpi_opts, result =3D 0; @@ -551,7 +557,7 @@ static int aq_fw2x_set_eeprom(struct aq_hw_s *self, u32= *data, u32 len) if (self->fw_ver_actual < HW_ATL_FW_FEATURE_EEPROM) return -EOPNOTSUPP; =20 - request.device_id =3D SMBUS_DEVICE_ID; + request.device_id =3D dev_addr; request.address =3D 0; request.length =3D len; =20 @@ -572,15 +578,15 @@ static int aq_fw2x_set_eeprom(struct aq_hw_s *self, u= 32 *data, u32 len) if (err < 0) return err; =20 - /* Toggle 0x368.SMBUS_WRITE_REQUEST bit */ + /* Toggle 0x368.CAPS_LO_SMBUS_WRITE bit */ mpi_opts =3D aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL_ADDR); - mpi_opts ^=3D SMBUS_WRITE_REQUEST; + mpi_opts ^=3D BIT(CAPS_LO_SMBUS_WRITE); =20 aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL_ADDR, mpi_opts); =20 /* Wait until REQUEST_BIT matched in 0x370 */ AQ_HW_WAIT_FOR((aq_hw_read_reg(self, HW_ATL_FW2X_MPI_STATE_ADDR) & - SMBUS_WRITE_REQUEST) =3D=3D (mpi_opts & SMBUS_WRITE_REQUEST), + BIT(CAPS_LO_SMBUS_WRITE)) =3D=3D (mpi_opts & BIT(CAPS_LO_SMBUS_WRITE)), 10U, 10000U); =20 if (err < 0) --=20 2.17.1