From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by dpdk.org (Postfix) with ESMTP id 9395B1B328 for ; Thu, 18 Jan 2018 15:49:27 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 18 Jan 2018 06:49:25 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,378,1511856000"; d="scan'208";a="20780303" Received: from fyigit-mobl1.ger.corp.intel.com (HELO [10.237.220.48]) ([10.237.220.48]) by FMSMGA003.fm.intel.com with ESMTP; 18 Jan 2018 06:49:23 -0800 To: =?UTF-8?Q?Rafa=c5=82_Kozik?= Cc: dev@dpdk.org, Shahaf Shuler , Marcin Wojtas , =?UTF-8?Q?Micha=c5=82_Krawczyk?= , "Tzalik, Guy" , evgenys@amazon.com, "Matushevsky, Alexander" , "Chauskin, Igor" References: <1516103563-9275-2-git-send-email-rk@semihalf.com> <1516177424-8613-1-git-send-email-rk@semihalf.com> <953fa892-d65f-2aca-9909-a812ef6a18c4@intel.com> From: Ferruh Yigit Message-ID: <13f38c4c-7758-1ea7-16ba-ab0453f101a1@intel.com> Date: Thu, 18 Jan 2018 14:49:22 +0000 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.5.2 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Subject: Re: [dpdk-dev] [PATCH v2 1/2] net/ena: convert to new Tx offloads API X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 Jan 2018 14:49:28 -0000 On 1/18/2018 9:18 AM, Rafał Kozik wrote: > 2018-01-17 19:58 GMT+01:00 Ferruh Yigit : >> On 1/17/2018 8:23 AM, Rafal Kozik wrote: >>> Ethdev Tx offloads API has changed since: >>> >>> commit cba7f53b717d ("ethdev: introduce Tx queue offloads API") >>> >>> This commit support the new Tx offloads API. Queue configuration >>> is stored in ena_ring.offloads. During preparing mbufs for tx, offloads are >>> allowed only if appropriate flags in this field are set. >>> >>> Signed-off-by: Rafal Kozik >> >> <...> >> >>> @@ -280,21 +290,24 @@ static inline void ena_rx_mbuf_prepare(struct rte_mbuf *mbuf, >>> } >>> >>> static inline void ena_tx_mbuf_prepare(struct rte_mbuf *mbuf, >>> - struct ena_com_tx_ctx *ena_tx_ctx) >>> + struct ena_com_tx_ctx *ena_tx_ctx, >>> + uint64_t queue_offloads) >>> { >>> struct ena_com_tx_meta *ena_meta = &ena_tx_ctx->ena_meta; >>> >>> - if (mbuf->ol_flags & >>> - (PKT_TX_L4_MASK | PKT_TX_IP_CKSUM | PKT_TX_TCP_SEG)) { >>> + if ((mbuf->ol_flags & MBUF_OFFLOADS) && >>> + (queue_offloads & QUEUE_OFFLOADS)) { >>> /* check if TSO is required */ >>> - if (mbuf->ol_flags & PKT_TX_TCP_SEG) { >>> + if ((mbuf->ol_flags & PKT_TX_TCP_SEG) && >>> + (queue_offloads & DEV_TX_OFFLOAD_TCP_TSO)) { >>> ena_tx_ctx->tso_enable = true; >>> >>> ena_meta->l4_hdr_len = GET_L4_HDR_LEN(mbuf); >>> } >>> >>> /* check if L3 checksum is needed */ >>> - if (mbuf->ol_flags & PKT_TX_IP_CKSUM) >>> + if ((mbuf->ol_flags & PKT_TX_IP_CKSUM) && >>> + (queue_offloads & DEV_TX_OFFLOAD_IPV4_CKSUM)) >>> ena_tx_ctx->l3_csum_enable = true; >> >> This function is fast path right? >> Do you really need new extra check to queue_offloads, isn't that information is >> for setup phase? >> > > ENA does not have a switch for enabling/disabling offloads during configuration. > We must use additional variable and track it, otherwise the driver could use > checksum offloads by enabling it in mbuf although it was disabled in > queue configuration. OK, thanks for clarification.