DPDK patches and discussions
 help / color / mirror / Atom feed
From: Helin Zhang <helin.zhang@intel.com>
To: dev@dpdk.org
Subject: [dpdk-dev] [PATCH 19/22] igb_uio: add sys files to read/write specific bits in pci config space
Date: Wed, 21 May 2014 23:30:18 +0800	[thread overview]
Message-ID: <1400686221-4696-20-git-send-email-helin.zhang@intel.com> (raw)
In-Reply-To: <1400686221-4696-1-git-send-email-helin.zhang@intel.com>

Enabling 'Extended Tag' and resetting 'Max Read Request Size' in PCI config space
have big impacts to i40e performance. They cannot be changed on some BIOS
implementations, though can on others. Two sys files of 'extended_tag' and
'max_read_request_size' are added to support changing them by 'echo' in user space.

Signed-off-by: Helin Zhang <helin.zhang@intel.com>
Signed-off-by: Mark Chen <jing.d.chen@intel.com>
---
 lib/librte_eal/linuxapp/igb_uio/igb_uio.c | 105 ++++++++++++++++++++++++++++++
 1 file changed, 105 insertions(+)

diff --git a/lib/librte_eal/linuxapp/igb_uio/igb_uio.c b/lib/librte_eal/linuxapp/igb_uio/igb_uio.c
index 79fe97d..55e801d 100644
--- a/lib/librte_eal/linuxapp/igb_uio/igb_uio.c
+++ b/lib/librte_eal/linuxapp/igb_uio/igb_uio.c
@@ -47,6 +47,15 @@
 #define PCI_MSIX_ENTRY_CTRL_MASKBIT     1
 #endif
 
+#ifdef RTE_PCI_CONFIG
+#define PCI_SYS_FILE_BUF_SIZE      10
+#define PCI_DEV_CAP_REG            0xA4
+#define PCI_DEV_CTRL_REG           0xA8
+#define PCI_DEV_CAP_EXT_TAG_MASK   0x20
+#define PCI_DEV_CTRL_EXT_TAG_SHIFT 8
+#define PCI_DEV_CTRL_EXT_TAG_MASK  (1 << PCI_DEV_CTRL_EXT_TAG_SHIFT)
+#endif
+
 #define IGBUIO_NUM_MSI_VECTORS 1
 
 /* interrupt mode */
@@ -151,9 +160,105 @@ store_max_vfs(struct device *dev, struct device_attribute *attr,
 	return err ? err : count;							
 }
 
+#ifdef RTE_PCI_CONFIG
+static ssize_t
+show_extended_tag(struct device *dev, struct device_attribute *attr, char *buf)
+{
+	struct pci_dev *pci_dev = container_of(dev, struct pci_dev, dev);
+	uint32_t val = 0;
+
+	pci_read_config_dword(pci_dev, PCI_DEV_CAP_REG, &val);
+	if (!(val & PCI_DEV_CAP_EXT_TAG_MASK)) /* Not supported */
+		return snprintf(buf, PCI_SYS_FILE_BUF_SIZE, "%s\n", "invalid");
+
+	val = 0;
+	pci_bus_read_config_dword(pci_dev->bus, pci_dev->devfn,
+					PCI_DEV_CTRL_REG, &val);
+
+	return snprintf(buf, PCI_SYS_FILE_BUF_SIZE, "%s\n",
+		(val & PCI_DEV_CTRL_EXT_TAG_MASK) ? "on" : "off");
+}
+
+static ssize_t
+store_extended_tag(struct device *dev,
+		   struct device_attribute *attr,
+		   const char *buf,
+		   size_t count)
+{
+	struct pci_dev *pci_dev = container_of(dev, struct pci_dev, dev);
+	uint32_t val = 0, enable;
+
+	if (strncmp(buf, "on", 2) == 0)
+		enable = 1;
+	else if (strncmp(buf, "off", 3) == 0)
+		enable = 0;
+	else
+		return -EINVAL;
+
+	pci_bus_read_config_dword(pci_dev->bus, pci_dev->devfn,
+					PCI_DEV_CAP_REG, &val);
+	if (!(val & PCI_DEV_CAP_EXT_TAG_MASK)) /* Not supported */
+		return -EPERM;
+
+	val = 0;
+	pci_bus_read_config_dword(pci_dev->bus, pci_dev->devfn,
+					PCI_DEV_CTRL_REG, &val);
+	if (enable)
+		val |= PCI_DEV_CTRL_EXT_TAG_MASK;
+	else
+		val &= ~PCI_DEV_CTRL_EXT_TAG_MASK;
+	pci_bus_write_config_dword(pci_dev->bus, pci_dev->devfn,
+					PCI_DEV_CTRL_REG, val);
+
+	return count;
+}
+
+static ssize_t
+show_max_read_request_size(struct device *dev,
+			   struct device_attribute *attr,
+			   char *buf)
+{
+	struct pci_dev *pci_dev = container_of(dev, struct pci_dev, dev);
+	int val = pcie_get_readrq(pci_dev);
+
+	return snprintf(buf, PCI_SYS_FILE_BUF_SIZE, "%d\n", val);
+}
+
+static ssize_t
+store_max_read_request_size(struct device *dev,
+			    struct device_attribute *attr,
+			    const char *buf,
+			    size_t count)
+{
+	struct pci_dev *pci_dev = container_of(dev, struct pci_dev, dev);
+	unsigned long size = 0;
+	int ret;
+
+	if (strict_strtoul(buf, 0, &size) != 0)
+		return -EINVAL;
+
+	ret = pcie_set_readrq(pci_dev, (int)size);
+	if (ret < 0)
+		return ret;
+
+	return count;
+}
+#endif
+
 static DEVICE_ATTR(max_vfs, S_IRUGO | S_IWUSR, show_max_vfs, store_max_vfs);
+#ifdef RTE_PCI_CONFIG
+static DEVICE_ATTR(extended_tag, S_IRUGO | S_IWUSR, show_extended_tag, \
+						store_extended_tag);
+static DEVICE_ATTR(max_read_request_size, S_IRUGO | S_IWUSR, \
+	show_max_read_request_size, store_max_read_request_size);
+#endif
+
 static struct attribute *dev_attrs[] = {
 	&dev_attr_max_vfs.attr,
+#ifdef RTE_PCI_CONFIG
+	&dev_attr_extended_tag.attr,
+	&dev_attr_max_read_request_size.attr,
+#endif
         NULL,
 };
 
-- 
1.8.1.4

  parent reply	other threads:[~2014-05-21 15:31 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-05-21 15:29 [dpdk-dev] [PATCH 00/22][PMD][I40E] *** Add i40e PMD support *** Helin Zhang
2014-05-21 15:30 ` [dpdk-dev] [PATCH 01/22] i40e: add basic shared code Helin Zhang
2014-05-21 15:30 ` [dpdk-dev] [PATCH 02/22] i40e: add PMD source files Helin Zhang
2014-05-21 15:30 ` [dpdk-dev] [PATCH 03/22] i40e: add i40e support Helin Zhang
2014-05-21 15:30 ` [dpdk-dev] [PATCH 04/22] e1000: enlarge the hash flags of RSS to 64 bits Helin Zhang
2014-05-21 15:30 ` [dpdk-dev] [PATCH 05/22] ixgbe: " Helin Zhang
2014-05-21 15:30 ` [dpdk-dev] [PATCH 06/22] vmxnet3: " Helin Zhang
2014-05-21 15:30 ` [dpdk-dev] [PATCH 07/22] app/testpmd: " Helin Zhang
2014-05-21 15:30 ` [dpdk-dev] [PATCH 08/22] examples/qos_meter: use ETH_RSS_IP to replace IP hash flags of RSS Helin Zhang
2014-05-21 15:30 ` [dpdk-dev] [PATCH 09/22] examples/multi_process: " Helin Zhang
2014-05-21 15:30 ` [dpdk-dev] [PATCH 10/22] examples/l3fwd: " Helin Zhang
2014-05-21 15:30 ` [dpdk-dev] [PATCH 11/22] examples/l3fwd-vf: " Helin Zhang
2014-05-21 15:30 ` [dpdk-dev] [PATCH 12/22] examples/l3fwd-power: " Helin Zhang
2014-05-21 15:30 ` [dpdk-dev] [PATCH 13/22] examples/ip_reassembly: " Helin Zhang
2014-05-21 15:30 ` [dpdk-dev] [PATCH 14/22] examples/dpdk_qat: " Helin Zhang
2014-05-21 15:30 ` [dpdk-dev] [PATCH 15/22] examples/load_balancer: " Helin Zhang
2014-05-21 15:30 ` [dpdk-dev] [PATCH 16/22] app/test-pmd: tell the driver the correct packet type to support i40e TX checksum offload Helin Zhang
2014-05-21 15:30 ` [dpdk-dev] [PATCH 17/22] app/test-pmd: support displaying i40e 32 bytes RX descriptor Helin Zhang
2014-05-21 15:30 ` [dpdk-dev] [PATCH 18/22] app/test-pmd: support setting port based VLAN ID offloading Helin Zhang
2014-05-21 15:30 ` Helin Zhang [this message]
2014-05-21 15:30 ` [dpdk-dev] [PATCH 20/22] pci: support reading/writing sys files of 'extended_tag' and 'max_read_request_size' Helin Zhang
2014-05-21 15:30 ` [dpdk-dev] [PATCH 21/22] config: add configurations for enabling 'Extended Tag' or resetting 'Max Read Request Size' Helin Zhang
2014-05-21 15:30 ` [dpdk-dev] [PATCH 22/22] ethdev: support setting maximum packet length to less than 1518 Helin Zhang

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1400686221-4696-20-git-send-email-helin.zhang@intel.com \
    --to=helin.zhang@intel.com \
    --cc=dev@dpdk.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).