From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 8C7625965 for ; Wed, 21 May 2014 17:31:12 +0200 (CEST) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP; 21 May 2014 08:31:21 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.98,880,1392192000"; d="scan'208";a="535510724" Received: from shilc102.sh.intel.com ([10.239.39.44]) by fmsmga001.fm.intel.com with ESMTP; 21 May 2014 08:31:20 -0700 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shilc102.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id s4LFVEmr006019; Wed, 21 May 2014 23:31:16 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id s4LFVASo005164; Wed, 21 May 2014 23:31:12 +0800 Received: (from hzhan75@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id s4LFVA0A005160; Wed, 21 May 2014 23:31:10 +0800 From: Helin Zhang To: dev@dpdk.org Date: Wed, 21 May 2014 23:30:19 +0800 Message-Id: <1400686221-4696-21-git-send-email-helin.zhang@intel.com> X-Mailer: git-send-email 1.7.0.7 In-Reply-To: <1400686221-4696-1-git-send-email-helin.zhang@intel.com> References: <1400686221-4696-1-git-send-email-helin.zhang@intel.com> Subject: [dpdk-dev] [PATCH 20/22] pci: support reading/writing sys files of 'extended_tag' and 'max_read_request_size' X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 21 May 2014 15:31:13 -0000 Sys files of 'extended_tag' and 'max_read_request_size' are supported by igb_uio. Reading or writing them to enable/disable 'Extended Tag' or reset 'Max Read Request Size' automatically according to the configurations are added. Signed-off-by: Helin Zhang Signed-off-by: Mark Chen --- lib/librte_eal/linuxapp/eal/eal_pci.c | 101 ++++++++++++++++++++++++++++++++++ 1 file changed, 101 insertions(+) diff --git a/lib/librte_eal/linuxapp/eal/eal_pci.c b/lib/librte_eal/linuxapp/eal/eal_pci.c index ac2c1fe..3956e88 100644 --- a/lib/librte_eal/linuxapp/eal/eal_pci.c +++ b/lib/librte_eal/linuxapp/eal/eal_pci.c @@ -107,6 +107,11 @@ TAILQ_HEAD(uio_res_list, uio_resource); static struct uio_res_list *uio_res_list = NULL; static int pci_parse_sysfs_value(const char *filename, uint64_t *val); + +#ifdef RTE_PCI_CONFIG +static void pci_config_space_set(struct rte_pci_device *dev); +#endif + /* unbind kernel driver for this device */ static int pci_unbind_kernel_driver(struct rte_pci_device *dev) @@ -840,6 +845,13 @@ rte_eal_pci_probe_one_driver(struct rte_pci_driver *dr, struct rte_pci_device *d } if (dr->drv_flags & RTE_PCI_DRV_NEED_IGB_UIO) { +#ifdef RTE_PCI_CONFIG + /* + * Set PCIe config space for high performance. + * Return value can be ignored. + */ + pci_config_space_set(dev); +#endif /* map resources for devices that use igb_uio */ if (pci_uio_map_resource(dev) < 0) return -1; @@ -878,3 +890,92 @@ rte_eal_pci_init(void) } return 0; } + +#ifdef RTE_PCI_CONFIG +static int +pci_config_extended_tag(struct rte_pci_device *dev) +{ + struct rte_pci_addr *loc = &dev->addr; + char filename[PATH_MAX]; + char buf[BUFSIZ]; + FILE *f; + + /* not configured, let it as is */ + if (strncmp(RTE_PCI_EXTENDED_TAG, "on", 2) != 0 && + strncmp(RTE_PCI_EXTENDED_TAG, "off", 3) != 0) + return 0; + + rte_snprintf(filename, sizeof(filename), + SYSFS_PCI_DEVICES "/" PCI_PRI_FMT "/" "extended_tag", + loc->domain, loc->bus, loc->devid, loc->function); + f = fopen(filename, "rw+"); + if (!f) + return -1; + + fgets(buf, sizeof(buf), f); + if (strncmp(RTE_PCI_EXTENDED_TAG, "on", 2) == 0) { + /* enable Extended Tag*/ + if (strncmp(buf, "on", 2) != 0) { + fseek(f, 0, SEEK_SET); + fputs("on", f); + } + } else { + /* disable Extended Tag */ + if (strncmp(buf, "off", 3) != 0) { + fseek(f, 0, SEEK_SET); + fputs("off", f); + } + } + fclose(f); + + return 0; +} + +static int +pci_config_max_read_request_size(struct rte_pci_device *dev) +{ + struct rte_pci_addr *loc = &dev->addr; + char filename[PATH_MAX]; + char buf[BUFSIZ], param[BUFSIZ]; + FILE *f; + uint32_t max_size = RTE_PCI_MAX_READ_REQUEST_SIZE; + + /* not configured, let it as is */ + if (!max_size) + return 0; + + rte_snprintf(filename, sizeof(filename), + SYSFS_PCI_DEVICES "/" PCI_PRI_FMT "/" "max_read_request_size", + loc->domain, loc->bus, loc->devid, loc->function); + f = fopen(filename, "rw+"); + if (!f) + return -1; + + fgets(buf, sizeof(buf), f); + rte_snprintf(param, sizeof(param), "%d", max_size); + + /* check if the size to be set is the same as current */ + if (strcmp(buf, param) == 0) { + fclose(f); + return 0; + } + fseek(f, 0, SEEK_SET); + fputs(param, f); + fclose(f); + + return 0; +} + +static void +pci_config_space_set(struct rte_pci_device *dev) +{ + if (rte_eal_process_type() != RTE_PROC_PRIMARY) + return; + + /* configure extended tag */ + pci_config_extended_tag(dev); + + /* configure max read request size */ + pci_config_max_read_request_size(dev); +} +#endif -- 1.8.1.4