From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com (mga03.intel.com [143.182.124.21]) by dpdk.org (Postfix) with ESMTP id D5D1DB37A for ; Fri, 1 Aug 2014 09:06:57 +0200 (CEST) Received: from azsmga001.ch.intel.com ([10.2.17.19]) by azsmga101.ch.intel.com with ESMTP; 01 Aug 2014 00:09:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.01,778,1400050800"; d="scan'208";a="463889067" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by azsmga001.ch.intel.com with ESMTP; 01 Aug 2014 00:08:59 -0700 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id s7178voe014916; Fri, 1 Aug 2014 15:08:57 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id s7178ssI025056; Fri, 1 Aug 2014 15:08:56 +0800 Received: (from wujingji@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id s7178sfK025052; Fri, 1 Aug 2014 15:08:54 +0800 From: Jingjing Wu To: dev@dpdk.org Date: Fri, 1 Aug 2014 15:08:34 +0800 Message-Id: <1406876916-24869-5-git-send-email-jingjing.wu@intel.com> X-Mailer: git-send-email 1.7.0.7 In-Reply-To: <1406876916-24869-1-git-send-email-jingjing.wu@intel.com> References: <1406876916-24869-1-git-send-email-jingjing.wu@intel.com> Subject: [dpdk-dev] [PATCH 4/6] i40e: function implement in i40e for flow director filter programming X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 01 Aug 2014 07:06:59 -0000 support the API ops defined in ethdev, the behavior according to each command: RTE_CMD_FDIR_RULE_ADD: add a new FDIR filter rule. RTE_CMD_FDIR_RULE_DEL: delete a FDIR filter rule. RTE_CMD_FDIR_FLUSH : clear all FDIR filter rules. RTE_CMD_FDIR_INFO_GET: get FDIR information. Signed-off-by: jingjing.wu --- lib/librte_pmd_i40e/Makefile | 4 + lib/librte_pmd_i40e/i40e_ethdev.c | 53 +++++++++ lib/librte_pmd_i40e/i40e_ethdev.h | 10 ++ lib/librte_pmd_i40e/i40e_fdir.c | 220 ++++++++++++++++++++++++++++++++++++++ lib/librte_pmd_i40e/rte_i40e.h | 125 ++++++++++++++++++++++ 5 files changed, 412 insertions(+) create mode 100644 lib/librte_pmd_i40e/rte_i40e.h diff --git a/lib/librte_pmd_i40e/Makefile b/lib/librte_pmd_i40e/Makefile index 6537654..3da20c5 100644 --- a/lib/librte_pmd_i40e/Makefile +++ b/lib/librte_pmd_i40e/Makefile @@ -88,6 +88,10 @@ SRCS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += i40e_rxtx.c SRCS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += i40e_ethdev_vf.c SRCS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += i40e_pf.c SRCS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += i40e_fdir.c + +# install this header file +SYMLINK-$(CONFIG_RTE_LIBRTE_I40E_PMD)-include := rte_i40e.h + # this lib depends upon: DEPDIRS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += lib/librte_eal lib/librte_ether DEPDIRS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += lib/librte_mempool lib/librte_mbuf diff --git a/lib/librte_pmd_i40e/i40e_ethdev.c b/lib/librte_pmd_i40e/i40e_ethdev.c index 47125c7..c4637be 100644 --- a/lib/librte_pmd_i40e/i40e_ethdev.c +++ b/lib/librte_pmd_i40e/i40e_ethdev.c @@ -48,6 +48,7 @@ #include #include #include +#include #include "i40e_logs.h" #include "i40e/i40e_register_x710_int.h" @@ -203,6 +204,9 @@ static int i40e_dev_rss_hash_update(struct rte_eth_dev *dev, struct rte_eth_rss_conf *rss_conf); static int i40e_dev_rss_hash_conf_get(struct rte_eth_dev *dev, struct rte_eth_rss_conf *rss_conf); +static int i40e_rx_classification_filter_ctl(struct rte_eth_dev *dev, + enum rte_eth_command cmd, + void *args); /* Default hash key buffer for RSS */ static uint32_t rss_key_default[I40E_PFQF_HKEY_MAX_INDEX + 1]; @@ -248,6 +252,7 @@ static struct eth_dev_ops i40e_eth_dev_ops = { .reta_query = i40e_dev_rss_reta_query, .rss_hash_update = i40e_dev_rss_hash_update, .rss_hash_conf_get = i40e_dev_rss_hash_conf_get, + .rx_classification_filter_ctl = i40e_rx_classification_filter_ctl, }; static struct eth_driver rte_i40e_pmd = { @@ -3984,3 +3989,51 @@ i40e_pf_config_mq_rx(struct i40e_pf *pf) return 0; } + +static int +i40e_rx_classification_filter_ctl(struct rte_eth_dev *dev, + enum rte_eth_command cmd, + void *args) +{ + struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); + struct rte_i40e_fdir_entry *fdir_entry; + struct rte_i40e_fdir_info *fdir_info; + int ret = I40E_SUCCESS; + + switch (cmd) { + case RTE_CMD_FDIR_RULE_ADD: + if (args == NULL) + return I40E_ERR_PARAM; + fdir_entry = (struct rte_i40e_fdir_entry *)args; + ret = i40e_fdir_filter_programming(pf, + fdir_entry->soft_id, + &fdir_entry->input, + &fdir_entry->action, + TRUE); + break; + case RTE_CMD_FDIR_RULE_DEL: + if (args == NULL) + return I40E_ERR_PARAM; + fdir_entry = (struct rte_i40e_fdir_entry *)args; + ret = i40e_fdir_filter_programming(pf, + fdir_entry->soft_id, + &fdir_entry->input, + &fdir_entry->action, + FALSE); + break; + case RTE_CMD_FDIR_INFO_GET: + if (args == NULL) + return I40E_ERR_PARAM; + fdir_info = (struct rte_i40e_fdir_info *)args; + i40e_fdir_info_get(dev, fdir_info); + break; + case RTE_CMD_FDIR_FLUSH: + ret = i40e_fdir_flush(pf); + break; + default: + PMD_DRV_LOG(ERR, "unknown command type %u\n", cmd); + ret = I40E_ERR_PARAM; + break; + } + return ret; +} diff --git a/lib/librte_pmd_i40e/i40e_ethdev.h b/lib/librte_pmd_i40e/i40e_ethdev.h index c2c7fa9..7755f5a 100644 --- a/lib/librte_pmd_i40e/i40e_ethdev.h +++ b/lib/librte_pmd_i40e/i40e_ethdev.h @@ -34,6 +34,8 @@ #ifndef _I40E_ETHDEV_H_ #define _I40E_ETHDEV_H_ +#include "rte_i40e.h" + #define I40E_AQ_LEN 32 #define I40E_AQ_BUF_SZ 4096 /* Number of queues per TC should be one of 1, 2, 4, 8, 16, 32, 64 */ @@ -332,6 +334,14 @@ i40e_fdir_setup_rx_resources(struct i40e_pf *pf, unsigned int socket_id); int i40e_fdir_setup(struct i40e_pf *pf); void i40e_fdir_teardown(struct i40e_pf *pf); +int i40e_fdir_flush(struct i40e_pf *pf); +int i40e_fdir_filter_programming(struct i40e_pf *pf, + uint16_t soft_id, + struct rte_i40e_fdir_input *fdir_filter, + struct rte_i40e_fdir_action *fdir_action, + bool add); +void i40e_fdir_info_get(struct rte_eth_dev *dev, + struct rte_i40e_fdir_info *fdir); /* I40E_DEV_PRIVATE_TO */ #define I40E_DEV_PRIVATE_TO_PF(adapter) \ diff --git a/lib/librte_pmd_i40e/i40e_fdir.c b/lib/librte_pmd_i40e/i40e_fdir.c index ecb4a95..373a366 100644 --- a/lib/librte_pmd_i40e/i40e_fdir.c +++ b/lib/librte_pmd_i40e/i40e_fdir.c @@ -48,10 +48,23 @@ #include "i40e/i40e_type.h" #include "i40e_ethdev.h" #include "i40e_rxtx.h" +/* Wait count and inteval for fdir filter programming */ +#define I40E_FDIR_WAIT_COUNT 10 +#define I40E_FDIR_WAIT_INTERVAL_US 1000 +/* Wait count and inteval for fdir filter flush */ +#define I40E_FDIR_FLUSH_RETRY 5 +#define I40E_FDIR_FLUSH_INTERVAL_MS 5000 #define I40E_COUNTER_PF 2 #define I40E_COUNTER_INDEX_FDIR(pf_id) (0 + (pf_id) * I40E_COUNTER_PF) +#ifndef RTE_MBUF_DATA_DMA_ADDR +#define RTE_MBUF_DATA_DMA_ADDR(mb) \ + ((uint64_t)((mb)->buf_physaddr + \ + (uint64_t)((char *)((mb)->pkt.data) - \ + (char *)(mb)->buf_addr))) +#endif + /* * i40e_fdir_setup - reserve and initialize the Flow Director resources * @pf: board private structure @@ -133,3 +146,210 @@ i40e_fdir_teardown(struct i40e_pf *pf) pf->fdir.fdir_vsi = NULL; return; } + +/* + * i40e_fdir_flush - clear all filters of Flow Director + * @pf: board private structure + */ +int +i40e_fdir_flush(struct i40e_pf *pf) +{ + struct i40e_hw *hw = I40E_PF_TO_HW(pf); + uint32_t reg; + uint16_t guarant_cnt, best_cnt; + int i; + + I40E_WRITE_REG(hw, I40E_PFQF_CTL_1, I40E_PFQF_CTL_1_CLEARFDTABLE_MASK); + I40E_WRITE_FLUSH(hw); + + for (i = 0; i < I40E_FDIR_FLUSH_RETRY; i++) { + rte_delay_ms(I40E_FDIR_FLUSH_INTERVAL_MS); + reg = I40E_READ_REG(hw, I40E_PFQF_CTL_1); + if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK)) + break; + } + if (i >= I40E_FDIR_FLUSH_RETRY) { + PMD_DRV_LOG(ERR, "FD table did not flush, may need more time\n"); + return I40E_ERR_TIMEOUT; + } + guarant_cnt = (uint16_t)((I40E_READ_REG(hw, I40E_PFQF_FDSTAT) & + I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) >> + I40E_PFQF_FDSTAT_GUARANT_CNT_SHIFT); + best_cnt = (uint16_t)((I40E_READ_REG(hw, I40E_PFQF_FDSTAT) & + I40E_PFQF_FDSTAT_BEST_CNT_MASK) >> + I40E_PFQF_FDSTAT_BEST_CNT_SHIFT); + if (guarant_cnt != 0 || best_cnt != 0) { + PMD_DRV_LOG(ERR, "Failed to flush FD table\n"); + return I40E_ERR_CONFIG; + } else + PMD_DRV_LOG(INFO, "FD table Flush success\n"); + return I40E_SUCCESS; +} + +/* Construct the tx flags */ +static inline uint64_t +i40e_build_ctob(uint32_t td_cmd, + uint32_t td_offset, + unsigned int size, + uint32_t td_tag) +{ + return rte_cpu_to_le_64(I40E_TX_DESC_DTYPE_DATA | + ((uint64_t)td_cmd << I40E_TXD_QW1_CMD_SHIFT) | + ((uint64_t)td_offset << I40E_TXD_QW1_OFFSET_SHIFT) | + ((uint64_t)size << I40E_TXD_QW1_TX_BUF_SZ_SHIFT) | + ((uint64_t)td_tag << I40E_TXD_QW1_L2TAG1_SHIFT)); +} + +/* + * Program A flow diretor filter rule. + * Is done by Flow Director Programming + * Descriptor followed by packet structure that contains the filter fields + * need to match. + */ +int +i40e_fdir_filter_programming(struct i40e_pf *pf, + uint16_t soft_id, + struct rte_i40e_fdir_input *fdir_input, + struct rte_i40e_fdir_action *fdir_action, + bool add) +{ + struct i40e_tx_queue *txq = pf->fdir.txq; + volatile struct i40e_tx_desc *txdp; + struct rte_mbuf *mbuf = fdir_input->data; + volatile struct i40e_filter_program_desc *fdirdp; + uint64_t dma_addr; + uint32_t td_cmd; + uint16_t i; + uint8_t dest; + + PMD_DRV_LOG(INFO, "filling filter prgramming descriptor\n"); + fdirdp = (volatile struct i40e_filter_program_desc *) + (&(txq->tx_ring[txq->tx_tail])); + + fdirdp->qindex_flex_ptype_vsi = + rte_cpu_to_le_32((fdir_action->rx_queue << + I40E_TXD_FLTR_QW0_QINDEX_SHIFT) & + I40E_TXD_FLTR_QW0_QINDEX_MASK); + + fdirdp->qindex_flex_ptype_vsi |= + rte_cpu_to_le_32((fdir_input->flex_off << + I40E_TXD_FLTR_QW0_FLEXOFF_SHIFT) & + I40E_TXD_FLTR_QW0_FLEXOFF_MASK); + + fdirdp->qindex_flex_ptype_vsi |= + rte_cpu_to_le_32((fdir_input->pctype << + I40E_TXD_FLTR_QW0_PCTYPE_SHIFT) & + I40E_TXD_FLTR_QW0_PCTYPE_MASK); + + /* Use LAN VSI Id if not programmed by user */ + if (fdir_input->dest_vsi == 0) + fdirdp->qindex_flex_ptype_vsi |= + rte_cpu_to_le_32((pf->main_vsi->vsi_id << + I40E_TXD_FLTR_QW0_DEST_VSI_SHIFT) & + I40E_TXD_FLTR_QW0_DEST_VSI_MASK); + else + fdirdp->qindex_flex_ptype_vsi |= + rte_cpu_to_le_32((fdir_input->dest_vsi << + I40E_TXD_FLTR_QW0_DEST_VSI_SHIFT) & + I40E_TXD_FLTR_QW0_DEST_VSI_MASK); + + fdirdp->dtype_cmd_cntindex = + rte_cpu_to_le_32(I40E_TX_DESC_DTYPE_FILTER_PROG); + + if (add) + fdirdp->dtype_cmd_cntindex |= rte_cpu_to_le_32( + I40E_FILTER_PROGRAM_DESC_PCMD_ADD_UPDATE << + I40E_TXD_FLTR_QW1_PCMD_SHIFT); + else + fdirdp->dtype_cmd_cntindex |= rte_cpu_to_le_32( + I40E_FILTER_PROGRAM_DESC_PCMD_REMOVE << + I40E_TXD_FLTR_QW1_PCMD_SHIFT); + + if (fdir_action->drop == RTE_I40E_DEST_DROP_PACKET) + dest = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; + else + dest = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX; + fdirdp->dtype_cmd_cntindex |= rte_cpu_to_le_32((dest << + I40E_TXD_FLTR_QW1_DEST_SHIFT) & + I40E_TXD_FLTR_QW1_DEST_MASK); + + fdirdp->dtype_cmd_cntindex |= + rte_cpu_to_le_32((fdir_action->report_status<< + I40E_TXD_FLTR_QW1_FD_STATUS_SHIFT) & + I40E_TXD_FLTR_QW1_FD_STATUS_MASK); + + fdirdp->dtype_cmd_cntindex |= + rte_cpu_to_le_32(I40E_TXD_FLTR_QW1_CNT_ENA_MASK); + if (fdir_action->cnt_index != 0) + fdirdp->dtype_cmd_cntindex |= + rte_cpu_to_le_32((fdir_action->cnt_index << + I40E_TXD_FLTR_QW1_CNTINDEX_SHIFT) & + I40E_TXD_FLTR_QW1_CNTINDEX_MASK); + else + fdirdp->dtype_cmd_cntindex |= + rte_cpu_to_le_32((pf->fdir.match_counter_index << + I40E_TXD_FLTR_QW1_CNTINDEX_SHIFT) & + I40E_TXD_FLTR_QW1_CNTINDEX_MASK); + + fdirdp->fd_id = rte_cpu_to_le_32(soft_id); + txq->tx_tail++; + if (txq->tx_tail >= txq->nb_tx_desc) + txq->tx_tail = 0; + + PMD_DRV_LOG(INFO, "filling transmit descriptor\n"); + txdp = &(txq->tx_ring[txq->tx_tail]); + dma_addr = RTE_MBUF_DATA_DMA_ADDR(mbuf); + txdp->buffer_addr = rte_cpu_to_le_64(dma_addr); + td_cmd = I40E_TX_DESC_CMD_EOP | + I40E_TX_DESC_CMD_RS | + I40E_TX_DESC_CMD_DUMMY; + + txdp->cmd_type_offset_bsz = + i40e_build_ctob(td_cmd, 0, + mbuf->pkt.data_len, 0); + + txq->tx_tail++; + if (txq->tx_tail >= txq->nb_tx_desc) + txq->tx_tail = 0; + /* Update the tx tail register */ + rte_wmb(); + I40E_PCI_REG_WRITE(txq->qtx_tail, txq->tx_tail); + + for (i = 0; i < I40E_FDIR_WAIT_COUNT; i++) { + rte_delay_us(I40E_FDIR_WAIT_INTERVAL_US); + if (txdp->cmd_type_offset_bsz & + rte_cpu_to_le_64(I40E_TX_DESC_DTYPE_DESC_DONE)) + break; + } + if (i >= I40E_FDIR_WAIT_COUNT) { + PMD_DRV_LOG(ERR, "Failed to program FDIR filter\n"); + return I40E_ERR_TIMEOUT; + } + + return I40E_SUCCESS; +} + +/* + * i40e_fdir_info_get - get information of Flow Director + * @dev: ethernet device to add filter to + * @fdir: a pointer to a structure of type *rte_eth_dev_fdir* to be filled with + * the flow director information. + **/ +void +i40e_fdir_info_get(struct rte_eth_dev *dev, struct rte_i40e_fdir_info *fdir) +{ + struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); + uint32_t pfqf_ctl; + + pfqf_ctl = I40E_READ_REG(hw, I40E_PFQF_CTL_0); + fdir->mode = pfqf_ctl & I40E_PFQF_CTL_0_FD_ENA_MASK ? 1 : 0; + fdir->guarant_spc = (uint16_t)hw->func_caps.fd_filters_guaranteed; + fdir->guarant_cnt = (uint16_t)((I40E_READ_REG(hw, I40E_PFQF_FDSTAT) & + I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) >> + I40E_PFQF_FDSTAT_GUARANT_CNT_SHIFT); + fdir->best_spc = (uint16_t)hw->func_caps.fd_filters_best_effort; + fdir->best_cnt = (uint16_t)((I40E_READ_REG(hw, I40E_PFQF_FDSTAT) & + I40E_PFQF_FDSTAT_BEST_CNT_MASK) >> + I40E_PFQF_FDSTAT_BEST_CNT_SHIFT); + return; +} diff --git a/lib/librte_pmd_i40e/rte_i40e.h b/lib/librte_pmd_i40e/rte_i40e.h new file mode 100644 index 0000000..699ea53 --- /dev/null +++ b/lib/librte_pmd_i40e/rte_i40e.h @@ -0,0 +1,125 @@ +/*- + * BSD LICENSE + * + * Copyright(c) 2010-2014 Intel Corporation. All rights reserved. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RTE_I40E_H_ +#define _RTE_I40E_H_ + +/** + * @file + * + * RTE I40E + * + * The I40E defines the commands and structures specifically for i40e hardware + * features. As different types of NIC hardware may have different features, + * they might not be common for all types of NIC hardwares. The commands and + * structures can be used in applications directly together with generalized + * APIs declared in rte_ethdev.h. The commands couldn't be supported by + * non-i40e PMD. + */ + +#ifdef __cplusplus +extern "C" { +#endif + +#define I40E_FDIR_PKT_LEN 512 +#define I40E_FDIR_IP_DEFAULT_LEN 0x003C +#define I40E_FDIR_IP_DEFAULT_TTL 0x40 +#define I40E_FDIR_IP_DEFAULT_VERSION_IHL 0x45 +#define I40E_FDIR_TCP_DEFAULT_DATAOFF 0x50 +#define I40E_FDIR_IPv6_DEFAULT_VTC_FLOW 0x60300000 +#define I40E_FDIR_IPv6_DEFAULT_PAYLOAD_LEN 0x0014 +#define I40E_FDIR_IPv6_DEFAULT_HOP_LIMITS 0xFF +#define I40E_FDIR_UDP_DEFAULT_LEN 0x0028 + +enum rte_i40e_fdir_status { + RTE_I40E_FDIR_NO_REPORT_STATUS = 0, /**< no report FDIR. */ + RTE_I40E_FDIR_REPORT_FD_ID, /**< only report FD ID. */ + RTE_I40E_FDIR_REPORT_FD_ID_FLEX_4, /**< report FD ID and 4 flex bytes. */ + RTE_I40E_FDIR_REPORT_FLEX_8, /**< report 8 flex bytes. */ +}; + +#define RTE_I40E_DEST_DROP_PACKET 0x01 +#define RTE_I40E_DEST_DIRECT_PACKET_QINDEX 0x02 + +/** + * A structure used to define the input for an flow director filter entry + */ +struct rte_i40e_fdir_input { + uint8_t pctype; + uint8_t flex_off; + uint16_t dest_vsi; /**< destination VSI*/ + struct rte_mbuf *data; /**< mbuf store raw packet used to program */ +}; + +/** + * A structure used to define an action when match FDIR packet filter. + */ +struct rte_i40e_fdir_action { + uint16_t rx_queue; /**< queue assigned to if fdir match. */ + uint16_t cnt_index; /**< statistic count index */ + uint8_t drop; /**< accept or reject */ + enum rte_i40e_fdir_status report_status; /**< status report. */ +}; + +/** + * For commands: + * 'RTE_CMD_FDIR_RULE_ADD' + * 'RTE_CMD_FDIR_RULE_DEL' + * + * A structure used to define the flow director filter entry + */ +struct rte_i40e_fdir_entry { + uint16_t soft_id; /**< id */ + struct rte_i40e_fdir_input input; /**< input set */ + struct rte_i40e_fdir_action action; /**< action taken when match */ +}; + +/** + * For commands: + * 'RTE_CMD_FDIR_INFO_GET' + * + * A structure used for user to get the information of fdir feature. + */ +struct rte_i40e_fdir_info { + uint8_t mode; /**< 0 is disable, 1 is enable. */ + uint16_t guarant_spc; /**< guaranteed spaces.*/ + uint16_t guarant_cnt; /**< Number of filters in guaranteed spaces. */ + uint16_t best_spc; /**< best effort spaces.*/ + uint16_t best_cnt; /**< Number of filters in best effort spaces. */ +}; + +#ifdef __cplusplus +} +#endif + +#endif /* _RTE_I40E_H_ */ -- 1.8.1.4