From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id 684B3B36D for ; Tue, 26 Aug 2014 09:27:54 +0200 (CEST) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga103.fm.intel.com with ESMTP; 26 Aug 2014 00:23:54 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.97,862,1389772800"; d="scan'208";a="377011281" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by FMSMGA003.fm.intel.com with ESMTP; 26 Aug 2014 00:27:43 -0700 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id s7Q7VmYB027267; Tue, 26 Aug 2014 15:31:48 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id s7Q7VjEV021834; Tue, 26 Aug 2014 15:31:47 +0800 Received: (from jijiangl@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id s7Q7VjM4021830; Tue, 26 Aug 2014 15:31:45 +0800 From: Jijiang Liu To: dev@dpdk.org Date: Tue, 26 Aug 2014 15:31:31 +0800 Message-Id: <1409038294-21693-5-git-send-email-jijiang.liu@intel.com> X-Mailer: git-send-email 1.7.0.7 In-Reply-To: <1409038294-21693-1-git-send-email-jijiang.liu@intel.com> References: <1409038294-21693-1-git-send-email-jijiang.liu@intel.com> Subject: [dpdk-dev] [PATCH v2 4/7]i40e:implement API of VxLAN packet filter in librte_pmd_i40e X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 26 Aug 2014 07:27:55 -0000 The implementation of VxLAN packet filter in librte_pmd_i40e. Signed-off-by: jijiangl Acked-by: Helin Zhang Acked-by: Jingjing Wu Acked-by: Jing Chen --- lib/librte_pmd_i40e/i40e_ethdev.c | 112 +++++++++++++++++++++++++++++++++++++ 1 files changed, 112 insertions(+), 0 deletions(-) diff --git a/lib/librte_pmd_i40e/i40e_ethdev.c b/lib/librte_pmd_i40e/i40e_ethdev.c index 3bc5379..5217d39 100644 --- a/lib/librte_pmd_i40e/i40e_ethdev.c +++ b/lib/librte_pmd_i40e/i40e_ethdev.c @@ -211,6 +211,9 @@ static int i40e_dev_udp_tunnel_add(struct rte_eth_dev *dev, static int i40e_dev_udp_tunnel_del(struct rte_eth_dev *dev, struct rte_eth_udp_tunnel *udp_tunnel, uint8_t count); +static int i40e_dev_tunnel_filter_set(struct rte_eth_dev *dev, + struct rte_eth_tunnel_filter_conf *tunnel_filter, + uint8_t filter_count, uint8_t add); static int i40e_pf_config_vxlan(struct i40e_pf *pf); /* Default hash key buffer for RSS */ @@ -265,6 +268,7 @@ static struct eth_dev_ops i40e_eth_dev_ops = { .rss_hash_conf_get = i40e_dev_rss_hash_conf_get, .udp_tunnel_add = i40e_dev_udp_tunnel_add, .udp_tunnel_del = i40e_dev_udp_tunnel_del, + .tunnel_filter_set = i40e_dev_tunnel_filter_set, }; static struct eth_driver rte_i40e_pmd = { @@ -4120,6 +4124,114 @@ i40e_dev_rss_hash_conf_get(struct rte_eth_dev *dev, } static int +i40e_dev_get_filter_type(enum rte_tunnel_filter_type filter_type, uint16_t *flag) +{ + switch (filter_type) { + case RTE_TUNNEL_FILTER_IMAC_IVLAN: + *flag = I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN; + break; + case RTE_TUNNEL_FILTER_IMAC_IVLAN_TENID: + *flag = I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN_TEN_ID; + break; + case RTE_TUNNEL_FILTER_IMAC_TENID: + *flag = I40E_AQC_ADD_CLOUD_FILTER_IMAC_TEN_ID; + break; + case RTE_TUNNEL_FILTER_OMAC_TENID_IMAC: + *flag = I40E_AQC_ADD_CLOUD_FILTER_OMAC_TEN_ID_IMAC; + break; + case RTE_TUNNEL_FILTER_IMAC: + *flag = I40E_AQC_ADD_CLOUD_FILTER_IMAC; + break; + default: + PMD_DRV_LOG(ERR, "invalid tunnel filter type\n"); + return -EINVAL; + } + + return 0; +} + +static int +i40e_dev_tunnel_filter_set(struct rte_eth_dev *dev, + struct rte_eth_tunnel_filter_conf *tunnel_filter, + uint8_t filter_count, uint8_t add) +{ + uint16_t ip_type; + uint8_t i, tun_type = 0; + enum i40e_status_code ret; + int val; + struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); + struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); + struct i40e_vsi *vsi = pf->main_vsi; + struct i40e_aqc_add_remove_cloud_filters_element_data *cld_filter; + struct i40e_aqc_add_remove_cloud_filters_element_data *pfilter; + + cld_filter = rte_zmalloc("tunnel_filter", filter_count * + sizeof(struct i40e_aqc_add_remove_cloud_filters_element_data), + 0); + + if (NULL == cld_filter) { + PMD_DRV_LOG(ERR, "Failed to alloc memory.\n"); + return -EINVAL; + } + pfilter = cld_filter; + + for (i = 0; i < filter_count; i++, tunnel_filter++, pfilter++) { + + (void)rte_memcpy(&pfilter->outer_mac, tunnel_filter->outer_mac, + sizeof(struct ether_addr)); + (void)rte_memcpy(&pfilter->inner_mac, tunnel_filter->inner_mac, + sizeof(struct ether_addr)); + + pfilter->inner_vlan = tunnel_filter->inner_vlan; + if (tunnel_filter->ip_type == RTE_TUNNEL_IPTYPE_IPV4) { + ip_type = I40E_AQC_ADD_CLOUD_FLAGS_IPV4; + (void)rte_memcpy(&pfilter->ipaddr.v4.data, + &tunnel_filter->ip_addr, + sizeof(pfilter->ipaddr.v4.data)); + } else { + ip_type = I40E_AQC_ADD_CLOUD_FLAGS_IPV6; + (void)rte_memcpy(&pfilter->ipaddr.v6.data, + &tunnel_filter->ip_addr, + sizeof(pfilter->ipaddr.v6.data)); + } + + /* check tunnel type */ + switch (tunnel_filter->tunnel_type) { + case RTE_TUNNEL_TYPE_VXLAN: + tun_type = I40E_AQC_ADD_CLOUD_TNL_TYPE_XVLAN; + break; + default: + /* Other tunnel types is not supported. */ + PMD_DRV_LOG(ERR, "tunnel type is not supported.\n"); + rte_free(cld_filter); + return -EINVAL; + } + + val = i40e_dev_get_filter_type(tunnel_filter->filter_type, + &pfilter->flags); + if (val < 0) { + rte_free(cld_filter); + return -EINVAL; + } + + pfilter->flags |= I40E_AQC_ADD_CLOUD_FLAGS_TO_QUEUE | ip_type | + (tun_type << I40E_AQC_ADD_CLOUD_TNL_TYPE_SHIFT); + pfilter->tenant_id = tunnel_filter->tenant_id; + pfilter->queue_number = tunnel_filter->queue_id; + } + + if (add) + ret = i40e_aq_add_cloud_filters(hw, vsi->seid, cld_filter, + filter_count); + else + ret = i40e_aq_remove_cloud_filters(hw, vsi->seid, cld_filter, + filter_count); + rte_free(cld_filter); + + return ret; +} + +static int i40e_get_vxlan_port_idx(struct i40e_pf *pf, uint16_t port) { uint8_t i; -- 1.7.7.6