From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 8B8AAB3C4 for ; Tue, 9 Sep 2014 09:17:24 +0200 (CEST) Received: from azsmga001.ch.intel.com ([10.2.17.19]) by orsmga101.jf.intel.com with ESMTP; 09 Sep 2014 00:22:20 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.04,491,1406617200"; d="scan'208";a="476258569" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by azsmga001.ch.intel.com with ESMTP; 09 Sep 2014 00:22:19 -0700 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id s897MI0r008892; Tue, 9 Sep 2014 15:22:18 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id s897MFHR004518; Tue, 9 Sep 2014 15:22:18 +0800 Received: (from hzhan75@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id s897MFKU004513; Tue, 9 Sep 2014 15:22:15 +0800 From: Helin Zhang To: dev@dpdk.org Date: Tue, 9 Sep 2014 15:21:37 +0800 Message-Id: <1410247299-4365-14-git-send-email-helin.zhang@intel.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1410247299-4365-1-git-send-email-helin.zhang@intel.com> References: <1410247299-4365-1-git-send-email-helin.zhang@intel.com> Subject: [dpdk-dev] [PATCH 13/15] i40e: Use get_link_status to report FC settings X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 09 Sep 2014 07:17:25 -0000 The fix is to use get_link_status but not get_phy_capabilities for reporting FC settings. Signed-off-by: Helin Zhang Reviewed-by: Chen Jing --- lib/librte_pmd_i40e/i40e/i40e_common.c | 38 ++++++++++++---------------------- lib/librte_pmd_i40e/i40e/i40e_type.h | 8 ++++--- 2 files changed, 18 insertions(+), 28 deletions(-) diff --git a/lib/librte_pmd_i40e/i40e/i40e_common.c b/lib/librte_pmd_i40e/i40e/i40e_common.c index 60ca943..ffd68a5 100644 --- a/lib/librte_pmd_i40e/i40e/i40e_common.c +++ b/lib/librte_pmd_i40e/i40e/i40e_common.c @@ -1203,7 +1203,7 @@ enum i40e_status_code i40e_set_fc(struct i40e_hw *hw, u8 *aq_failures, status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL); if (status) { - *aq_failures |= I40E_SET_FC_AQ_FAIL_GET1; + *aq_failures |= I40E_SET_FC_AQ_FAIL_GET; return status; } @@ -1228,31 +1228,19 @@ enum i40e_status_code i40e_set_fc(struct i40e_hw *hw, u8 *aq_failures, if (status) *aq_failures |= I40E_SET_FC_AQ_FAIL_SET; - - /* Get the abilities to set hw->fc.current_mode correctly */ - status = i40e_aq_get_phy_capabilities(hw, false, false, - &abilities, NULL); - if (status) { - /* Wait a little bit and try once more */ - i40e_msec_delay(1000); - status = i40e_aq_get_phy_capabilities(hw, false, false, - &abilities, NULL); - } - if (status) { - *aq_failures |= I40E_SET_FC_AQ_FAIL_GET2; - return status; - } } - /* Copy the what was returned from get capabilities into fc */ - if ((abilities.abilities & I40E_AQ_PHY_FLAG_PAUSE_TX) && - (abilities.abilities & I40E_AQ_PHY_FLAG_PAUSE_RX)) - hw->fc.current_mode = I40E_FC_FULL; - else if (abilities.abilities & I40E_AQ_PHY_FLAG_PAUSE_TX) - hw->fc.current_mode = I40E_FC_TX_PAUSE; - else if (abilities.abilities & I40E_AQ_PHY_FLAG_PAUSE_RX) - hw->fc.current_mode = I40E_FC_RX_PAUSE; - else - hw->fc.current_mode = I40E_FC_NONE; + /* Update the link info */ + status = i40e_update_link_info(hw, true); + if (status) { + /* Wait a little bit (on 40G cards it sometimes takes a really + * long time for link to come back from the atomic reset) + * and try once more + */ + i40e_msec_delay(1000); + status = i40e_update_link_info(hw, true); + } + if (status) + *aq_failures |= I40E_SET_FC_AQ_FAIL_UPDATE; return status; } diff --git a/lib/librte_pmd_i40e/i40e/i40e_type.h b/lib/librte_pmd_i40e/i40e/i40e_type.h index 737a4c1..bb87640 100644 --- a/lib/librte_pmd_i40e/i40e/i40e_type.h +++ b/lib/librte_pmd_i40e/i40e/i40e_type.h @@ -68,8 +68,10 @@ POSSIBILITY OF SUCH DAMAGE. (d) == I40E_DEV_ID_QSFP_B || \ (d) == I40E_DEV_ID_QSFP_C) +#ifndef I40E_MASK /* I40E_MASK is a macro used on 32 bit registers */ #define I40E_MASK(mask, shift) (mask << shift) +#endif #define I40E_MAX_PF 16 #define I40E_MAX_PF_VSI 64 @@ -216,10 +218,10 @@ enum i40e_fc_mode { enum i40e_set_fc_aq_failures { I40E_SET_FC_AQ_FAIL_NONE = 0, - I40E_SET_FC_AQ_FAIL_GET1 = 1, + I40E_SET_FC_AQ_FAIL_GET = 1, I40E_SET_FC_AQ_FAIL_SET = 2, - I40E_SET_FC_AQ_FAIL_GET2 = 4, - I40E_SET_FC_AQ_FAIL_SET_GET = 6 + I40E_SET_FC_AQ_FAIL_UPDATE = 4, + I40E_SET_FC_AQ_FAIL_SET_UPDATE = 6 }; enum i40e_vsi_type { -- 1.8.1.4