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From: Chao Zhu <bjzhuc@cn.ibm.com>
To: dev@dpdk.org
Subject: [dpdk-dev] [PATCH 03/12] Add byte order operations for IBM Power architecture
Date: Fri, 26 Sep 2014 05:36:17 -0400	[thread overview]
Message-ID: <1411724186-8036-4-git-send-email-bjzhuc@cn.ibm.com> (raw)
In-Reply-To: <1411724186-8036-1-git-send-email-bjzhuc@cn.ibm.com>

The byte order operations implemented with assembly code in DPDK only
support x86. This patch add architecture specific atomic operations for
IBM Power architecture. Since IBM Power architecture is big endian while
x86 is little endian, this patch also add endian specific functions to
support Power architecture.

Signed-off-by: Chao Zhu <bjzhuc@cn.ibm.com>
---
 config/defconfig_ppc_64-native-linuxapp-gcc        |    1 +
 .../include/powerpc/arch/rte_byteorder_arch.h      |   79 ++++++++++++++++++++
 lib/librte_eal/common/include/rte_byteorder.h      |   66 ++++++++++++++++
 3 files changed, 146 insertions(+), 0 deletions(-)
 create mode 100644 lib/librte_eal/common/include/powerpc/arch/rte_byteorder_arch.h

diff --git a/config/defconfig_ppc_64-native-linuxapp-gcc b/config/defconfig_ppc_64-native-linuxapp-gcc
index 7d18455..cc11cfc 100644
--- a/config/defconfig_ppc_64-native-linuxapp-gcc
+++ b/config/defconfig_ppc_64-native-linuxapp-gcc
@@ -34,6 +34,7 @@ CONFIG_RTE_MACHINE="powerpc"
 
 CONFIG_RTE_ARCH="powerpc"
 CONFIG_RTE_ARCH_PPC_64=y
+CONFIG_RTE_ARCH_BIG_ENDIAN=y
 
 CONFIG_RTE_TOOLCHAIN="gcc"
 CONFIG_RTE_TOOLCHAIN_GCC=y
diff --git a/lib/librte_eal/common/include/powerpc/arch/rte_byteorder_arch.h b/lib/librte_eal/common/include/powerpc/arch/rte_byteorder_arch.h
new file mode 100644
index 0000000..ec4d32e
--- /dev/null
+++ b/lib/librte_eal/common/include/powerpc/arch/rte_byteorder_arch.h
@@ -0,0 +1,79 @@
+/*
+ *   BSD LICENSE
+ *
+ *   Copyright (C) IBM Corporation 2014.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of IBM Corporation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/* Inspired from FreeBSD src/sys/powerpc/include/endian.h
+ * Copyright (c) 1987, 1991, 1993
+ * The Regents of the University of California.  All rights reserved.
+*/
+
+#ifndef _RTE_BYTEORDER_ARCH_H_
+#define _RTE_BYTEORDER_ARCH_H_
+
+#include <stdint.h>
+
+/*
+ * An architecture-optimized byte swap for a 16-bit value.
+ *
+ * Do not use this function directly. The preferred function is rte_bswap16().
+ */
+static inline uint16_t rte_arch_bswap16(uint16_t _x)
+{
+	return ((_x >> 8) | ((_x << 8) & 0xff00));
+}
+
+/*
+ * An architecture-optimized byte swap for a 32-bit value.
+ *
+ * Do not use this function directly. The preferred function is rte_bswap32().
+ */
+static inline uint32_t rte_arch_bswap32(uint32_t _x)
+{
+	return ((_x >> 24) | ((_x >> 8) & 0xff00) | ((_x << 8) & 0xff0000) |
+		((_x << 24) & 0xff000000));
+}
+
+/*
+ * An architecture-optimized byte swap for a 64-bit value.
+ *
+  * Do not use this function directly. The preferred function is rte_bswap64().
+ */
+/* 64-bit mode */
+static inline uint64_t rte_arch_bswap64(uint64_t _x)
+{
+	return ((_x >> 56) | ((_x >> 40) & 0xff00) | ((_x >> 24) & 0xff0000) |
+		((_x >> 8) & 0xff000000) | ((_x << 8) & (0xffULL << 32)) |
+		((_x << 24) & (0xffULL << 40)) |
+		((_x << 40) & (0xffULL << 48)) | ((_x << 56)));
+}
+
+#endif /* _RTE_BYTEORDER_ARCH_H_ */
+
diff --git a/lib/librte_eal/common/include/rte_byteorder.h b/lib/librte_eal/common/include/rte_byteorder.h
index 98e3764..e8366ea 100644
--- a/lib/librte_eal/common/include/rte_byteorder.h
+++ b/lib/librte_eal/common/include/rte_byteorder.h
@@ -146,6 +146,7 @@ rte_constant_bswap64(uint64_t x)
 
 #endif
 
+#ifndef RTE_ARCH_BIG_ENDIAN
 /**
  * Convert a 16-bit value from CPU order to little endian.
  */
@@ -209,6 +210,71 @@ rte_constant_bswap64(uint64_t x)
  */
 #define rte_be_to_cpu_64(x) rte_bswap64(x)
 
+#else
+/**
+ * Convert a 16-bit value from CPU order to little endian.
+ */
+#define rte_cpu_to_le_16(x) rte_bswap16(x)
+
+/**
+ * Convert a 32-bit value from CPU order to little endian.
+ */
+#define rte_cpu_to_le_32(x) rte_bswap32(x)
+
+/**
+ * Convert a 64-bit value from CPU order to little endian.
+ */
+#define rte_cpu_to_le_64(x) rte_bswap64(x)
+
+
+/**
+ * Convert a 16-bit value from CPU order to big endian.
+ */
+#define rte_cpu_to_be_16(x) (x)
+
+/**
+ * Convert a 32-bit value from CPU order to big endian.
+ */
+#define rte_cpu_to_be_32(x) (x)
+
+/**
+ * Convert a 64-bit value from CPU order to big endian.
+ */
+#define rte_cpu_to_be_64(x) (x)
+
+
+/**
+ * Convert a 16-bit value from little endian to CPU order.
+ */
+#define rte_le_to_cpu_16(x) rte_bswap16(x)
+
+/**
+ * Convert a 32-bit value from little endian to CPU order.
+ */
+#define rte_le_to_cpu_32(x) rte_bswap32(x)
+
+/**
+ * Convert a 64-bit value from little endian to CPU order.
+ */
+#define rte_le_to_cpu_64(x) rte_bswap64(x)
+
+
+/**
+ * Convert a 16-bit value from big endian to CPU order.
+ */
+#define rte_be_to_cpu_16(x) (x)
+
+/**
+ * Convert a 32-bit value from big endian to CPU order.
+ */
+#define rte_be_to_cpu_32(x) (x)
+
+/**
+ * Convert a 64-bit value from big endian to CPU order.
+ */
+#define rte_be_to_cpu_64(x) (x)
+#endif
+
 #ifdef __cplusplus
 }
 #endif
-- 
1.7.1

  parent reply	other threads:[~2014-09-26  9:30 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-26  9:36 [dpdk-dev] [PATCH 00/12] Patches for DPDK to support " Chao Zhu
2014-09-26  9:36 ` [dpdk-dev] [PATCH 01/12] Add compiling definations for IBM " Chao Zhu
2014-09-26  9:36 ` [dpdk-dev] [PATCH 02/12] Add atomic operations " Chao Zhu
2014-09-29  6:16   ` Hemant
2014-09-29  6:41     ` Chao CH Zhu
2014-10-16  0:39   ` Ananyev, Konstantin
2014-10-16  3:14     ` Chao CH Zhu
2014-10-16  9:42       ` Richardson, Bruce
2014-10-16 11:04         ` Ananyev, Konstantin
     [not found]       ` <2601191342CEEE43887BDE71AB97725821393F5D@IRSMSX105.ger.corp.intel.com>
2014-10-16 10:59         ` Ananyev, Konstantin
2014-09-26  9:36 ` Chao Zhu [this message]
2014-09-26  9:36 ` [dpdk-dev] [PATCH 04/12] Add CPU cycle " Chao Zhu
2014-09-26  9:36 ` [dpdk-dev] [PATCH 05/12] Add prefetch operation " Chao Zhu
2014-09-26  9:36 ` [dpdk-dev] [PATCH 06/12] Add spinlock " Chao Zhu
2014-09-26  9:36 ` [dpdk-dev] [PATCH 07/12] Add vector memcpy " Chao Zhu
2014-09-26  9:36 ` [dpdk-dev] [PATCH 08/12] Add CPU flag checking " Chao Zhu
2014-09-26  9:36 ` [dpdk-dev] [PATCH 09/12] Remove iopl operation " Chao Zhu
2014-10-06 22:03   ` Cyril Chemparathy
2014-10-07 14:46     ` Ananyev, Konstantin
2014-10-13  2:33       ` Chao CH Zhu
2014-09-26  9:36 ` [dpdk-dev] [PATCH 10/12] Add cache size define for IBM Power Architecture Chao Zhu
2014-09-29  6:21   ` Hemant
2014-09-26  9:36 ` [dpdk-dev] [PATCH 11/12] Add huge page sizes for IBM Power architecture Chao Zhu
2014-09-26  9:36 ` [dpdk-dev] [PATCH 12/12] Add memory support for IBM Power Architecture Chao Zhu
2014-11-13 10:24 ` [dpdk-dev] [PATCH 00/12] Patches for DPDK to support Power architecture Thomas Monjalon
2014-11-13 10:31   ` Chao Zhu

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