From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from e9.ny.us.ibm.com (e9.ny.us.ibm.com [32.97.182.139]) by dpdk.org (Postfix) with ESMTP id 9064F7E10 for ; Fri, 26 Sep 2014 11:30:21 +0200 (CEST) Received: from /spool/local by e9.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Fri, 26 Sep 2014 05:36:42 -0400 Received: from d01dlp03.pok.ibm.com (9.56.250.168) by e9.ny.us.ibm.com (192.168.1.109) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; Fri, 26 Sep 2014 05:36:40 -0400 Received: from b01cxnp22036.gho.pok.ibm.com (b01cxnp22036.gho.pok.ibm.com [9.57.198.26]) by d01dlp03.pok.ibm.com (Postfix) with ESMTP id 39958C9003E for ; Fri, 26 Sep 2014 05:25:24 -0400 (EDT) Received: from d01av05.pok.ibm.com (d01av05.pok.ibm.com [9.56.224.195]) by b01cxnp22036.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id s8Q9aVgL7995740 for ; Fri, 26 Sep 2014 09:36:39 GMT Received: from d01av05.pok.ibm.com (localhost [127.0.0.1]) by d01av05.pok.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id s8Q9a7o2002927 for ; Fri, 26 Sep 2014 05:36:07 -0400 Received: from d01hub02.pok.ibm.com (d01hub02.pok.ibm.com [9.63.10.236]) by d01av05.pok.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id s8Q9a7wG002655 for ; Fri, 26 Sep 2014 05:36:07 -0400 Received: from localhost.localdomain ([9.186.57.14]) by rescrl1.research.ibm.com (IBM Domino Release 9.0.1) with ESMTP id 2014092617352039-312549 ; Fri, 26 Sep 2014 17:35:20 +0800 From: Chao Zhu To: dev@dpdk.org Date: Fri, 26 Sep 2014 05:36:17 -0400 Message-Id: <1411724186-8036-4-git-send-email-bjzhuc@cn.ibm.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1411724186-8036-1-git-send-email-bjzhuc@cn.ibm.com> References: <1411724186-8036-1-git-send-email-bjzhuc@cn.ibm.com> X-MIMETrack: Itemize by SMTP Server on rescrl1/Research/Affiliated/IBM(Release 9.0.1|October 14, 2013) at 2014/09/26 17:35:20, Serialize by Router on D01HUB02/01/H/IBM(Release 8.5.3FP2 ZX853FP2HF5|February, 2013) at 09/26/2014 05:36:06, Serialize complete at 09/26/2014 05:36:06 X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 14092609-7182-0000-0000-0000008E37C9 Subject: [dpdk-dev] [PATCH 03/12] Add byte order operations for IBM Power architecture X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 26 Sep 2014 09:30:23 -0000 The byte order operations implemented with assembly code in DPDK only support x86. This patch add architecture specific atomic operations for IBM Power architecture. Since IBM Power architecture is big endian while x86 is little endian, this patch also add endian specific functions to support Power architecture. Signed-off-by: Chao Zhu --- config/defconfig_ppc_64-native-linuxapp-gcc | 1 + .../include/powerpc/arch/rte_byteorder_arch.h | 79 ++++++++++++++++++++ lib/librte_eal/common/include/rte_byteorder.h | 66 ++++++++++++++++ 3 files changed, 146 insertions(+), 0 deletions(-) create mode 100644 lib/librte_eal/common/include/powerpc/arch/rte_byteorder_arch.h diff --git a/config/defconfig_ppc_64-native-linuxapp-gcc b/config/defconfig_ppc_64-native-linuxapp-gcc index 7d18455..cc11cfc 100644 --- a/config/defconfig_ppc_64-native-linuxapp-gcc +++ b/config/defconfig_ppc_64-native-linuxapp-gcc @@ -34,6 +34,7 @@ CONFIG_RTE_MACHINE="powerpc" CONFIG_RTE_ARCH="powerpc" CONFIG_RTE_ARCH_PPC_64=y +CONFIG_RTE_ARCH_BIG_ENDIAN=y CONFIG_RTE_TOOLCHAIN="gcc" CONFIG_RTE_TOOLCHAIN_GCC=y diff --git a/lib/librte_eal/common/include/powerpc/arch/rte_byteorder_arch.h b/lib/librte_eal/common/include/powerpc/arch/rte_byteorder_arch.h new file mode 100644 index 0000000..ec4d32e --- /dev/null +++ b/lib/librte_eal/common/include/powerpc/arch/rte_byteorder_arch.h @@ -0,0 +1,79 @@ +/* + * BSD LICENSE + * + * Copyright (C) IBM Corporation 2014. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of IBM Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +/* Inspired from FreeBSD src/sys/powerpc/include/endian.h + * Copyright (c) 1987, 1991, 1993 + * The Regents of the University of California. All rights reserved. +*/ + +#ifndef _RTE_BYTEORDER_ARCH_H_ +#define _RTE_BYTEORDER_ARCH_H_ + +#include + +/* + * An architecture-optimized byte swap for a 16-bit value. + * + * Do not use this function directly. The preferred function is rte_bswap16(). + */ +static inline uint16_t rte_arch_bswap16(uint16_t _x) +{ + return ((_x >> 8) | ((_x << 8) & 0xff00)); +} + +/* + * An architecture-optimized byte swap for a 32-bit value. + * + * Do not use this function directly. The preferred function is rte_bswap32(). + */ +static inline uint32_t rte_arch_bswap32(uint32_t _x) +{ + return ((_x >> 24) | ((_x >> 8) & 0xff00) | ((_x << 8) & 0xff0000) | + ((_x << 24) & 0xff000000)); +} + +/* + * An architecture-optimized byte swap for a 64-bit value. + * + * Do not use this function directly. The preferred function is rte_bswap64(). + */ +/* 64-bit mode */ +static inline uint64_t rte_arch_bswap64(uint64_t _x) +{ + return ((_x >> 56) | ((_x >> 40) & 0xff00) | ((_x >> 24) & 0xff0000) | + ((_x >> 8) & 0xff000000) | ((_x << 8) & (0xffULL << 32)) | + ((_x << 24) & (0xffULL << 40)) | + ((_x << 40) & (0xffULL << 48)) | ((_x << 56))); +} + +#endif /* _RTE_BYTEORDER_ARCH_H_ */ + diff --git a/lib/librte_eal/common/include/rte_byteorder.h b/lib/librte_eal/common/include/rte_byteorder.h index 98e3764..e8366ea 100644 --- a/lib/librte_eal/common/include/rte_byteorder.h +++ b/lib/librte_eal/common/include/rte_byteorder.h @@ -146,6 +146,7 @@ rte_constant_bswap64(uint64_t x) #endif +#ifndef RTE_ARCH_BIG_ENDIAN /** * Convert a 16-bit value from CPU order to little endian. */ @@ -209,6 +210,71 @@ rte_constant_bswap64(uint64_t x) */ #define rte_be_to_cpu_64(x) rte_bswap64(x) +#else +/** + * Convert a 16-bit value from CPU order to little endian. + */ +#define rte_cpu_to_le_16(x) rte_bswap16(x) + +/** + * Convert a 32-bit value from CPU order to little endian. + */ +#define rte_cpu_to_le_32(x) rte_bswap32(x) + +/** + * Convert a 64-bit value from CPU order to little endian. + */ +#define rte_cpu_to_le_64(x) rte_bswap64(x) + + +/** + * Convert a 16-bit value from CPU order to big endian. + */ +#define rte_cpu_to_be_16(x) (x) + +/** + * Convert a 32-bit value from CPU order to big endian. + */ +#define rte_cpu_to_be_32(x) (x) + +/** + * Convert a 64-bit value from CPU order to big endian. + */ +#define rte_cpu_to_be_64(x) (x) + + +/** + * Convert a 16-bit value from little endian to CPU order. + */ +#define rte_le_to_cpu_16(x) rte_bswap16(x) + +/** + * Convert a 32-bit value from little endian to CPU order. + */ +#define rte_le_to_cpu_32(x) rte_bswap32(x) + +/** + * Convert a 64-bit value from little endian to CPU order. + */ +#define rte_le_to_cpu_64(x) rte_bswap64(x) + + +/** + * Convert a 16-bit value from big endian to CPU order. + */ +#define rte_be_to_cpu_16(x) (x) + +/** + * Convert a 32-bit value from big endian to CPU order. + */ +#define rte_be_to_cpu_32(x) (x) + +/** + * Convert a 64-bit value from big endian to CPU order. + */ +#define rte_be_to_cpu_64(x) (x) +#endif + #ifdef __cplusplus } #endif -- 1.7.1