From: Chao Zhu <bjzhuc@cn.ibm.com>
To: dev@dpdk.org
Subject: [dpdk-dev] [PATCH 07/12] Add vector memcpy for IBM Power architecture
Date: Fri, 26 Sep 2014 05:36:21 -0400 [thread overview]
Message-ID: <1411724186-8036-8-git-send-email-bjzhuc@cn.ibm.com> (raw)
In-Reply-To: <1411724186-8036-1-git-send-email-bjzhuc@cn.ibm.com>
The SSE based memory copy in DPDK only support x86. This patch adds
altivec based memory copy functions for IBM Power architecture.
Signed-off-by: Chao Zhu <bjzhuc@cn.ibm.com>
---
.../common/include/powerpc/arch/rte_memcpy_arch.h | 129 ++++++++++++++++++++
1 files changed, 129 insertions(+), 0 deletions(-)
create mode 100644 lib/librte_eal/common/include/powerpc/arch/rte_memcpy_arch.h
diff --git a/lib/librte_eal/common/include/powerpc/arch/rte_memcpy_arch.h b/lib/librte_eal/common/include/powerpc/arch/rte_memcpy_arch.h
new file mode 100644
index 0000000..41aa483
--- /dev/null
+++ b/lib/librte_eal/common/include/powerpc/arch/rte_memcpy_arch.h
@@ -0,0 +1,129 @@
+/*
+ * BSD LICENSE
+ *
+ * Copyright (C) IBM Corporation 2014.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of IBM Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef _RTE_MEMCPY_ARCH_H_
+#define _RTE_MEMCPY_ARCH_H_
+
+#include <stdint.h>
+#include <string.h>
+#include <altivec.h>
+
+/**
+ * Copy 16 bytes from one location to another using optimised Altivec
+ * functions. The locations should not overlap.
+ *
+ * @param dst
+ * Pointer to the destination of the data.
+ * @param src
+ * Pointer to the source data.
+ */
+static inline void
+rte_arch_mov16(uint8_t *dst, const uint8_t *src)
+{
+ vec_vsx_st(vec_vsx_ld(0, src), 0, dst);
+}
+
+/**
+ * Copy 32 bytes from one location to another using optimised Altivec
+ * functions. The locations should not overlap.
+ *
+ * @param dst
+ * Pointer to the destination of the data.
+ * @param src
+ * Pointer to the source data.
+ */
+static inline void
+rte_arch_mov32(uint8_t *dst, const uint8_t *src)
+{
+ vec_vsx_st(vec_vsx_ld(0, src), 0, dst);
+ vec_vsx_st(vec_vsx_ld(16, src), 16, dst);
+}
+
+/**
+ * Copy 48 bytes from one location to another using optimised Altivec
+ * functions. The locations should not overlap.
+ *
+ * @param dst
+ * Pointer to the destination of the data.
+ * @param src
+ * Pointer to the source data.
+ */
+static inline void
+rte_arch_mov48(uint8_t *dst, const uint8_t *src)
+{
+ vec_vsx_st(vec_vsx_ld(0, src), 0, dst);
+ vec_vsx_st(vec_vsx_ld(16, src), 16, dst);
+ vec_vsx_st(vec_vsx_ld(32, src), 32, dst);
+}
+
+/**
+ * Copy 64 bytes from one location to another using optimised Altivec
+ * functions. The locations should not overlap.
+ *
+ * @param dst
+ * Pointer to the destination of the data.
+ * @param src
+ * Pointer to the source data.
+ */
+static inline void
+rte_arch_mov64(uint8_t *dst, const uint8_t *src)
+{
+ vec_vsx_st(vec_vsx_ld(0, src), 0, dst);
+ vec_vsx_st(vec_vsx_ld(16, src), 16, dst);
+ vec_vsx_st(vec_vsx_ld(32, src), 32, dst);
+ vec_vsx_st(vec_vsx_ld(48, src), 48, dst);
+}
+
+/**
+ * Copy 128 bytes from one location to another using optimised Altivec
+ * functions. The locations should not overlap.
+ *
+ * @param dst
+ * Pointer to the destination of the data.
+ * @param src
+ * Pointer to the source data.
+ */
+static inline void
+rte_arch_mov128(uint8_t *dst, const uint8_t *src)
+{
+ vec_vsx_st(vec_vsx_ld(0, src), 0, dst);
+ vec_vsx_st(vec_vsx_ld(16, src), 16, dst);
+ vec_vsx_st(vec_vsx_ld(32, src), 32, dst);
+ vec_vsx_st(vec_vsx_ld(48, src), 48, dst);
+ vec_vsx_st(vec_vsx_ld(64, src), 64, dst);
+ vec_vsx_st(vec_vsx_ld(80, src), 80, dst);
+ vec_vsx_st(vec_vsx_ld(96, src), 96, dst);
+ vec_vsx_st(vec_vsx_ld(112, src), 112, dst);
+}
+
+#endif /* _RTE_MEMCPY_ARCH_H_ */
+
--
1.7.1
next prev parent reply other threads:[~2014-09-26 9:30 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-26 9:36 [dpdk-dev] [PATCH 00/12] Patches for DPDK to support " Chao Zhu
2014-09-26 9:36 ` [dpdk-dev] [PATCH 01/12] Add compiling definations for IBM " Chao Zhu
2014-09-26 9:36 ` [dpdk-dev] [PATCH 02/12] Add atomic operations " Chao Zhu
2014-09-29 6:16 ` Hemant
2014-09-29 6:41 ` Chao CH Zhu
2014-10-16 0:39 ` Ananyev, Konstantin
2014-10-16 3:14 ` Chao CH Zhu
2014-10-16 9:42 ` Richardson, Bruce
2014-10-16 11:04 ` Ananyev, Konstantin
[not found] ` <2601191342CEEE43887BDE71AB97725821393F5D@IRSMSX105.ger.corp.intel.com>
2014-10-16 10:59 ` Ananyev, Konstantin
2014-09-26 9:36 ` [dpdk-dev] [PATCH 03/12] Add byte order " Chao Zhu
2014-09-26 9:36 ` [dpdk-dev] [PATCH 04/12] Add CPU cycle " Chao Zhu
2014-09-26 9:36 ` [dpdk-dev] [PATCH 05/12] Add prefetch operation " Chao Zhu
2014-09-26 9:36 ` [dpdk-dev] [PATCH 06/12] Add spinlock " Chao Zhu
2014-09-26 9:36 ` Chao Zhu [this message]
2014-09-26 9:36 ` [dpdk-dev] [PATCH 08/12] Add CPU flag checking " Chao Zhu
2014-09-26 9:36 ` [dpdk-dev] [PATCH 09/12] Remove iopl operation " Chao Zhu
2014-10-06 22:03 ` Cyril Chemparathy
2014-10-07 14:46 ` Ananyev, Konstantin
2014-10-13 2:33 ` Chao CH Zhu
2014-09-26 9:36 ` [dpdk-dev] [PATCH 10/12] Add cache size define for IBM Power Architecture Chao Zhu
2014-09-29 6:21 ` Hemant
2014-09-26 9:36 ` [dpdk-dev] [PATCH 11/12] Add huge page sizes for IBM Power architecture Chao Zhu
2014-09-26 9:36 ` [dpdk-dev] [PATCH 12/12] Add memory support for IBM Power Architecture Chao Zhu
2014-11-13 10:24 ` [dpdk-dev] [PATCH 00/12] Patches for DPDK to support Power architecture Thomas Monjalon
2014-11-13 10:31 ` Chao Zhu
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