From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id 917BA6835 for ; Thu, 30 Oct 2014 08:18:27 +0100 (CET) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga103.fm.intel.com with ESMTP; 30 Oct 2014 00:21:20 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.97,862,1389772800"; d="scan'208";a="408318397" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by FMSMGA003.fm.intel.com with ESMTP; 30 Oct 2014 00:19:13 -0700 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id s9U7RJ20007045; Thu, 30 Oct 2014 15:27:19 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id s9U7RHxN007681; Thu, 30 Oct 2014 15:27:19 +0800 Received: (from wujingji@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id s9U7RGQw007677; Thu, 30 Oct 2014 15:27:16 +0800 From: Jingjing Wu To: dev@dpdk.org Date: Thu, 30 Oct 2014 15:26:34 +0800 Message-Id: <1414654006-7472-10-git-send-email-jingjing.wu@intel.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1414654006-7472-1-git-send-email-jingjing.wu@intel.com> References: <1413939687-11177-1-git-send-email-jingjing.wu@intel.com> <1414654006-7472-1-git-send-email-jingjing.wu@intel.com> Subject: [dpdk-dev] [PATCH v5 09/21] i40e: report flow director match info to mbuf X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 30 Oct 2014 07:18:29 -0000 Set the FDIR information in mbuf if match Signed-off-by: Jingjing Wu --- lib/librte_pmd_i40e/i40e_rxtx.c | 99 +++++++++++++++++++++++++++++++++++++++-- 1 file changed, 95 insertions(+), 4 deletions(-) diff --git a/lib/librte_pmd_i40e/i40e_rxtx.c b/lib/librte_pmd_i40e/i40e_rxtx.c index f2334de..20e35a4 100644 --- a/lib/librte_pmd_i40e/i40e_rxtx.c +++ b/lib/librte_pmd_i40e/i40e_rxtx.c @@ -105,6 +105,10 @@ i40e_rxd_status_to_pkt_flags(uint64_t qword) I40E_RX_DESC_FLTSTAT_RSS_HASH) == I40E_RX_DESC_FLTSTAT_RSS_HASH) ? PKT_RX_RSS_HASH : 0; + /* Check if FDIR Match */ + flags |= (uint16_t)(qword & (1 << I40E_RX_DESC_STATUS_FLM_SHIFT) ? + PKT_RX_FDIR : 0); + return flags; } @@ -661,14 +665,41 @@ i40e_rx_scan_hw_ring(struct i40e_rx_queue *rxq) pkt_flags = i40e_rxd_status_to_pkt_flags(qword1); pkt_flags |= i40e_rxd_error_to_pkt_flags(qword1); pkt_flags |= i40e_rxd_ptype_to_pkt_flags(qword1); - mb->ol_flags = pkt_flags; - mb->packet_type = (uint16_t)((qword1 & I40E_RXD_QW1_PTYPE_MASK) >> I40E_RXD_QW1_PTYPE_SHIFT); if (pkt_flags & PKT_RX_RSS_HASH) mb->hash.rss = rte_le_to_cpu_32(\ rxdp->wb.qword0.hi_dword.rss); + + if (pkt_flags & PKT_RX_FDIR) { +#ifdef RTE_LIBRTE_I40E_16BYTE_RX_DESC + mb->hash.fdir.hi = + rte_le_to_cpu_32(\ + rxdp[j].wb.qword0.hi_dword.fd); + pkt_flags |= PKT_RX_FDIR_ID; +#else + if (((rxdp[j].wb.qword2.ext_status >> + I40E_RX_DESC_EXT_STATUS_FLEXBH_SHIFT) & + 0x03) == 0x01) { + mb->hash.fdir.hi = + rte_le_to_cpu_32(\ + rxdp[j].wb.qword3.hi_dword.fd_id); + pkt_flags |= PKT_RX_FDIR_ID; + } else if (((rxdp[j].wb.qword2.ext_status >> + I40E_RX_DESC_EXT_STATUS_FLEXBH_SHIFT) & + 0x03) == 0x02) { + mb->hash.fdir.hi = + rte_le_to_cpu_32(\ + rxdp[j].wb.qword3.hi_dword.flex_bytes_hi); + pkt_flags |= PKT_RX_FDIR_FLX; + } + mb->hash.fdir.lo = + rte_le_to_cpu_32(\ + rxdp[j].wb.qword3.lo_dword.flex_bytes_lo); +#endif + } + mb->ol_flags = pkt_flags; } for (j = 0; j < I40E_LOOK_AHEAD; j++) @@ -903,10 +934,40 @@ i40e_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts) pkt_flags |= i40e_rxd_ptype_to_pkt_flags(qword1); rxm->packet_type = (uint16_t)((qword1 & I40E_RXD_QW1_PTYPE_MASK) >> I40E_RXD_QW1_PTYPE_SHIFT); - rxm->ol_flags = pkt_flags; if (pkt_flags & PKT_RX_RSS_HASH) rxm->hash.rss = rte_le_to_cpu_32(rxd.wb.qword0.hi_dword.rss); + if (pkt_flags & PKT_RX_FDIR) { +#ifdef RTE_LIBRTE_I40E_16BYTE_RX_DESC + rxm->hash.fdir.hi = + rte_le_to_cpu_32(\ + rxd.wb.qword0.hi_dword.fd); + pkt_flags |= PKT_RX_FDIR_ID; +#else + if (((rxd.wb.qword2.ext_status >> + I40E_RX_DESC_EXT_STATUS_FLEXBH_SHIFT) & + 0x03) == 0x01) { + rxm->hash.fdir.hi = + rte_le_to_cpu_32(\ + rxd.wb.qword3.hi_dword.fd_id); + pkt_flags |= PKT_RX_FDIR_ID; + } else if (((rxd.wb.qword2.ext_status >> + I40E_RX_DESC_EXT_STATUS_FLEXBH_SHIFT) & + 0x03) == 0x02) { + rxm->hash.fdir.hi = + rte_le_to_cpu_32(\ + rxd.wb.qword3.hi_dword.flex_bytes_hi); + pkt_flags |= PKT_RX_FDIR_FLX; + } + if (((rxd.wb.qword2.ext_status >> + I40E_RX_DESC_EXT_STATUS_FLEXBL_SHIFT) & + 0x03) == 0x01) + rxm->hash.fdir.lo = + rte_le_to_cpu_32(\ + rxd.wb.qword3.lo_dword.flex_bytes_lo); +#endif + } + rxm->ol_flags = pkt_flags; rx_pkts[nb_rx++] = rxm; } @@ -1060,10 +1121,40 @@ i40e_recv_scattered_pkts(void *rx_queue, first_seg->packet_type = (uint16_t)((qword1 & I40E_RXD_QW1_PTYPE_MASK) >> I40E_RXD_QW1_PTYPE_SHIFT); - first_seg->ol_flags = pkt_flags; if (pkt_flags & PKT_RX_RSS_HASH) rxm->hash.rss = rte_le_to_cpu_32(rxd.wb.qword0.hi_dword.rss); + if (pkt_flags & PKT_RX_FDIR) { +#ifdef RTE_LIBRTE_I40E_16BYTE_RX_DESC + rxm->hash.fdir.hi = + rte_le_to_cpu_32(\ + rxd.wb.qword0.hi_dword.fd); + pkt_flags |= PKT_RX_FDIR_ID; +#else + if (((rxd.wb.qword2.ext_status >> + I40E_RX_DESC_EXT_STATUS_FLEXBH_SHIFT) & + 0x03) == 0x01) { + rxm->hash.fdir.hi = + rte_le_to_cpu_32(\ + rxd.wb.qword3.hi_dword.fd_id); + pkt_flags |= PKT_RX_FDIR_ID; + } else if (((rxd.wb.qword2.ext_status >> + I40E_RX_DESC_EXT_STATUS_FLEXBH_SHIFT) & + 0x03) == 0x02) { + rxm->hash.fdir.hi = + rte_le_to_cpu_32(\ + rxd.wb.qword3.hi_dword.flex_bytes_hi); + pkt_flags |= PKT_RX_FDIR_FLX; + } + if (((rxd.wb.qword2.ext_status >> + I40E_RX_DESC_EXT_STATUS_FLEXBL_SHIFT) & + 0x03) == 0x01) + rxm->hash.fdir.lo = + rte_le_to_cpu_32(\ + rxd.wb.qword3.lo_dword.flex_bytes_lo); +#endif + } + first_seg->ol_flags = pkt_flags; /* Prefetch data of first segment, if configured to do so. */ rte_prefetch0(RTE_PTR_ADD(first_seg->buf_addr, -- 1.8.1.4