From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 7E50D7F24 for ; Thu, 30 Oct 2014 08:18:49 +0100 (CET) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP; 30 Oct 2014 00:27:43 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.07,284,1413270000"; d="scan'208";a="598845802" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by orsmga001.jf.intel.com with ESMTP; 30 Oct 2014 00:27:43 -0700 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id s9U7RfYC008237; Thu, 30 Oct 2014 15:27:41 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id s9U7Rdg0008002; Thu, 30 Oct 2014 15:27:41 +0800 Received: (from wujingji@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id s9U7RdTp007998; Thu, 30 Oct 2014 15:27:39 +0800 From: Jingjing Wu To: dev@dpdk.org Date: Thu, 30 Oct 2014 15:26:44 +0800 Message-Id: <1414654006-7472-20-git-send-email-jingjing.wu@intel.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1414654006-7472-1-git-send-email-jingjing.wu@intel.com> References: <1413939687-11177-1-git-send-email-jingjing.wu@intel.com> <1414654006-7472-1-git-send-email-jingjing.wu@intel.com> Subject: [dpdk-dev] [PATCH v5 19/21] ethdev: define structures for configuring flex masks X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 30 Oct 2014 07:18:51 -0000 New structures are defined for configuring flexible masks Signed-off-by: Jingjing Wu --- lib/librte_ether/rte_eth_ctrl.h | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/lib/librte_ether/rte_eth_ctrl.h b/lib/librte_ether/rte_eth_ctrl.h index 4a51c22..e8e47fd 100644 --- a/lib/librte_ether/rte_eth_ctrl.h +++ b/lib/librte_ether/rte_eth_ctrl.h @@ -181,7 +181,30 @@ struct rte_eth_flex_payload_cfg { /**< Field vectors to constitute flexible payload */ }; +/** + * A structure defined to specify each word's bit mask + */ +struct rte_eth_flex_mask { + uint8_t offset; /**< Word offset in flexible payload */ + uint16_t bitmask; + /**< Each bit set to 1 disables the matched bit in the selected word + defined by offset field. */ +}; + +/** + * A structure used to configure FDIR masks for flexible payload + * for each flow type + */ +struct rte_eth_fdir_flex_masks { + enum rte_eth_flow_type flow_type; /**< Flow type */ + uint8_t words_mask; /**< Bit i enables word i of flexible payload */ + uint8_t nb_field; /**< The number of following fields */ + struct rte_eth_flex_mask field[0]; /**< Bitmask array */ +}; + #define RTE_ETH_FDIR_CFG_FLX 0x0001 +#define RTE_ETH_FDIR_CFG_MASK 0x0002 +#define RTE_ETH_FDIR_CFG_FLX_MASK 0x0003 /** * A structure used to configure FDIR filter global set * It supports RTE_ETH_FILTER_FDIR with RTE_ETH_FILTER_SET operation. @@ -191,6 +214,8 @@ struct rte_eth_fdir_cfg { /** * A pointer to structure for the configuration e.g. * struct rte_eth_flex_payload_cfg for FDIR_CFG_FLX + * struct rte_fdir_masks for FDIR_MASK + * struct rte_eth_fdir_flex_masks for FDIR_FLX_MASK */ void *cfg; }; -- 1.8.1.4