From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id 00F971515 for ; Thu, 27 Nov 2014 17:28:31 +0100 (CET) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga103.jf.intel.com with ESMTP; 27 Nov 2014 08:25:24 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.07,470,1413270000"; d="scan'208";a="644624030" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by orsmga002.jf.intel.com with ESMTP; 27 Nov 2014 08:28:30 -0800 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id sARGSSh6007077; Fri, 28 Nov 2014 00:28:28 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id sARGSQtU008587; Fri, 28 Nov 2014 00:28:28 +0800 Received: (from jijiangl@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id sARGSQZB008583; Fri, 28 Nov 2014 00:28:26 +0800 From: Jijiang Liu To: dev@dpdk.org Date: Fri, 28 Nov 2014 00:28:14 +0800 Message-Id: <1417105695-8531-4-git-send-email-jijiang.liu@intel.com> X-Mailer: git-send-email 1.7.12.2 In-Reply-To: <1417105695-8531-1-git-send-email-jijiang.liu@intel.com> References: <1417105695-8531-1-git-send-email-jijiang.liu@intel.com> Subject: [dpdk-dev] [PATCH v2 3/4] i40e:PMD change for VXLAN TX checksum X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 27 Nov 2014 16:28:33 -0000 Rework the i40e PMD codes using the new introduced ol_flags and fields. Signed-off-by: Jijiang Liu --- lib/librte_pmd_i40e/i40e_rxtx.c | 49 +++++++++++++++++++++----------------- 1 files changed, 27 insertions(+), 22 deletions(-) diff --git a/lib/librte_pmd_i40e/i40e_rxtx.c b/lib/librte_pmd_i40e/i40e_rxtx.c index cce6911..aefec9e 100644 --- a/lib/librte_pmd_i40e/i40e_rxtx.c +++ b/lib/librte_pmd_i40e/i40e_rxtx.c @@ -456,48 +456,49 @@ i40e_rxd_build_fdir(volatile union i40e_rx_desc *rxdp, struct rte_mbuf *mb) #endif return flags; } + static inline void i40e_txd_enable_checksum(uint64_t ol_flags, uint32_t *td_cmd, uint32_t *td_offset, uint8_t l2_len, uint16_t l3_len, - uint8_t inner_l2_len, - uint16_t inner_l3_len, + uint8_t outer_l2_len, + uint16_t outer_l3_len, + uint8_t l4_tun_len, uint32_t *cd_tunneling) { if (!l2_len) { PMD_DRV_LOG(DEBUG, "L2 length set to 0"); return; } - *td_offset |= (l2_len >> 1) << I40E_TX_DESC_LENGTH_MACLEN_SHIFT; if (!l3_len) { PMD_DRV_LOG(DEBUG, "L3 length set to 0"); return; } - /* VXLAN packet TX checksum offload */ - if (unlikely(ol_flags & PKT_TX_VXLAN_CKSUM)) { - uint8_t l4tun_len; - - l4tun_len = ETHER_VXLAN_HLEN + inner_l2_len; + /* UDP tunneling packet TX checksum offload */ + if (unlikely(ol_flags & PKT_TX_UDP_TUNNEL_PKT)) { + uint8_t l4_tunnel_len = 0; - if (ol_flags & PKT_TX_IPV4_CSUM) + *td_offset |= (outer_l2_len >> 1) + << I40E_TX_DESC_LENGTH_MACLEN_SHIFT; + l4_tunnel_len = l4_tun_len + l2_len; + if (ol_flags & PKT_TX_OUTER_IP_CKSUM) *cd_tunneling |= I40E_TX_CTX_EXT_IP_IPV4; - else if (ol_flags & PKT_TX_IPV6) + else if (ol_flags & PKT_TX_OUTER_IPV6) *cd_tunneling |= I40E_TX_CTX_EXT_IP_IPV6; /* Now set the ctx descriptor fields */ - *cd_tunneling |= (l3_len >> 2) << + *cd_tunneling |= (outer_l3_len >> 2) << I40E_TXD_CTX_QW0_EXT_IPLEN_SHIFT | I40E_TXD_CTX_UDP_TUNNELING | - (l4tun_len >> 1) << + (l4_tunnel_len >> 1) << I40E_TXD_CTX_QW0_NATLEN_SHIFT; - - l3_len = inner_l3_len; } + *td_offset |= (l2_len >> 1) << I40E_TX_DESC_LENGTH_MACLEN_SHIFT; /* Enable L3 checksum offloads */ if (ol_flags & PKT_TX_IPV4_CSUM) { *td_cmd |= I40E_TX_DESC_CMD_IIPT_IPV4_CSUM; @@ -1158,8 +1159,8 @@ i40e_calc_context_desc(uint64_t flags) { uint64_t mask = 0ULL; - if (flags | PKT_TX_VXLAN_CKSUM) - mask |= PKT_TX_VXLAN_CKSUM; + if (flags | PKT_TX_UDP_TUNNEL_PKT) + mask |= PKT_TX_UDP_TUNNEL_PKT; #ifdef RTE_LIBRTE_IEEE1588 mask |= PKT_TX_IEEE1588_TMST; @@ -1190,8 +1191,9 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts) uint64_t ol_flags; uint8_t l2_len; uint16_t l3_len; - uint8_t inner_l2_len; - uint16_t inner_l3_len; + uint8_t outer_l2_len; + uint16_t outer_l3_len; + uint8_t l4_tun_len; uint16_t nb_used; uint16_t nb_ctx; uint16_t tx_last; @@ -1219,9 +1221,12 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts) ol_flags = tx_pkt->ol_flags; l2_len = tx_pkt->l2_len; - inner_l2_len = tx_pkt->inner_l2_len; l3_len = tx_pkt->l3_len; - inner_l3_len = tx_pkt->inner_l3_len; + outer_l2_len = tx_pkt->outer_l2_len; + outer_l3_len = tx_pkt->outer_l3_len; + + /* L4 Tunneling Length */ + l4_tun_len = tx_pkt->l4_tun_len; /* Calculate the number of context descriptors needed. */ nb_ctx = i40e_calc_context_desc(ol_flags); @@ -1271,8 +1276,8 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts) /* Enable checksum offloading */ cd_tunneling_params = 0; i40e_txd_enable_checksum(ol_flags, &td_cmd, &td_offset, - l2_len, l3_len, inner_l2_len, - inner_l3_len, + l2_len, l3_len, outer_l2_len, + outer_l3_len, l4_tun_len, &cd_tunneling_params); if (unlikely(nb_ctx)) { -- 1.7.7.6