From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from emea01-db3-obe.outbound.protection.outlook.com (mail-db3on0077.outbound.protection.outlook.com [157.55.234.77]) by dpdk.org (Postfix) with ESMTP id D7D285A6B for ; Tue, 6 Jan 2015 08:02:25 +0100 (CET) Received: from DB4PR02CA0046.eurprd02.prod.outlook.com (10.242.174.174) by AM3PR02MB0583.eurprd02.prod.outlook.com (10.242.253.141) with Microsoft SMTP Server (TLS) id 15.1.49.12; Tue, 6 Jan 2015 07:02:23 +0000 Received: from DB3FFO11FD024.protection.gbl (2a01:111:f400:7e04::145) by DB4PR02CA0046.outlook.office365.com (2a01:111:e400:983b::46) with Microsoft SMTP Server (TLS) id 15.1.49.12 via Frontend Transport; Tue, 6 Jan 2015 07:02:23 +0000 Received: from bjgfarm-2.internal.tilera.com (124.207.145.166) by DB3FFO11FD024.mail.protection.outlook.com (10.47.217.55) with Microsoft SMTP Server (TLS) id 15.1.49.13 via Frontend Transport; Tue, 6 Jan 2015 07:02:18 +0000 Received: (from zlu@localhost) by bjgfarm-2.internal.tilera.com (8.14.4/8.14.4/Submit) id t06728J8017222; Tue, 6 Jan 2015 15:02:08 +0800 From: Zhigang Lu To: Date: Tue, 6 Jan 2015 14:53:48 +0800 Message-ID: <1420527230-17037-11-git-send-email-zlu@ezchip.com> X-Mailer: git-send-email 2.1.2 In-Reply-To: <1420527230-17037-1-git-send-email-zlu@ezchip.com> References: <1420527230-17037-1-git-send-email-zlu@ezchip.com> X-EOPAttributedMessage: 0 Received-SPF: Fail (protection.outlook.com: domain of ezchip.com does not designate 124.207.145.166 as permitted sender) receiver=protection.outlook.com; client-ip=124.207.145.166; helo=bjgfarm-2.internal.tilera.com; Authentication-Results: spf=fail (sender IP is 124.207.145.166) smtp.mailfrom=zlu@ezchip.com; X-Forefront-Antispam-Report: CIP:124.207.145.166; CTRY:CN; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10009020)(6009001)(339900001)(189002)(199003)(97736003)(99396003)(89996001)(50986999)(42186005)(104016003)(46102003)(19580405001)(6806004)(36756003)(87936001)(20776003)(120916001)(47776003)(64706001)(2950100001)(77156002)(33646002)(68736005)(62966003)(110136001)(19580395003)(76176999)(86362001)(105606002)(4396001)(50226001)(21056001)(106466001)(229853001)(2351001)(107046002)(92566001)(31966008)(84676001)(50466002)(48376002); DIR:OUT; SFP:1101; SCL:1; SRVR:AM3PR02MB0583; H:bjgfarm-2.internal.tilera.com; FPR:; SPF:Fail; MLV:sfv; PTR:InfoDomainNonexistent; MX:1; A:1; LANG:; MIME-Version: 1.0 Content-Type: text/plain X-DmarcAction: None X-Microsoft-Antispam: UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:(3005003);SRVR:AM3PR02MB0583; X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004); SRVR:AM3PR02MB0583; X-Forefront-PRVS: 0448A97BF2 X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:;SRVR:AM3PR02MB0583; X-OriginatorOrg: ezchip.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Jan 2015 07:02:18.4291 (UTC) X-MS-Exchange-CrossTenant-Id: 0fc16e0a-3cd3-4092-8b2f-0a42cff122c3 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=0fc16e0a-3cd3-4092-8b2f-0a42cff122c3; Ip=[124.207.145.166] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM3PR02MB0583 Subject: [dpdk-dev] [PATCH v2 10/12] app/test: remove architecture specific code from cpuflags test X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 06 Jan 2015 07:02:26 -0000 Test all defined CPU flags for supported architectures so that we do not have to include conditional compilation for each architecture in app test case. Signed-off-by: Zhigang Lu Signed-off-by: Cyril Chemparathy --- app/test/test_cpuflags.c | 78 ++++-------------------------------------------- 1 file changed, 5 insertions(+), 73 deletions(-) diff --git a/app/test/test_cpuflags.c b/app/test/test_cpuflags.c index 5aeba5d..1a58c03 100644 --- a/app/test/test_cpuflags.c +++ b/app/test/test_cpuflags.c @@ -77,81 +77,13 @@ cpu_flag_result(int result) static int test_cpuflags(void) { - int result; + int i, result; printf("\nChecking for flags from different registers...\n"); -#ifdef RTE_ARCH_PPC_64 - printf("Check for PPC64:\t\t"); - CHECK_FOR_FLAG(RTE_CPUFLAG_PPC64); - - printf("Check for PPC32:\t\t"); - CHECK_FOR_FLAG(RTE_CPUFLAG_PPC32); - - printf("Check for VSX:\t\t"); - CHECK_FOR_FLAG(RTE_CPUFLAG_VSX); - - printf("Check for DFP:\t\t"); - CHECK_FOR_FLAG(RTE_CPUFLAG_DFP); - - printf("Check for FPU:\t\t"); - CHECK_FOR_FLAG(RTE_CPUFLAG_FPU); - - printf("Check for SMT:\t\t"); - CHECK_FOR_FLAG(RTE_CPUFLAG_SMT); - - printf("Check for MMU:\t\t"); - CHECK_FOR_FLAG(RTE_CPUFLAG_MMU); - - printf("Check for ALTIVEC:\t\t"); - CHECK_FOR_FLAG(RTE_CPUFLAG_ALTIVEC); - - printf("Check for ARCH_2_06:\t\t"); - CHECK_FOR_FLAG(RTE_CPUFLAG_ARCH_2_06); - - printf("Check for ARCH_2_07:\t\t"); - CHECK_FOR_FLAG(RTE_CPUFLAG_ARCH_2_07); - - printf("Check for ICACHE_SNOOP:\t\t"); - CHECK_FOR_FLAG(RTE_CPUFLAG_ICACHE_SNOOP); -#else - printf("Check for SSE:\t\t"); - CHECK_FOR_FLAG(RTE_CPUFLAG_SSE); - - printf("Check for SSE2:\t\t"); - CHECK_FOR_FLAG(RTE_CPUFLAG_SSE2); - - printf("Check for SSE3:\t\t"); - CHECK_FOR_FLAG(RTE_CPUFLAG_SSE3); - - printf("Check for SSE4.1:\t"); - CHECK_FOR_FLAG(RTE_CPUFLAG_SSE4_1); - - printf("Check for SSE4.2:\t"); - CHECK_FOR_FLAG(RTE_CPUFLAG_SSE4_2); - - printf("Check for AVX:\t\t"); - CHECK_FOR_FLAG(RTE_CPUFLAG_AVX); - - printf("Check for AVX2:\t\t"); - CHECK_FOR_FLAG(RTE_CPUFLAG_AVX2); - - printf("Check for TRBOBST:\t"); - CHECK_FOR_FLAG(RTE_CPUFLAG_TRBOBST); - - printf("Check for ENERGY_EFF:\t"); - CHECK_FOR_FLAG(RTE_CPUFLAG_ENERGY_EFF); - - printf("Check for LAHF_SAHF:\t"); - CHECK_FOR_FLAG(RTE_CPUFLAG_LAHF_SAHF); - - printf("Check for 1GB_PG:\t"); - CHECK_FOR_FLAG(RTE_CPUFLAG_1GB_PG); - - printf("Check for INVTSC:\t"); - CHECK_FOR_FLAG(RTE_CPUFLAG_INVTSC); - - -#endif + for (i = 0; i < RTE_CPUFLAG_NUMFLAGS; i++) { + printf("Check for %s:\t\t", cpu_feature_table[i].name); + CHECK_FOR_FLAG(i); + } /* * Check if invalid data is handled properly -- 2.1.2