From: Zhigang Lu <zlu@ezchip.com> To: <dev@dpdk.org> Subject: [dpdk-dev] [PATCH v2 11/12] eal: allow empty set of compile time cpuflags Date: Tue, 6 Jan 2015 14:53:49 +0800 Message-ID: <1420527230-17037-12-git-send-email-zlu@ezchip.com> (raw) In-Reply-To: <1420527230-17037-1-git-send-email-zlu@ezchip.com> On architectures that do not rely on RTE_COMPILE_TIME_CPUFLAGS, the compile_time_flags[] array can end up being zero sized. This results in a compiler complaint in the subsequent loop. Pulling out the array size computation silences this complaint. Signed-off-by: Zhigang Lu <zlu@ezchip.com> Signed-off-by: Cyril Chemparathy <cchemparathy@ezchip.com> --- lib/librte_eal/common/eal_common_cpuflags.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/lib/librte_eal/common/eal_common_cpuflags.c b/lib/librte_eal/common/eal_common_cpuflags.c index 6fd360c..7a1ca26 100644 --- a/lib/librte_eal/common/eal_common_cpuflags.c +++ b/lib/librte_eal/common/eal_common_cpuflags.c @@ -62,10 +62,12 @@ rte_cpu_check_supported(void) static const enum rte_cpu_flag_t compile_time_flags[] = { RTE_COMPILE_TIME_CPUFLAGS }; + unsigned count = + sizeof(compile_time_flags)/sizeof(compile_time_flags[0]); unsigned i; int ret; - for (i = 0; i < sizeof(compile_time_flags)/sizeof(compile_time_flags[0]); i++) { + for (i = 0; i < count; i++) { ret = rte_cpu_get_flag_enabled(compile_time_flags[i]); if (ret < 0) { -- 2.1.2
next prev parent reply other threads:[~2015-01-06 7:04 UTC|newest] Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top [not found] <1420527230-17037-1-git-send-email-zlu@ezchip.com> 2015-01-06 6:53 ` [dpdk-dev] [PATCH v2 01/12] eal/tile: add atomic operations for TileGx Zhigang Lu 2015-01-06 6:53 ` [dpdk-dev] [PATCH v2 02/12] eal/tile: add byte order " Zhigang Lu 2015-01-06 6:53 ` [dpdk-dev] [PATCH v2 03/12] eal/tile: add spinlock " Zhigang Lu 2015-01-06 6:53 ` [dpdk-dev] [PATCH v2 04/12] eal/tile: add prefetch " Zhigang Lu 2015-01-06 6:53 ` [dpdk-dev] [PATCH v2 05/12] eal/tile: add memcpy " Zhigang Lu 2015-01-06 6:53 ` [dpdk-dev] [PATCH v2 06/12] eal/tile: add cycle " Zhigang Lu 2015-01-06 6:53 ` [dpdk-dev] [PATCH v2 07/12] eal: split vector operations to architecture specific Zhigang Lu 2015-01-06 6:53 ` [dpdk-dev] [PATCH v2 08/12] eal/tile: add vector operations for TileGx Zhigang Lu 2015-01-06 6:53 ` [dpdk-dev] [PATCH v2 09/12] eal/tile: add CPU flags " Zhigang Lu 2015-01-06 6:53 ` [dpdk-dev] [PATCH v2 10/12] app/test: remove architecture specific code from cpuflags test Zhigang Lu 2015-01-06 6:53 ` Zhigang Lu [this message] 2015-01-06 6:53 ` [dpdk-dev] [PATCH v2 12/12] mk: introduce Tilera Tile architecture Zhigang Lu 2015-05-22 16:03 ` Thomas Monjalon 2015-05-22 16:42 ` Cyril Chemparathy
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