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* [dpdk-dev] [PATCH v2 01/12] eal/tile: add atomic operations for TileGx
       [not found] <1420527230-17037-1-git-send-email-zlu@ezchip.com>
@ 2015-01-06  6:53 ` Zhigang Lu
  2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 02/12] eal/tile: add byte order " Zhigang Lu
                   ` (10 subsequent siblings)
  11 siblings, 0 replies; 14+ messages in thread
From: Zhigang Lu @ 2015-01-06  6:53 UTC (permalink / raw)
  To: dev

This patch adds architecture specific memory barrier operations for
TileGx.

Signed-off-by: Zhigang Lu <zlu@ezchip.com>
Signed-off-by: Cyril Chemparathy <cchemparathy@ezchip.com>
---
 .../common/include/arch/tile/rte_atomic.h          | 62 ++++++++++++++++++++++
 1 file changed, 62 insertions(+)
 create mode 100644 lib/librte_eal/common/include/arch/tile/rte_atomic.h

diff --git a/lib/librte_eal/common/include/arch/tile/rte_atomic.h b/lib/librte_eal/common/include/arch/tile/rte_atomic.h
new file mode 100644
index 0000000..24c9b0a
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/tile/rte_atomic.h
@@ -0,0 +1,62 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright(c) 2014 Tilera Corporation. All rights reserved.
+ *   All rights reserved.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of Tilera Corporation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_ATOMIC_TILE_H_
+#define _RTE_ATOMIC_TILE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_atomic.h"
+
+static inline void rte_mb(void)
+{
+	__sync_synchronize();
+}
+
+static inline void rte_wmb(void)
+{
+	__sync_synchronize();
+}
+
+static inline void rte_rmb(void)
+{
+	__sync_synchronize();
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_ATOMIC_TILE_H_ */
-- 
2.1.2

^ permalink raw reply	[flat|nested] 14+ messages in thread

* [dpdk-dev] [PATCH v2 02/12] eal/tile: add byte order operations for TileGx
       [not found] <1420527230-17037-1-git-send-email-zlu@ezchip.com>
  2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 01/12] eal/tile: add atomic operations for TileGx Zhigang Lu
@ 2015-01-06  6:53 ` Zhigang Lu
  2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 03/12] eal/tile: add spinlock " Zhigang Lu
                   ` (9 subsequent siblings)
  11 siblings, 0 replies; 14+ messages in thread
From: Zhigang Lu @ 2015-01-06  6:53 UTC (permalink / raw)
  To: dev

This patch adds architecture specific byte swap and endianness
operations for TileGx.

Signed-off-by: Zhigang Lu <zlu@ezchip.com>
Signed-off-by: Cyril Chemparathy <cchemparathy@ezchip.com>
---
 .../common/include/arch/tile/rte_byteorder.h       | 70 ++++++++++++++++++++++
 1 file changed, 70 insertions(+)
 create mode 100644 lib/librte_eal/common/include/arch/tile/rte_byteorder.h

diff --git a/lib/librte_eal/common/include/arch/tile/rte_byteorder.h b/lib/librte_eal/common/include/arch/tile/rte_byteorder.h
new file mode 100644
index 0000000..38f3a23
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/tile/rte_byteorder.h
@@ -0,0 +1,70 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright(c) 2014 Tilera Corporation. All rights reserved.
+ *   All rights reserved.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of Tilera Corporation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_BYTEORDER_TILE_H_
+#define _RTE_BYTEORDER_TILE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_byteorder.h"
+
+/*
+ * __builtin_bswap16 is only available gcc 4.8 and upwards
+ */
+#if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 8)
+#define rte_bswap16(x) ((uint16_t)rte_constant_bswap16(x))
+#endif
+
+#define rte_cpu_to_le_16(x) (x)
+#define rte_cpu_to_le_32(x) (x)
+#define rte_cpu_to_le_64(x) (x)
+
+#define rte_cpu_to_be_16(x) rte_bswap16(x)
+#define rte_cpu_to_be_32(x) rte_bswap32(x)
+#define rte_cpu_to_be_64(x) rte_bswap64(x)
+
+#define rte_le_to_cpu_16(x) (x)
+#define rte_le_to_cpu_32(x) (x)
+#define rte_le_to_cpu_64(x) (x)
+
+#define rte_be_to_cpu_16(x) rte_bswap16(x)
+#define rte_be_to_cpu_32(x) rte_bswap32(x)
+#define rte_be_to_cpu_64(x) rte_bswap64(x)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_BYTEORDER_TILE_H_ */
-- 
2.1.2

^ permalink raw reply	[flat|nested] 14+ messages in thread

* [dpdk-dev] [PATCH v2 03/12] eal/tile: add spinlock operations for TileGx
       [not found] <1420527230-17037-1-git-send-email-zlu@ezchip.com>
  2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 01/12] eal/tile: add atomic operations for TileGx Zhigang Lu
  2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 02/12] eal/tile: add byte order " Zhigang Lu
@ 2015-01-06  6:53 ` Zhigang Lu
  2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 04/12] eal/tile: add prefetch " Zhigang Lu
                   ` (8 subsequent siblings)
  11 siblings, 0 replies; 14+ messages in thread
From: Zhigang Lu @ 2015-01-06  6:53 UTC (permalink / raw)
  To: dev

TileGx uses generic spinlock operations.

Signed-off-by: Zhigang Lu <zlu@ezchip.com>
Signed-off-by: Cyril Chemparathy <cchemparathy@ezchip.com>
---
 .../common/include/arch/tile/rte_spinlock.h        | 47 ++++++++++++++++++++++
 1 file changed, 47 insertions(+)
 create mode 100644 lib/librte_eal/common/include/arch/tile/rte_spinlock.h

diff --git a/lib/librte_eal/common/include/arch/tile/rte_spinlock.h b/lib/librte_eal/common/include/arch/tile/rte_spinlock.h
new file mode 100644
index 0000000..1dc224e
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/tile/rte_spinlock.h
@@ -0,0 +1,47 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright(c) 2014 Tilera Corporation. All rights reserved.
+ *   All rights reserved.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of Tilera Corporation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_SPINLOCK_TILE_H_
+#define _RTE_SPINLOCK_TILE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_spinlock.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_SPINLOCK_TILE_H_ */
-- 
2.1.2

^ permalink raw reply	[flat|nested] 14+ messages in thread

* [dpdk-dev] [PATCH v2 04/12] eal/tile: add prefetch operations for TileGx
       [not found] <1420527230-17037-1-git-send-email-zlu@ezchip.com>
                   ` (2 preceding siblings ...)
  2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 03/12] eal/tile: add spinlock " Zhigang Lu
@ 2015-01-06  6:53 ` Zhigang Lu
  2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 05/12] eal/tile: add memcpy " Zhigang Lu
                   ` (7 subsequent siblings)
  11 siblings, 0 replies; 14+ messages in thread
From: Zhigang Lu @ 2015-01-06  6:53 UTC (permalink / raw)
  To: dev

Signed-off-by: Zhigang Lu <zlu@ezchip.com>
Signed-off-by: Cyril Chemparathy <cchemparathy@ezchip.com>
---
 .../common/include/arch/tile/rte_prefetch.h        | 62 ++++++++++++++++++++++
 1 file changed, 62 insertions(+)
 create mode 100644 lib/librte_eal/common/include/arch/tile/rte_prefetch.h

diff --git a/lib/librte_eal/common/include/arch/tile/rte_prefetch.h b/lib/librte_eal/common/include/arch/tile/rte_prefetch.h
new file mode 100644
index 0000000..01a5d21
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/tile/rte_prefetch.h
@@ -0,0 +1,62 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright(c) 2014 Tilera Corporation. All rights reserved.
+ *   All rights reserved.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of Tilera Corporation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_PREFETCH_TILE_H_
+#define _RTE_PREFETCH_TILE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_prefetch.h"
+
+static inline void rte_prefetch0(volatile void *p)
+{
+	__builtin_prefetch((const void *)(uintptr_t)p, 0, 3);
+}
+
+static inline void rte_prefetch1(volatile void *p)
+{
+	__builtin_prefetch((const void *)(uintptr_t)p, 0, 2);
+}
+
+static inline void rte_prefetch2(volatile void *p)
+{
+	__builtin_prefetch((const void *)(uintptr_t)p, 0, 1);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_PREFETCH_TILE_H_ */
-- 
2.1.2

^ permalink raw reply	[flat|nested] 14+ messages in thread

* [dpdk-dev] [PATCH v2 05/12] eal/tile: add memcpy operations for TileGx
       [not found] <1420527230-17037-1-git-send-email-zlu@ezchip.com>
                   ` (3 preceding siblings ...)
  2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 04/12] eal/tile: add prefetch " Zhigang Lu
@ 2015-01-06  6:53 ` Zhigang Lu
  2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 06/12] eal/tile: add cycle " Zhigang Lu
                   ` (6 subsequent siblings)
  11 siblings, 0 replies; 14+ messages in thread
From: Zhigang Lu @ 2015-01-06  6:53 UTC (permalink / raw)
  To: dev

Signed-off-by: Zhigang Lu <zlu@ezchip.com>
Signed-off-by: Cyril Chemparathy <cchemparathy@ezchip.com>
---
 .../common/include/arch/tile/rte_memcpy.h          | 97 ++++++++++++++++++++++
 1 file changed, 97 insertions(+)
 create mode 100644 lib/librte_eal/common/include/arch/tile/rte_memcpy.h

diff --git a/lib/librte_eal/common/include/arch/tile/rte_memcpy.h b/lib/librte_eal/common/include/arch/tile/rte_memcpy.h
new file mode 100644
index 0000000..ef68787
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/tile/rte_memcpy.h
@@ -0,0 +1,97 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright(c) 2014 Tilera Corporation. All rights reserved.
+ *   All rights reserved.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of Tilera Corporation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_MEMCPY_TILE_H_
+#define _RTE_MEMCPY_TILE_H_
+
+#include <stdint.h>
+#include <string.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_memcpy.h"
+
+static inline void
+rte_mov16(uint8_t *dst, const uint8_t *src)
+{
+	memcpy(dst, src, 16);
+}
+
+static inline void
+rte_mov32(uint8_t *dst, const uint8_t *src)
+{
+	memcpy(dst, src, 32);
+}
+
+static inline void
+rte_mov48(uint8_t *dst, const uint8_t *src)
+{
+	memcpy(dst, src, 48);
+}
+
+static inline void
+rte_mov64(uint8_t *dst, const uint8_t *src)
+{
+	memcpy(dst, src, 64);
+}
+
+static inline void
+rte_mov128(uint8_t *dst, const uint8_t *src)
+{
+	memcpy(dst, src, 128);
+}
+
+static inline void
+rte_mov256(uint8_t *dst, const uint8_t *src)
+{
+	memcpy(dst, src, 256);
+}
+
+#define rte_memcpy(dst, src, n)              \
+	((__builtin_constant_p(n)) ?          \
+	memcpy((dst), (src), (n)) :          \
+	rte_memcpy_func((dst), (src), (n)))
+
+static inline void *
+rte_memcpy_func(void *dst, const void *src, size_t n)
+{
+	return memcpy(dst, src, n);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_MEMCPY_TILE_H_ */
-- 
2.1.2

^ permalink raw reply	[flat|nested] 14+ messages in thread

* [dpdk-dev] [PATCH v2 06/12] eal/tile: add cycle operations for TileGx
       [not found] <1420527230-17037-1-git-send-email-zlu@ezchip.com>
                   ` (4 preceding siblings ...)
  2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 05/12] eal/tile: add memcpy " Zhigang Lu
@ 2015-01-06  6:53 ` Zhigang Lu
  2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 07/12] eal: split vector operations to architecture specific Zhigang Lu
                   ` (5 subsequent siblings)
  11 siblings, 0 replies; 14+ messages in thread
From: Zhigang Lu @ 2015-01-06  6:53 UTC (permalink / raw)
  To: dev

This patch adds CPU TSC read operations for TileGx.

Signed-off-by: Zhigang Lu <zlu@ezchip.com>
Signed-off-by: Cyril Chemparathy <cchemparathy@ezchip.com>
---
 .../common/include/arch/tile/rte_cycles.h          | 64 ++++++++++++++++++++++
 1 file changed, 64 insertions(+)
 create mode 100644 lib/librte_eal/common/include/arch/tile/rte_cycles.h

diff --git a/lib/librte_eal/common/include/arch/tile/rte_cycles.h b/lib/librte_eal/common/include/arch/tile/rte_cycles.h
new file mode 100644
index 0000000..74e11cf
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/tile/rte_cycles.h
@@ -0,0 +1,64 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright(c) 2014 Tilera Corporation. All rights reserved.
+ *   All rights reserved.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of Tilera Corporation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_CYCLES_TILE_H_
+#define _RTE_CYCLES_TILE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_cycles.h"
+
+#include <arch/cycle.h>
+
+static inline uint64_t
+rte_rdtsc(void)
+{
+	return get_cycle_count();
+}
+
+static inline uint64_t
+rte_rdtsc_precise(void)
+{
+	return rte_rdtsc();
+}
+
+static inline uint64_t
+rte_get_tsc_cycles(void) { return rte_rdtsc(); }
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_CYCLES_TILE_H_ */
-- 
2.1.2

^ permalink raw reply	[flat|nested] 14+ messages in thread

* [dpdk-dev] [PATCH v2 07/12] eal: split vector operations to architecture specific
       [not found] <1420527230-17037-1-git-send-email-zlu@ezchip.com>
                   ` (5 preceding siblings ...)
  2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 06/12] eal/tile: add cycle " Zhigang Lu
@ 2015-01-06  6:53 ` Zhigang Lu
  2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 08/12] eal/tile: add vector operations for TileGx Zhigang Lu
                   ` (4 subsequent siblings)
  11 siblings, 0 replies; 14+ messages in thread
From: Zhigang Lu @ 2015-01-06  6:53 UTC (permalink / raw)
  To: dev

This patch splits vector operations from DPDK and push them
to architecture specific arch directories, so that other processor
architecture can implement its own vector functions to support DPDK.

Signed-off-by: Zhigang Lu <zlu@ezchip.com>
Signed-off-by: Cyril Chemparathy <cchemparathy@ezchip.com>
---
 lib/librte_eal/common/Makefile                     |  3 +-
 .../common/include/arch/ppc_64/rte_common_vect.h   | 73 +++++++++++++++++
 .../common/include/arch/x86/rte_common_vect.h      | 81 +++++++++++++++++++
 .../common/include/generic/rte_common_vect.h       | 51 ++++++++++++
 lib/librte_eal/common/include/rte_common_vect.h    | 93 ----------------------
 5 files changed, 206 insertions(+), 95 deletions(-)
 create mode 100644 lib/librte_eal/common/include/arch/ppc_64/rte_common_vect.h
 create mode 100644 lib/librte_eal/common/include/arch/x86/rte_common_vect.h
 create mode 100644 lib/librte_eal/common/include/generic/rte_common_vect.h
 delete mode 100644 lib/librte_eal/common/include/rte_common_vect.h

diff --git a/lib/librte_eal/common/Makefile b/lib/librte_eal/common/Makefile
index 52c1a5f..02cac22 100644
--- a/lib/librte_eal/common/Makefile
+++ b/lib/librte_eal/common/Makefile
@@ -39,7 +39,6 @@ INC += rte_rwlock.h rte_tailq.h rte_interrupts.h rte_alarm.h
 INC += rte_string_fns.h rte_version.h rte_tailq_elem.h
 INC += rte_eal_memconfig.h rte_malloc_heap.h
 INC += rte_hexdump.h rte_devargs.h rte_dev.h
-INC += rte_common_vect.h
 INC += rte_pci_dev_feature_defs.h rte_pci_dev_features.h
 
 ifeq ($(CONFIG_RTE_INSECURE_FUNCTION_WARNING),y)
@@ -47,7 +46,7 @@ INC += rte_warnings.h
 endif
 
 GENERIC_INC := rte_atomic.h rte_byteorder.h rte_cycles.h rte_prefetch.h
-GENERIC_INC += rte_spinlock.h rte_memcpy.h rte_cpuflags.h
+GENERIC_INC += rte_spinlock.h rte_memcpy.h rte_cpuflags.h rte_common_vect.h
 # defined in mk/arch/$(RTE_ARCH)/rte.vars.mk
 ARCH_DIR ?= $(RTE_ARCH)
 ARCH_INC := $(notdir $(wildcard $(RTE_SDK)/lib/librte_eal/common/include/arch/$(ARCH_DIR)/*.h))
diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_common_vect.h b/lib/librte_eal/common/include/arch/ppc_64/rte_common_vect.h
new file mode 100644
index 0000000..485b7eb
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/ppc_64/rte_common_vect.h
@@ -0,0 +1,73 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
+ *   All rights reserved.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of Intel Corporation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_COMMON_VECT_PPC_64_H_
+#define _RTE_COMMON_VECT_PPC_64_H_
+
+/**
+ * @file
+ *
+ * RTE SSE/AVX related header.
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_common_vect.h"
+
+#if (defined(__ICC) || (__GNUC__ == 4 &&  __GNUC_MINOR__ < 4))
+
+#ifdef __SSE__
+#include <xmmintrin.h>
+#endif
+
+#ifdef __SSE2__
+#include <emmintrin.h>
+#endif
+
+#if defined(__SSE4_2__) || defined(__SSE4_1__)
+#include <smmintrin.h>
+#endif
+
+#else
+
+#include <x86intrin.h>
+
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_COMMON__VECT_PPC_64_H_ */
diff --git a/lib/librte_eal/common/include/arch/x86/rte_common_vect.h b/lib/librte_eal/common/include/arch/x86/rte_common_vect.h
new file mode 100644
index 0000000..5ffe3fb
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/x86/rte_common_vect.h
@@ -0,0 +1,81 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
+ *   All rights reserved.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of Intel Corporation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_COMMON_VECT_X86_H_
+#define _RTE_COMMON_VECT_X86_H_
+
+/**
+ * @file
+ *
+ * RTE SSE/AVX related header.
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_common_vect.h"
+
+#if (defined(__ICC) || (__GNUC__ == 4 &&  __GNUC_MINOR__ < 4))
+
+#ifdef __SSE__
+#include <xmmintrin.h>
+#endif
+
+#ifdef __SSE2__
+#include <emmintrin.h>
+#endif
+
+#if defined(__SSE4_2__) || defined(__SSE4_1__)
+#include <smmintrin.h>
+#endif
+
+#else
+
+#include <x86intrin.h>
+
+#endif
+
+#ifdef RTE_ARCH_I686
+#define _mm_cvtsi128_si64(a) ({ \
+	rte_xmm_t m;            \
+	m.m = (a);              \
+	(m.u64[0]);             \
+})
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_COMMON__VECT_X86_H_ */
diff --git a/lib/librte_eal/common/include/generic/rte_common_vect.h b/lib/librte_eal/common/include/generic/rte_common_vect.h
new file mode 100644
index 0000000..3e32682
--- /dev/null
+++ b/lib/librte_eal/common/include/generic/rte_common_vect.h
@@ -0,0 +1,51 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
+ *   All rights reserved.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of Intel Corporation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_COMMON_VECT_H_
+#define _RTE_COMMON_VECT_H_
+
+typedef __m128i xmm_t;
+
+#define	XMM_SIZE	(sizeof(xmm_t))
+#define	XMM_MASK	(XMM_SIZE - 1)
+
+typedef union rte_xmm {
+	xmm_t    m;
+	uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
+	uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
+	uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
+	uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
+	double   pd[XMM_SIZE / sizeof(double)];
+} rte_xmm_t;
+
+#endif /* _RTE_COMMON__VECT_H_ */
diff --git a/lib/librte_eal/common/include/rte_common_vect.h b/lib/librte_eal/common/include/rte_common_vect.h
deleted file mode 100644
index 95bf4b1..0000000
--- a/lib/librte_eal/common/include/rte_common_vect.h
+++ /dev/null
@@ -1,93 +0,0 @@
-/*-
- *   BSD LICENSE
- *
- *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
- *   All rights reserved.
- *
- *   Redistribution and use in source and binary forms, with or without
- *   modification, are permitted provided that the following conditions
- *   are met:
- *
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in
- *       the documentation and/or other materials provided with the
- *       distribution.
- *     * Neither the name of Intel Corporation nor the names of its
- *       contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef _RTE_COMMON_VECT_H_
-#define _RTE_COMMON_VECT_H_
-
-/**
- * @file
- *
- * RTE SSE/AVX related header.
- */
-
-#if (defined(__ICC) || (__GNUC__ == 4 &&  __GNUC_MINOR__ < 4))
-
-#ifdef __SSE__
-#include <xmmintrin.h>
-#endif
-
-#ifdef __SSE2__
-#include <emmintrin.h>
-#endif
-
-#if defined(__SSE4_2__) || defined(__SSE4_1__)
-#include <smmintrin.h>
-#endif
-
-#else
-
-#include <x86intrin.h>
-
-#endif
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef __m128i xmm_t;
-
-#define	XMM_SIZE	(sizeof(xmm_t))
-#define	XMM_MASK	(XMM_SIZE - 1)
-
-typedef union rte_xmm {
-	xmm_t    m;
-	uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
-	uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
-	uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
-	uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
-	double   pd[XMM_SIZE / sizeof(double)];
-} rte_xmm_t;
-
-#ifdef RTE_ARCH_I686
-#define _mm_cvtsi128_si64(a) ({ \
-	rte_xmm_t m;            \
-	m.m = (a);              \
-	(m.u64[0]);             \
-})
-#endif
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _RTE_COMMON__VECT_H_ */
-- 
2.1.2

^ permalink raw reply	[flat|nested] 14+ messages in thread

* [dpdk-dev] [PATCH v2 08/12] eal/tile: add vector operations for TileGx
       [not found] <1420527230-17037-1-git-send-email-zlu@ezchip.com>
                   ` (6 preceding siblings ...)
  2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 07/12] eal: split vector operations to architecture specific Zhigang Lu
@ 2015-01-06  6:53 ` Zhigang Lu
  2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 09/12] eal/tile: add CPU flags " Zhigang Lu
                   ` (3 subsequent siblings)
  11 siblings, 0 replies; 14+ messages in thread
From: Zhigang Lu @ 2015-01-06  6:53 UTC (permalink / raw)
  To: dev

Signed-off-by: Zhigang Lu <zlu@ezchip.com>
Signed-off-by: Cyril Chemparathy <cchemparathy@ezchip.com>
---
 .../common/include/arch/tile/rte_common_vect.h     | 49 ++++++++++++++++++++++
 1 file changed, 49 insertions(+)
 create mode 100644 lib/librte_eal/common/include/arch/tile/rte_common_vect.h

diff --git a/lib/librte_eal/common/include/arch/tile/rte_common_vect.h b/lib/librte_eal/common/include/arch/tile/rte_common_vect.h
new file mode 100644
index 0000000..f759a20
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/tile/rte_common_vect.h
@@ -0,0 +1,49 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright(c) 2014 Tilera Corporation. All rights reserved.
+ *   All rights reserved.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of Tilera Corporation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_COMMON_VECT_TILE_H_
+#define _RTE_COMMON_VECT_TILE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_common_vect.h"
+
+typedef long __m128i __attribute__ ((__vector_size__ (16)));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_COMMON__VECT_X86_H_ */
-- 
2.1.2

^ permalink raw reply	[flat|nested] 14+ messages in thread

* [dpdk-dev] [PATCH v2 09/12] eal/tile: add CPU flags operations for TileGx
       [not found] <1420527230-17037-1-git-send-email-zlu@ezchip.com>
                   ` (7 preceding siblings ...)
  2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 08/12] eal/tile: add vector operations for TileGx Zhigang Lu
@ 2015-01-06  6:53 ` Zhigang Lu
  2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 10/12] app/test: remove architecture specific code from cpuflags test Zhigang Lu
                   ` (2 subsequent siblings)
  11 siblings, 0 replies; 14+ messages in thread
From: Zhigang Lu @ 2015-01-06  6:53 UTC (permalink / raw)
  To: dev

This patch adds empty functions for CPU flags operations to support DPDK,
since tile processor doesn't have CPU flag hardware registers.

Signed-off-by: Zhigang Lu <zlu@ezchip.com>
Signed-off-by: Cyril Chemparathy <cchemparathy@ezchip.com>
---
 .../common/include/arch/tile/rte_cpuflags.h        | 78 ++++++++++++++++++++++
 1 file changed, 78 insertions(+)
 create mode 100644 lib/librte_eal/common/include/arch/tile/rte_cpuflags.h

diff --git a/lib/librte_eal/common/include/arch/tile/rte_cpuflags.h b/lib/librte_eal/common/include/arch/tile/rte_cpuflags.h
new file mode 100644
index 0000000..872e38c
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/tile/rte_cpuflags.h
@@ -0,0 +1,78 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright(c) 2014 Tilera Corporation. All rights reserved.
+ *   All rights reserved.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of Tilera Corporation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_CPUFLAGS_TILE_H_
+#define _RTE_CPUFLAGS_TILE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+#include <rte_common.h>
+
+#include "generic/rte_cpuflags.h"
+
+enum rte_cpu_flag_t {
+	RTE_CPUFLAG_SSE4_1 = 0,             /**< SSE4_1 */
+	/* The last item */
+	RTE_CPUFLAG_NUMFLAGS,	/**< This should always be the last! */
+};
+
+static const struct feature_entry cpu_feature_table[] = {
+	FEAT_DEF(SSE4_1, 0x00000000, 0, 0, 0)
+};
+
+static inline void
+rte_cpu_get_features(__rte_unused uint32_t leaf,
+		     __rte_unused uint32_t subleaf,
+		     __rte_unused cpuid_registers_t out)
+{
+}
+
+static inline int
+rte_cpu_get_flag_enabled(__rte_unused enum rte_cpu_flag_t feature)
+{
+	if (feature >= RTE_CPUFLAG_NUMFLAGS)
+		/* Flag does not match anything in the feature tables */
+		return -ENOENT;
+
+	return 0;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_CPUFLAGS_TILE_H_ */
-- 
2.1.2

^ permalink raw reply	[flat|nested] 14+ messages in thread

* [dpdk-dev] [PATCH v2 10/12] app/test: remove architecture specific code from cpuflags test
       [not found] <1420527230-17037-1-git-send-email-zlu@ezchip.com>
                   ` (8 preceding siblings ...)
  2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 09/12] eal/tile: add CPU flags " Zhigang Lu
@ 2015-01-06  6:53 ` Zhigang Lu
  2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 11/12] eal: allow empty set of compile time cpuflags Zhigang Lu
  2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 12/12] mk: introduce Tilera Tile architecture Zhigang Lu
  11 siblings, 0 replies; 14+ messages in thread
From: Zhigang Lu @ 2015-01-06  6:53 UTC (permalink / raw)
  To: dev

Test all defined CPU flags for supported architectures so that we
do not have to include conditional compilation for each architecture
in app test case.

Signed-off-by: Zhigang Lu <zlu@ezchip.com>
Signed-off-by: Cyril Chemparathy <cchemparathy@ezchip.com>
---
 app/test/test_cpuflags.c | 78 ++++--------------------------------------------
 1 file changed, 5 insertions(+), 73 deletions(-)

diff --git a/app/test/test_cpuflags.c b/app/test/test_cpuflags.c
index 5aeba5d..1a58c03 100644
--- a/app/test/test_cpuflags.c
+++ b/app/test/test_cpuflags.c
@@ -77,81 +77,13 @@ cpu_flag_result(int result)
 static int
 test_cpuflags(void)
 {
-	int result;
+	int i, result;
 	printf("\nChecking for flags from different registers...\n");
 
-#ifdef RTE_ARCH_PPC_64
-	printf("Check for PPC64:\t\t");
-	CHECK_FOR_FLAG(RTE_CPUFLAG_PPC64);
-
-	printf("Check for PPC32:\t\t");
-	CHECK_FOR_FLAG(RTE_CPUFLAG_PPC32);
-
-	printf("Check for VSX:\t\t");
-	CHECK_FOR_FLAG(RTE_CPUFLAG_VSX);
-
-	printf("Check for DFP:\t\t");
-	CHECK_FOR_FLAG(RTE_CPUFLAG_DFP);
-
-	printf("Check for FPU:\t\t");
-	CHECK_FOR_FLAG(RTE_CPUFLAG_FPU);
-
-	printf("Check for SMT:\t\t");
-	CHECK_FOR_FLAG(RTE_CPUFLAG_SMT);
-
-	printf("Check for MMU:\t\t");
-	CHECK_FOR_FLAG(RTE_CPUFLAG_MMU);
-
-	printf("Check for ALTIVEC:\t\t");
-	CHECK_FOR_FLAG(RTE_CPUFLAG_ALTIVEC);
-
-	printf("Check for ARCH_2_06:\t\t");
-	CHECK_FOR_FLAG(RTE_CPUFLAG_ARCH_2_06);
-
-	printf("Check for ARCH_2_07:\t\t");
-	CHECK_FOR_FLAG(RTE_CPUFLAG_ARCH_2_07);
-
-	printf("Check for ICACHE_SNOOP:\t\t");
-	CHECK_FOR_FLAG(RTE_CPUFLAG_ICACHE_SNOOP);
-#else
-	printf("Check for SSE:\t\t");
-	CHECK_FOR_FLAG(RTE_CPUFLAG_SSE);
-
-	printf("Check for SSE2:\t\t");
-	CHECK_FOR_FLAG(RTE_CPUFLAG_SSE2);
-
-	printf("Check for SSE3:\t\t");
-	CHECK_FOR_FLAG(RTE_CPUFLAG_SSE3);
-
-	printf("Check for SSE4.1:\t");
-	CHECK_FOR_FLAG(RTE_CPUFLAG_SSE4_1);
-
-	printf("Check for SSE4.2:\t");
-	CHECK_FOR_FLAG(RTE_CPUFLAG_SSE4_2);
-
-	printf("Check for AVX:\t\t");
-	CHECK_FOR_FLAG(RTE_CPUFLAG_AVX);
-
-	printf("Check for AVX2:\t\t");
-	CHECK_FOR_FLAG(RTE_CPUFLAG_AVX2);
-
-	printf("Check for TRBOBST:\t");
-	CHECK_FOR_FLAG(RTE_CPUFLAG_TRBOBST);
-
-	printf("Check for ENERGY_EFF:\t");
-	CHECK_FOR_FLAG(RTE_CPUFLAG_ENERGY_EFF);
-
-	printf("Check for LAHF_SAHF:\t");
-	CHECK_FOR_FLAG(RTE_CPUFLAG_LAHF_SAHF);
-
-	printf("Check for 1GB_PG:\t");
-	CHECK_FOR_FLAG(RTE_CPUFLAG_1GB_PG);
-
-	printf("Check for INVTSC:\t");
-	CHECK_FOR_FLAG(RTE_CPUFLAG_INVTSC);
-
-
-#endif
+	for (i = 0; i < RTE_CPUFLAG_NUMFLAGS; i++) {
+		printf("Check for %s:\t\t", cpu_feature_table[i].name);
+		CHECK_FOR_FLAG(i);
+	}
 
 	/*
 	 * Check if invalid data is handled properly
-- 
2.1.2

^ permalink raw reply	[flat|nested] 14+ messages in thread

* [dpdk-dev] [PATCH v2 11/12] eal: allow empty set of compile time cpuflags
       [not found] <1420527230-17037-1-git-send-email-zlu@ezchip.com>
                   ` (9 preceding siblings ...)
  2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 10/12] app/test: remove architecture specific code from cpuflags test Zhigang Lu
@ 2015-01-06  6:53 ` Zhigang Lu
  2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 12/12] mk: introduce Tilera Tile architecture Zhigang Lu
  11 siblings, 0 replies; 14+ messages in thread
From: Zhigang Lu @ 2015-01-06  6:53 UTC (permalink / raw)
  To: dev

On architectures that do not rely on RTE_COMPILE_TIME_CPUFLAGS, the
compile_time_flags[] array can end up being zero sized.  This results in a
compiler complaint in the subsequent loop.  Pulling out the array size
computation silences this complaint.

Signed-off-by: Zhigang Lu <zlu@ezchip.com>
Signed-off-by: Cyril Chemparathy <cchemparathy@ezchip.com>
---
 lib/librte_eal/common/eal_common_cpuflags.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/lib/librte_eal/common/eal_common_cpuflags.c b/lib/librte_eal/common/eal_common_cpuflags.c
index 6fd360c..7a1ca26 100644
--- a/lib/librte_eal/common/eal_common_cpuflags.c
+++ b/lib/librte_eal/common/eal_common_cpuflags.c
@@ -62,10 +62,12 @@ rte_cpu_check_supported(void)
 	static const enum rte_cpu_flag_t compile_time_flags[] = {
 			RTE_COMPILE_TIME_CPUFLAGS
 	};
+	unsigned count =
+		sizeof(compile_time_flags)/sizeof(compile_time_flags[0]);
 	unsigned i;
 	int ret;
 
-	for (i = 0; i < sizeof(compile_time_flags)/sizeof(compile_time_flags[0]); i++) {
+	for (i = 0; i < count; i++) {
 		ret = rte_cpu_get_flag_enabled(compile_time_flags[i]);
 
 		if (ret < 0) {
-- 
2.1.2

^ permalink raw reply	[flat|nested] 14+ messages in thread

* [dpdk-dev] [PATCH v2 12/12] mk: introduce Tilera Tile architecture
       [not found] <1420527230-17037-1-git-send-email-zlu@ezchip.com>
                   ` (10 preceding siblings ...)
  2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 11/12] eal: allow empty set of compile time cpuflags Zhigang Lu
@ 2015-01-06  6:53 ` Zhigang Lu
  2015-05-22 16:03   ` Thomas Monjalon
  11 siblings, 1 reply; 14+ messages in thread
From: Zhigang Lu @ 2015-01-06  6:53 UTC (permalink / raw)
  To: dev

Add defconfig and rte.vars.mk files for Tile architecture.

Signed-off-by: Zhigang Lu <zlu@ezchip.com>
Signed-off-by: Cyril Chemparathy <cchemparathy@ezchip.com>
---
 config/defconfig_tile-tilegx-linuxapp-gcc | 78 +++++++++++++++++++++++++++++++
 mk/arch/tile/rte.vars.mk                  | 59 +++++++++++++++++++++++
 mk/machine/tilegx/rte.vars.mk             | 58 +++++++++++++++++++++++
 3 files changed, 195 insertions(+)
 create mode 100644 config/defconfig_tile-tilegx-linuxapp-gcc
 create mode 100644 mk/arch/tile/rte.vars.mk
 create mode 100644 mk/machine/tilegx/rte.vars.mk

diff --git a/config/defconfig_tile-tilegx-linuxapp-gcc b/config/defconfig_tile-tilegx-linuxapp-gcc
new file mode 100644
index 0000000..5a944d5
--- /dev/null
+++ b/config/defconfig_tile-tilegx-linuxapp-gcc
@@ -0,0 +1,78 @@
+#   BSD LICENSE
+#
+#   Copyright(c) 2014 Tilera Corporation. All rights reserved.
+#   All rights reserved.
+#
+#   Redistribution and use in source and binary forms, with or without
+#   modification, are permitted provided that the following conditions
+#   are met:
+#
+#     * Redistributions of source code must retain the above copyright
+#       notice, this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in
+#       the documentation and/or other materials provided with the
+#       distribution.
+#     * Neither the name of Tilera Corporation nor the names of its
+#       contributors may be used to endorse or promote products derived
+#       from this software without specific prior written permission.
+#
+#   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+#include "common_linuxapp"
+
+CONFIG_RTE_MACHINE="tilegx"
+
+CONFIG_RTE_ARCH="tile"
+CONFIG_RTE_ARCH_TILE=y
+CONFIG_RTE_ARCH_64=y
+
+CONFIG_RTE_TOOLCHAIN="gcc"
+CONFIG_RTE_TOOLCHAIN_GCC=y
+CONFIG_RTE_TOOLCHAIN_DEBUG=y
+
+CONFIG_RTE_FORCE_INTRINSICS=y
+CONFIG_RTE_LIBNAME="tile_dpdk"
+CONFIG_RTE_MAX_LCORE=128
+CONFIG_RTE_PKTMBUF_HEADROOM=66
+
+#
+# Compile burst-oriented MPIPE PMD driver
+#
+CONFIG_RTE_LIBRTE_MPIPE_PMD=y
+CONFIG_RTE_LIBRTE_MPIPE_DEBUG_INIT=y
+CONFIG_RTE_LIBRTE_MPIPE_DEBUG_RX=n
+CONFIG_RTE_LIBRTE_MPIPE_DEBUG_TX=n
+
+# Note: TileGx doesn't have this support
+CONFIG_RTE_EAL_IGB_UIO=n
+CONFIG_RTE_EAL_VFIO=n
+CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT=n
+CONFIG_RTE_LIBRTE_EM_PMD=n
+CONFIG_RTE_LIBRTE_IGB_PMD=n
+CONFIG_RTE_LIBRTE_IXGBE_PMD=n
+CONFIG_RTE_LIBRTE_I40E_PMD=n
+CONFIG_RTE_LIBRTE_VIRTIO_PMD=n
+CONFIG_RTE_LIBRTE_VMXNET3_PMD=n
+CONFIG_RTE_LIBRTE_PMD_BOND=n
+CONFIG_RTE_LIBRTE_ENIC_PMD=n
+
+# The following libraries are not available on TileGx.
+CONFIG_RTE_LIBRTE_LPM=n
+CONFIG_RTE_LIBRTE_ACL=n
+CONFIG_RTE_LIBRTE_SCHED=n
+CONFIG_RTE_LIBRTE_PORT=n
+CONFIG_RTE_LIBRTE_TABLE=n
+CONFIG_RTE_LIBRTE_PIPELINE=n
+CONFIG_RTE_LIBRTE_KNI=n
diff --git a/mk/arch/tile/rte.vars.mk b/mk/arch/tile/rte.vars.mk
new file mode 100644
index 0000000..238bbe2
--- /dev/null
+++ b/mk/arch/tile/rte.vars.mk
@@ -0,0 +1,59 @@
+#   BSD LICENSE
+#
+#   Copyright(c) 2014 Tilera Corporation. All rights reserved.
+#   All rights reserved.
+#
+#   Redistribution and use in source and binary forms, with or without
+#   modification, are permitted provided that the following conditions
+#   are met:
+#
+#     * Redistributions of source code must retain the above copyright
+#       notice, this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in
+#       the documentation and/or other materials provided with the
+#       distribution.
+#     * Neither the name of Tilera Corporation nor the names of its
+#       contributors may be used to endorse or promote products derived
+#       from this software without specific prior written permission.
+#
+#   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+#
+# arch:
+#
+#   - define ARCH variable (overriden by cmdline or by previous
+#     optional define in machine .mk)
+#   - define CROSS variable (overriden by cmdline or previous define
+#     in machine .mk)
+#   - define CPU_CFLAGS variable (overriden by cmdline or previous
+#     define in machine .mk)
+#   - define CPU_LDFLAGS variable (overriden by cmdline or previous
+#     define in machine .mk)
+#   - define CPU_ASFLAGS variable (overriden by cmdline or previous
+#     define in machine .mk)
+#   - may override any previously defined variable
+#
+# examples for CONFIG_RTE_ARCH: i686, x86_64, x86_64_32
+#
+
+ARCH  ?= tile
+# common arch dir in eal headers
+ARCH_DIR := tile
+CROSS ?= tile-
+
+CPU_CFLAGS  ?=
+CPU_LDFLAGS ?=
+CPU_ASFLAGS ?=
+
+export ARCH CROSS CPU_CFLAGS CPU_LDFLAGS CPU_ASFLAGS
diff --git a/mk/machine/tilegx/rte.vars.mk b/mk/machine/tilegx/rte.vars.mk
new file mode 100644
index 0000000..368ee12
--- /dev/null
+++ b/mk/machine/tilegx/rte.vars.mk
@@ -0,0 +1,58 @@
+#   BSD LICENSE
+#
+#   Copyright(c) 2014 Tilera Corporation. All rights reserved.
+#   All rights reserved.
+#
+#   Redistribution and use in source and binary forms, with or without
+#   modification, are permitted provided that the following conditions
+#   are met:
+#
+#     * Redistributions of source code must retain the above copyright
+#       notice, this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in
+#       the documentation and/or other materials provided with the
+#       distribution.
+#     * Neither the name of Tilera Corporation nor the names of its
+#       contributors may be used to endorse or promote products derived
+#       from this software without specific prior written permission.
+#
+#   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+#
+# machine:
+#
+#   - can define ARCH variable (overriden by cmdline value)
+#   - can define CROSS variable (overriden by cmdline value)
+#   - define MACHINE_CFLAGS variable (overriden by cmdline value)
+#   - define MACHINE_LDFLAGS variable (overriden by cmdline value)
+#   - define MACHINE_ASFLAGS variable (overriden by cmdline value)
+#   - can define CPU_CFLAGS variable (overriden by cmdline value) that
+#     overrides the one defined in arch.
+#   - can define CPU_LDFLAGS variable (overriden by cmdline value) that
+#     overrides the one defined in arch.
+#   - can define CPU_ASFLAGS variable (overriden by cmdline value) that
+#     overrides the one defined in arch.
+#   - may override any previously defined variable
+#
+
+# ARCH =
+# CROSS =
+# MACHINE_CFLAGS =
+# MACHINE_LDFLAGS =
+# MACHINE_ASFLAGS =
+# CPU_CFLAGS =
+# CPU_LDFLAGS =
+# CPU_ASFLAGS =
+
+MACHINE_CFLAGS =
-- 
2.1.2

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [dpdk-dev] [PATCH v2 12/12] mk: introduce Tilera Tile architecture
  2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 12/12] mk: introduce Tilera Tile architecture Zhigang Lu
@ 2015-05-22 16:03   ` Thomas Monjalon
  2015-05-22 16:42     ` Cyril Chemparathy
  0 siblings, 1 reply; 14+ messages in thread
From: Thomas Monjalon @ 2015-05-22 16:03 UTC (permalink / raw)
  To: Zhigang Lu; +Cc: dev

Hi,

2015-01-06 14:53, Zhigang Lu:
> Add defconfig and rte.vars.mk files for Tile architecture.
> 
> Signed-off-by: Zhigang Lu <zlu@ezchip.com>
> Signed-off-by: Cyril Chemparathy <cchemparathy@ezchip.com>

This series is pending without having any comments.
So it should be accepted and merged.

Do you accept to be the maintainer of Tile architecture?
If you agree, please respin this series with a cover letter (it was missing
in this v2) and update the MAINTAINERS file.

Thanks

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [dpdk-dev] [PATCH v2 12/12] mk: introduce Tilera Tile architecture
  2015-05-22 16:03   ` Thomas Monjalon
@ 2015-05-22 16:42     ` Cyril Chemparathy
  0 siblings, 0 replies; 14+ messages in thread
From: Cyril Chemparathy @ 2015-05-22 16:42 UTC (permalink / raw)
  To: Thomas Monjalon; +Cc: dev

On Fri, 22 May 2015 18:03:04 +0200
Thomas Monjalon <thomas.monjalon@6wind.com> wrote:

> Hi,
> 
> 2015-01-06 14:53, Zhigang Lu:
> > Add defconfig and rte.vars.mk files for Tile architecture.
> > 
> > Signed-off-by: Zhigang Lu <zlu@ezchip.com>
> > Signed-off-by: Cyril Chemparathy <cchemparathy@ezchip.com>
> 
> This series is pending without having any comments.
> So it should be accepted and merged.
> 

I'm working on a refresh to the latest master.  In the process, I've
simplified most of the patches down to bare essentials.

Since the TILE-Gx platform is a strict alignment machine, we need
alignment related fixes that have been submitted previously (see
http://www.dpdk.org/ml/archives/dev/2015-April/017090.html).  These are
based on relatively recent contents of master, and therefore should be
ready to merge once we go through the review cycle.  Would you mind
taking a look at these?

> Do you accept to be the maintainer of Tile architecture?
> If you agree, please respin this series with a cover letter (it was
> missing in this v2) and update the MAINTAINERS file.
> 

Sure.  We'll internally figure out the appropriate maintainer and
include this in the next round of patches.


Thanks
-- Cyril.

^ permalink raw reply	[flat|nested] 14+ messages in thread

end of thread, other threads:[~2015-05-22 16:42 UTC | newest]

Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
     [not found] <1420527230-17037-1-git-send-email-zlu@ezchip.com>
2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 01/12] eal/tile: add atomic operations for TileGx Zhigang Lu
2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 02/12] eal/tile: add byte order " Zhigang Lu
2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 03/12] eal/tile: add spinlock " Zhigang Lu
2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 04/12] eal/tile: add prefetch " Zhigang Lu
2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 05/12] eal/tile: add memcpy " Zhigang Lu
2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 06/12] eal/tile: add cycle " Zhigang Lu
2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 07/12] eal: split vector operations to architecture specific Zhigang Lu
2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 08/12] eal/tile: add vector operations for TileGx Zhigang Lu
2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 09/12] eal/tile: add CPU flags " Zhigang Lu
2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 10/12] app/test: remove architecture specific code from cpuflags test Zhigang Lu
2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 11/12] eal: allow empty set of compile time cpuflags Zhigang Lu
2015-01-06  6:53 ` [dpdk-dev] [PATCH v2 12/12] mk: introduce Tilera Tile architecture Zhigang Lu
2015-05-22 16:03   ` Thomas Monjalon
2015-05-22 16:42     ` Cyril Chemparathy

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