From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id 3FB005A9D for ; Tue, 20 Jan 2015 10:54:23 +0100 (CET) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga102.jf.intel.com with ESMTP; 20 Jan 2015 01:51:09 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.09,433,1418112000"; d="scan'208";a="653618643" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by fmsmga001.fm.intel.com with ESMTP; 20 Jan 2015 01:54:04 -0800 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id t0K9s3LI031933 for ; Tue, 20 Jan 2015 17:54:03 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id t0K9s0SI021014 for ; Tue, 20 Jan 2015 17:54:02 +0800 Received: (from dyzhou@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id t0K9s0Bo021010 for dev@dpdk.org; Tue, 20 Jan 2015 17:54:00 +0800 From: Danny Zhou To: dev@dpdk.org Date: Tue, 20 Jan 2015 17:53:55 +0800 Message-Id: <1421747640-20978-1-git-send-email-danny.zhou@intel.com> X-Mailer: git-send-email 1.7.4.1 Subject: [dpdk-dev] [RFC PATCH 0/5] Introduce low-latency one-shot rx interrupt into DPDK with polling/interrupt switch control example X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 20 Jan 2015 09:54:23 -0000 DPDK interrupt notification/handling mechanism is based on UIO with below limitation: 1) It is designed to handle LSC interrupt only with inefficient suspended pthread wakeup procedure (e.g. UIO wakes up LSC interrupt handling thread which then wakes up DPDK polling thread). In this way, it introduces non-deterministic wakeup latency for DPDK polling thread as well as packet latency if it is used to handle Rx interrupt. 2) UIO only supports a single interrupt vector which has to been shared by LSC interrupt and interrupts assigned to dedicated rx queues. This patchset includes below features: 1) Enable one-shot rx queue interrupt in ixgbe PMD for PF as well as VF. 2) Build on top of the VFIO mechanism instead of UIO, so it could support up to 64 interrupt vectors for rx queue interrupts. 3) Have 1 DPDK polling thread handle per Rx queue interrupt with a dedicated VFIO eventfd, which eliminates non-deterministic pthread wakeup latency in user space. 4) Demonstrate interrupts control APIs and userspace NAIP-like polling/interrupt switch algorithms in L3fwd-power example. Danny Zhou (5): ethdev: add rx interrupt enable/disable functions ixgbe: enable rx queue interrupts eal: add per rx queue interrupt handling based on VFIO L3fwd-power: enable one-shot rx interrupt and polling/interrupt mode switch ixgbe: enable rx queue interrupts for VF examples/l3fwd-power/main.c | 171 +++++++--- lib/librte_eal/common/include/rte_eal.h | 9 + lib/librte_eal/linuxapp/eal/eal_interrupts.c | 189 ++++++++--- lib/librte_eal/linuxapp/eal/eal_pci_vfio.c | 11 +- .../linuxapp/eal/include/exec-env/rte_interrupts.h | 4 + lib/librte_ether/rte_ethdev.c | 45 +++ lib/librte_ether/rte_ethdev.h | 57 ++++ lib/librte_pmd_ixgbe/ixgbe_ethdev.c | 356 +++++++++++++++++++++ lib/librte_pmd_ixgbe/ixgbe_ethdev.h | 6 + 9 files changed, 765 insertions(+), 83 deletions(-) -- 1.8.1.4