From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from na01-bn1-obe.outbound.protection.outlook.com (mail-bn1bn0105.outbound.protection.outlook.com [157.56.110.105]) by dpdk.org (Postfix) with ESMTP id 494C75947 for ; Thu, 12 Feb 2015 03:24:50 +0100 (CET) Received: from BY2PR03CA043.namprd03.prod.outlook.com (10.141.249.16) by CY1PR0301MB0684.namprd03.prod.outlook.com (25.160.158.155) with Microsoft SMTP Server (TLS) id 15.1.75.20; Thu, 12 Feb 2015 02:24:47 +0000 Received: from BL2FFO11FD048.protection.gbl (2a01:111:f400:7c09::194) by BY2PR03CA043.outlook.office365.com (2a01:111:e400:2c5d::16) with Microsoft SMTP Server (TLS) id 15.1.87.13 via Frontend Transport; Thu, 12 Feb 2015 02:24:47 +0000 Received: from az84smr01.freescale.net (192.88.158.2) by BL2FFO11FD048.mail.protection.outlook.com (10.173.161.210) with Microsoft SMTP Server (TLS) id 15.1.87.10 via Frontend Transport; Thu, 12 Feb 2015 02:24:46 +0000 Received: from localhost (rock.ap.freescale.net [10.193.20.106]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id t1C2Oiov021747; Wed, 11 Feb 2015 19:24:45 -0700 From: To: Date: Thu, 12 Feb 2015 09:19:50 +0800 Message-ID: <1423703990-29031-1-git-send-email-xuelin.shi@freescale.com> X-Mailer: git-send-email 1.8.4 X-EOPAttributedMessage: 0 Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.158.2 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.158.2; helo=az84smr01.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.158.2) smtp.mailfrom=b29237@freescale.com; freescale.mail.onmicrosoft.com; dkim=none (message not signed) header.d=none; X-Forefront-Antispam-Report: CIP:192.88.158.2; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019020)(6009001)(339900001)(50226001)(85426001)(57986006)(106466001)(2351001)(104016003)(105606002)(87936001)(76506005)(47776003)(33646002)(19580395003)(46102003)(6806004)(229853001)(77096005)(92566002)(86362001)(86152002)(110136001)(50986999)(62966003)(50466002)(36756003)(77156002)(19580405001)(48376002); DIR:OUT; SFP:1102; SCL:1; SRVR:CY1PR0301MB0684; H:az84smr01.freescale.net; FPR:; SPF:Fail; MLV:sfv; LANG:en; MIME-Version: 1.0 Content-Type: text/plain X-Microsoft-Antispam: UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;SRVR:CY1PR0301MB0684; X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004); SRVR:CY1PR0301MB0684; X-Forefront-PRVS: 0485417665 X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:; SRVR:CY1PR0301MB0684; X-OriginatorOrg: freescale.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Feb 2015 02:24:46.7518 (UTC) X-MS-Exchange-CrossTenant-Id: 710a03f5-10f6-4d38-9ff4-a80b81da590d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=710a03f5-10f6-4d38-9ff4-a80b81da590d; Ip=[192.88.158.2] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR0301MB0684 Cc: dev@dpdk.org Subject: [dpdk-dev] [PATCH] ixgbe: fix ixgbe PCI access endian issue X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 12 Feb 2015 02:24:50 -0000 From: Xuelin Shi ixgbe is little endian, but cpu maybe not. add necessary conversions. rte_cpu_to_le_32(...) for PCI write rte_le_to_cpu_32(...) for PCI read. Signed-off-by: Xuelin Shi --- lib/librte_pmd_ixgbe/ixgbe/ixgbe_osdep.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_osdep.h b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_osdep.h index 2d40bfd..f8bfb3f 100644 --- a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_osdep.h +++ b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_osdep.h @@ -119,11 +119,11 @@ typedef int bool; static inline uint32_t ixgbe_read_addr(volatile void* addr) { - return IXGBE_PCI_REG(addr); + return rte_le_to_cpu_32(IXGBE_PCI_REG(addr)); } #define IXGBE_PCI_REG_WRITE(reg, value) do { \ - IXGBE_PCI_REG((reg)) = (value); \ + IXGBE_PCI_REG((reg)) = (rte_cpu_to_le_32(value)); \ } while(0) #define IXGBE_PCI_REG_ADDR(hw, reg) \ -- 1.9.1