From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from na01-bl2-obe.outbound.protection.outlook.com (mail-bl2on0143.outbound.protection.outlook.com [65.55.169.143]) by dpdk.org (Postfix) with ESMTP id 0032C5A31 for ; Thu, 12 Feb 2015 03:31:52 +0100 (CET) Received: from BY2PR03CA064.namprd03.prod.outlook.com (10.141.249.37) by BY2PR0301MB0677.namprd03.prod.outlook.com (25.160.63.144) with Microsoft SMTP Server (TLS) id 15.1.75.20; Thu, 12 Feb 2015 02:31:50 +0000 Received: from BN1AFFO11FD027.protection.gbl (2a01:111:f400:7c10::148) by BY2PR03CA064.outlook.office365.com (2a01:111:e400:2c5d::37) with Microsoft SMTP Server (TLS) id 15.1.87.13 via Frontend Transport; Thu, 12 Feb 2015 02:31:49 +0000 Received: from az84smr01.freescale.net (192.88.158.2) by BN1AFFO11FD027.mail.protection.outlook.com (10.58.52.87) with Microsoft SMTP Server (TLS) id 15.1.87.10 via Frontend Transport; Thu, 12 Feb 2015 02:31:49 +0000 Received: from localhost (rock.ap.freescale.net [10.193.20.106]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id t1C2Vk9K026358; Wed, 11 Feb 2015 19:31:48 -0700 From: To: Date: Thu, 12 Feb 2015 09:26:52 +0800 Message-ID: <1423704412-29143-1-git-send-email-xuelin.shi@freescale.com> X-Mailer: git-send-email 1.8.4 X-EOPAttributedMessage: 0 Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.158.2 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.158.2; helo=az84smr01.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.158.2) smtp.mailfrom=b29237@freescale.com; freescale.mail.onmicrosoft.com; dkim=none (message not signed) header.d=none; X-Forefront-Antispam-Report: CIP:192.88.158.2; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019020)(6009001)(339900001)(33646002)(57986006)(47776003)(86152002)(87936001)(86362001)(6806004)(50226001)(19580395003)(106466001)(92566002)(85426001)(36756003)(77096005)(50466002)(2351001)(110136001)(77156002)(50986999)(19580405001)(48376002)(105606002)(229853001)(76506005)(62966003)(104016003)(46102003); DIR:OUT; SFP:1102; SCL:1; SRVR:BY2PR0301MB0677; H:az84smr01.freescale.net; FPR:; SPF:Fail; MLV:sfv; LANG:en; MIME-Version: 1.0 Content-Type: text/plain X-Microsoft-Antispam: UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;SRVR:BY2PR0301MB0677; X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004); SRVR:BY2PR0301MB0677; X-Forefront-PRVS: 0485417665 X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:; SRVR:BY2PR0301MB0677; X-OriginatorOrg: freescale.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Feb 2015 02:31:49.5380 (UTC) X-MS-Exchange-CrossTenant-Id: 710a03f5-10f6-4d38-9ff4-a80b81da590d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=710a03f5-10f6-4d38-9ff4-a80b81da590d; Ip=[192.88.158.2] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY2PR0301MB0677 Cc: dev@dpdk.org Subject: [dpdk-dev] [PATCH] e1000: fix e1000 PCI access endian issue. X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 12 Feb 2015 02:31:53 -0000 From: Xuelin Shi e1000 is little endian, but cpu maybe not. add necessary conversions. rte_cpu_to_le_32(...) for PCI write rte_le_to_cpu_32(...) for PCI read. Signed-off-by: Xuelin Shi --- lib/librte_pmd_e1000/e1000/e1000_osdep.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/lib/librte_pmd_e1000/e1000/e1000_osdep.h b/lib/librte_pmd_e1000/e1000/e1000_osdep.h index 438641e..d04ec73 100644 --- a/lib/librte_pmd_e1000/e1000/e1000_osdep.h +++ b/lib/librte_pmd_e1000/e1000/e1000_osdep.h @@ -43,6 +43,7 @@ #include #include #include +#include #include "../e1000_logs.h" @@ -96,7 +97,7 @@ typedef int bool; #define E1000_PCI_REG(reg) (*((volatile uint32_t *)(reg))) #define E1000_PCI_REG_WRITE(reg, value) do { \ - E1000_PCI_REG((reg)) = (value); \ + E1000_PCI_REG((reg)) = (rte_cpu_to_le_32(value)); \ } while (0) #define E1000_PCI_REG_ADDR(hw, reg) \ @@ -107,7 +108,7 @@ typedef int bool; static inline uint32_t e1000_read_addr(volatile void* addr) { - return E1000_PCI_REG(addr); + return rte_le_to_cpu_32(E1000_PCI_REG(addr)); } /* Necessary defines */ -- 1.9.1