From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 204CDB6B1 for ; Thu, 19 Feb 2015 17:12:21 +0100 (CET) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga101.fm.intel.com with ESMTP; 19 Feb 2015 08:11:45 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.09,609,1418112000"; d="scan'208";a="687957494" Received: from unknown (HELO Sent) ([10.217.248.233]) by orsmga002.jf.intel.com with SMTP; 19 Feb 2015 08:11:43 -0800 Received: by Sent (sSMTP sendmail emulation); Thu, 19 Feb 2015 17:12:35 +0100 From: Pawel Wodkowski To: dev@dpdk.org Date: Thu, 19 Feb 2015 16:54:47 +0100 Message-Id: <1424361289-30718-6-git-send-email-pawelx.wodkowski@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1424361289-30718-1-git-send-email-pawelx.wodkowski@intel.com> References: <1421672551-11652-1-git-send-email-pawelx.wodkowski@intel.com> <1424361289-30718-1-git-send-email-pawelx.wodkowski@intel.com> Subject: [dpdk-dev] [PATCH v4 5/7] pmd ixgbe: enable DCB in SRIOV X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 19 Feb 2015 16:12:22 -0000 Enable DCB in SRIOV mode for ixgbe driver. To use DCB in VF PF must configure port as DCB + VMDQ and VF must configure port as DCB only. VF are not allowed to change DCB settings that are common to all ports like number of TC. Signed-off-by: Pawel Wodkowski --- lib/librte_pmd_ixgbe/ixgbe_ethdev.c | 2 +- lib/librte_pmd_ixgbe/ixgbe_pf.c | 19 ++++++++++++------- lib/librte_pmd_ixgbe/ixgbe_rxtx.c | 18 +++++++++++------- 3 files changed, 24 insertions(+), 15 deletions(-) diff --git a/lib/librte_pmd_ixgbe/ixgbe_ethdev.c b/lib/librte_pmd_ixgbe/ixgbe_ethdev.c index 8e9da3b..7551bcc 100644 --- a/lib/librte_pmd_ixgbe/ixgbe_ethdev.c +++ b/lib/librte_pmd_ixgbe/ixgbe_ethdev.c @@ -1514,7 +1514,7 @@ ixgbe_dev_configure(struct rte_eth_dev *dev) if (conf->nb_queue_pools != ETH_16_POOLS && conf->nb_queue_pools != ETH_32_POOLS) { PMD_INIT_LOG(ERR, " VMDQ+DCB selected, " - "number of TX qqueue pools must be %d or %d\n", + "number of TX queue pools must be %d or %d\n", ETH_16_POOLS, ETH_32_POOLS); return (-EINVAL); } diff --git a/lib/librte_pmd_ixgbe/ixgbe_pf.c b/lib/librte_pmd_ixgbe/ixgbe_pf.c index a7b9333..7c4afba 100644 --- a/lib/librte_pmd_ixgbe/ixgbe_pf.c +++ b/lib/librte_pmd_ixgbe/ixgbe_pf.c @@ -109,9 +109,12 @@ int ixgbe_pf_host_init(struct rte_eth_dev *eth_dev) /* Fill sriov structure using default configuration. */ retval = ixgbe_pf_configure_mq_sriov(eth_dev); if (retval != 0) { - if (retval < 0) - PMD_INIT_LOG(ERR, " Setting up SRIOV with default device " + if (retval < 0) { + PMD_INIT_LOG(ERR, "Setting up SRIOV with default device " "configuration should not fail. This is a BUG."); + return retval; + } + return 0; } @@ -652,7 +655,9 @@ ixgbe_get_vf_queues(struct rte_eth_dev *dev, uint32_t vf, uint32_t *msgbuf) { struct ixgbe_vf_info *vfinfo = *IXGBE_DEV_PRIVATE_TO_P_VFDATA(dev->data->dev_private); - uint32_t default_q = vf * RTE_ETH_DEV_SRIOV(dev).nb_tx_q_per_pool; + struct ixgbe_dcb_config *dcbinfo = + IXGBE_DEV_PRIVATE_TO_DCB_CFG(dev->data->dev_private); + uint32_t default_q = RTE_ETH_DEV_SRIOV(dev).def_pool_q_idx; /* Verify if the PF supports the mbox APIs version or not */ switch (vfinfo[vf].api_version) { @@ -670,10 +675,10 @@ ixgbe_get_vf_queues(struct rte_eth_dev *dev, uint32_t vf, uint32_t *msgbuf) /* Notify VF of default queue */ msgbuf[IXGBE_VF_DEF_QUEUE] = default_q; - /* - * FIX ME if it needs fill msgbuf[IXGBE_VF_TRANS_VLAN] - * for VLAN strip or VMDQ_DCB or VMDQ_DCB_RSS - */ + if (dcbinfo->num_tcs.pg_tcs) + msgbuf[IXGBE_VF_TRANS_VLAN] = dcbinfo->num_tcs.pg_tcs; + else + msgbuf[IXGBE_VF_TRANS_VLAN] = 1; return 0; } diff --git a/lib/librte_pmd_ixgbe/ixgbe_rxtx.c b/lib/librte_pmd_ixgbe/ixgbe_rxtx.c index e6766b3..2e3522c 100644 --- a/lib/librte_pmd_ixgbe/ixgbe_rxtx.c +++ b/lib/librte_pmd_ixgbe/ixgbe_rxtx.c @@ -3166,10 +3166,9 @@ void ixgbe_configure_dcb(struct rte_eth_dev *dev) /* check support mq_mode for DCB */ if ((dev_conf->rxmode.mq_mode != ETH_MQ_RX_VMDQ_DCB) && - (dev_conf->rxmode.mq_mode != ETH_MQ_RX_DCB)) - return; - - if (dev->data->nb_rx_queues != ETH_DCB_NUM_QUEUES) + (dev_conf->rxmode.mq_mode != ETH_MQ_RX_DCB) && + (dev_conf->txmode.mq_mode != ETH_MQ_TX_VMDQ_DCB) && + (dev_conf->txmode.mq_mode != ETH_MQ_TX_DCB)) return; /** Configure DCB hardware **/ @@ -3442,8 +3441,13 @@ ixgbe_dev_mq_rx_configure(struct rte_eth_dev *dev) ixgbe_config_vf_rss(dev); break; - /* FIXME if support DCB/RSS together with VMDq & SRIOV */ + /* + * DCB will be configured during port startup. + */ case ETH_MQ_RX_VMDQ_DCB: + break; + + /* FIXME if support DCB+RSS together with VMDq & SRIOV */ case ETH_MQ_RX_VMDQ_DCB_RSS: PMD_INIT_LOG(ERR, "Could not support DCB with VMDq & SRIOV"); @@ -3488,8 +3492,8 @@ ixgbe_dev_mq_tx_configure(struct rte_eth_dev *dev) switch (RTE_ETH_DEV_SRIOV(dev).active) { /* - * SRIOV active scheme - * FIXME if support DCB together with VMDq & SRIOV + * SRIOV active scheme. + * Note: DCB will be configured during port startup. */ case ETH_64_POOLS: mtqc = IXGBE_MTQC_VT_ENA | IXGBE_MTQC_64VF; -- 1.9.1