From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id 89AAB5ABA for ; Mon, 9 Mar 2015 06:58:22 +0100 (CET) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga103.jf.intel.com with ESMTP; 08 Mar 2015 22:55:33 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.11,365,1422950400"; d="scan'208";a="695762366" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by orsmga002.jf.intel.com with ESMTP; 08 Mar 2015 22:58:16 -0700 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id t295wB6b018637; Mon, 9 Mar 2015 13:58:11 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id t295w8sC027458; Mon, 9 Mar 2015 13:58:10 +0800 Received: (from dayuqiu@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id t295w60A027454; Mon, 9 Mar 2015 13:58:06 +0800 From: Michael Qiu To: dev@dpdk.org Date: Mon, 9 Mar 2015 13:58:05 +0800 Message-Id: <1425880685-27424-1-git-send-email-michael.qiu@intel.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1425574530-16019-1-git-send-email-michael.qiu@intel.com> References: <1425574530-16019-1-git-send-email-michael.qiu@intel.com> Cc: yerden.zhumabekov@sts.kz Subject: [dpdk-dev] [PATCH 1/3 v3] librte_hash: Fix unsupported instruction `crc32' in i686 platform X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 09 Mar 2015 05:58:23 -0000 CC rte_hash.o Error: unsupported instruction `crc32' The root cause is that i686 platform does not support 'crc32q' Need make it only available in x86_64 platform Signed-off-by: Michael Qiu Acked-by: Yerden Zhumabekov --- v3 --> v2: Add sub function for #else which returns 0 v2 --> v1: Make crc32 instruction only works in X86 platform lib/librte_hash/rte_hash_crc.h | 46 +++++++++++++++++++++++++++++++++--------- 1 file changed, 36 insertions(+), 10 deletions(-) diff --git a/lib/librte_hash/rte_hash_crc.h b/lib/librte_hash/rte_hash_crc.h index d28bb2a..f1dbded 100644 --- a/lib/librte_hash/rte_hash_crc.h +++ b/lib/librte_hash/rte_hash_crc.h @@ -47,6 +47,7 @@ extern "C" { #include #include #include +#include /* Lookup tables for software implementation of CRC32C */ static const uint32_t crc32c_tables[8][256] = {{ @@ -364,6 +365,7 @@ crc32c_2words(uint64_t data, uint32_t init_val) return crc; } +#if defined(RTE_ARCH_I686) || defined(RTE_ARCH_X86_64) static inline uint32_t crc32c_sse42_u32(uint32_t data, uint32_t init_val) { @@ -375,16 +377,6 @@ crc32c_sse42_u32(uint32_t data, uint32_t init_val) } static inline uint32_t -crc32c_sse42_u64(uint64_t data, uint64_t init_val) -{ - __asm__ volatile( - "crc32q %[data], %[init_val];" - : [init_val] "+r" (init_val) - : [data] "rm" (data)); - return init_val; -} - -static inline uint32_t crc32c_sse42_u64_mimic(uint64_t data, uint64_t init_val) { union { @@ -397,6 +389,40 @@ crc32c_sse42_u64_mimic(uint64_t data, uint64_t init_val) init_val = crc32c_sse42_u32(d.u32[1], init_val); return init_val; } +#else +static inline uint32_t +crc32c_sse42_u32(__rte_unused uint32_t data, + __rte_unused uint32_t init_val) +{ + return 0; +} + +static inline uint32_t +crc32c_sse42_u64_mimic(__rte_unused uint32_t data, + __rte_unused uint32_t init_val) +{ + return 0; +} +#endif + +#ifdef RTE_ARCH_X86_64 +static inline uint32_t +crc32c_sse42_u64(uint64_t data, uint64_t init_val) +{ + __asm__ volatile( + "crc32q %[data], %[init_val];" + : [init_val] "+r" (init_val) + : [data] "rm" (data)); + return init_val; +} +#else +static inline uint32_t +crc32c_sse42_u64(__rte_unused uint64_t data, + __rte_unused uint64_t init_val) +{ + return 0; +} +#endif #define CRC32_SW (1U << 0) #define CRC32_SSE42 (1U << 1) -- 1.9.3