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From: Michael Qiu <michael.qiu@intel.com>
To: dev@dpdk.org
Date: Mon,  9 Mar 2015 13:58:05 +0800
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Cc: yerden.zhumabekov@sts.kz
Subject: [dpdk-dev] [PATCH 1/3 v3] librte_hash: Fix unsupported instruction
	`crc32' in i686 platform
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CC rte_hash.o
Error: unsupported instruction `crc32'

The root cause is that i686 platform does not support 'crc32q'
Need make it only available in x86_64 platform

Signed-off-by: Michael Qiu <michael.qiu@intel.com>
Acked-by: Yerden Zhumabekov <yerden.zhumabekov@sts.kz>
---
v3 --> v2:
	Add sub function for #else which returns 0
v2 --> v1:
         Make crc32 instruction only works in X86 platform

 lib/librte_hash/rte_hash_crc.h | 46 +++++++++++++++++++++++++++++++++---------
 1 file changed, 36 insertions(+), 10 deletions(-)

diff --git a/lib/librte_hash/rte_hash_crc.h b/lib/librte_hash/rte_hash_crc.h
index d28bb2a..f1dbded 100644
--- a/lib/librte_hash/rte_hash_crc.h
+++ b/lib/librte_hash/rte_hash_crc.h
@@ -47,6 +47,7 @@ extern "C" {
 #include <stdint.h>
 #include <rte_cpuflags.h>
 #include <rte_branch_prediction.h>
+#include <rte_common.h>
 
 /* Lookup tables for software implementation of CRC32C */
 static const uint32_t crc32c_tables[8][256] = {{
@@ -364,6 +365,7 @@ crc32c_2words(uint64_t data, uint32_t init_val)
 	return crc;
 }
 
+#if defined(RTE_ARCH_I686) || defined(RTE_ARCH_X86_64)
 static inline uint32_t
 crc32c_sse42_u32(uint32_t data, uint32_t init_val)
 {
@@ -375,16 +377,6 @@ crc32c_sse42_u32(uint32_t data, uint32_t init_val)
 }
 
 static inline uint32_t
-crc32c_sse42_u64(uint64_t data, uint64_t init_val)
-{
-	__asm__ volatile(
-			"crc32q %[data], %[init_val];"
-			: [init_val] "+r" (init_val)
-			: [data] "rm" (data));
-	return init_val;
-}
-
-static inline uint32_t
 crc32c_sse42_u64_mimic(uint64_t data, uint64_t init_val)
 {
 	union {
@@ -397,6 +389,40 @@ crc32c_sse42_u64_mimic(uint64_t data, uint64_t init_val)
 	init_val = crc32c_sse42_u32(d.u32[1], init_val);
 	return init_val;
 }
+#else
+static inline uint32_t
+crc32c_sse42_u32(__rte_unused uint32_t data,
+		 __rte_unused uint32_t init_val)
+{
+	return 0;
+}
+
+static inline uint32_t
+crc32c_sse42_u64_mimic(__rte_unused uint32_t data,
+		       __rte_unused uint32_t init_val)
+{
+	return 0;
+}
+#endif
+
+#ifdef RTE_ARCH_X86_64
+static inline uint32_t
+crc32c_sse42_u64(uint64_t data, uint64_t init_val)
+{
+	__asm__ volatile(
+			"crc32q %[data], %[init_val];"
+			: [init_val] "+r" (init_val)
+			: [data] "rm" (data));
+	return init_val;
+}
+#else
+static inline uint32_t
+crc32c_sse42_u64(__rte_unused uint64_t data,
+		 __rte_unused uint64_t init_val)
+{
+	return 0;
+}
+#endif
 
 #define CRC32_SW            (1U << 0)
 #define CRC32_SSE42         (1U << 1)
-- 
1.9.3