From: Helin Zhang <helin.zhang@intel.com>
To: dev@dpdk.org
Cc: monica.kenguva@intel.com, steven.j.murray@intel.com,
chiu-pi.shih@intel.com
Subject: [dpdk-dev] [PATCH 14/18] i40e: add new interfaces of AQ commands and relevant
Date: Mon, 20 Apr 2015 16:22:26 +0800 [thread overview]
Message-ID: <1429518150-28098-15-git-send-email-helin.zhang@intel.com> (raw)
In-Reply-To: <1429518150-28098-1-git-send-email-helin.zhang@intel.com>
New interfaces were added for AQ commands. They are as follows.
- i40e_aq_get_rss_lut()
- i40e_aq_set_rss_lut()
- i40e_aq_get_rss_key()
- i40e_aq_set_rss_key()
- i40e_aq_read_nvm_config()
- i40e_aq_write_nvm_config()
- i40e_aq_set_lldp_mib()
- i40e_read_pba_string()
Signed-off-by: Helin Zhang <helin.zhang@intel.com>
---
lib/librte_pmd_i40e/i40e/i40e_adminq_cmd.h | 57 ++++-
lib/librte_pmd_i40e/i40e/i40e_common.c | 331 +++++++++++++++++++++++++++++
lib/librte_pmd_i40e/i40e/i40e_prototype.h | 24 +++
lib/librte_pmd_i40e/i40e/i40e_type.h | 1 +
4 files changed, 409 insertions(+), 4 deletions(-)
diff --git a/lib/librte_pmd_i40e/i40e/i40e_adminq_cmd.h b/lib/librte_pmd_i40e/i40e/i40e_adminq_cmd.h
index a2c4394..1cb935c 100644
--- a/lib/librte_pmd_i40e/i40e/i40e_adminq_cmd.h
+++ b/lib/librte_pmd_i40e/i40e/i40e_adminq_cmd.h
@@ -269,6 +269,10 @@ enum i40e_admin_queue_opc {
/* Tunnel commands */
i40e_aqc_opc_add_udp_tunnel = 0x0B00,
i40e_aqc_opc_del_udp_tunnel = 0x0B01,
+ i40e_aqc_opc_set_rss_key = 0x0B02,
+ i40e_aqc_opc_set_rss_lut = 0x0B03,
+ i40e_aqc_opc_get_rss_key = 0x0B04,
+ i40e_aqc_opc_get_rss_lut = 0x0B05,
i40e_aqc_opc_tunnel_key_structure = 0x0B10,
/* Async Events */
@@ -1797,12 +1801,12 @@ I40E_CHECK_CMD_LENGTH(i40e_aqc_nvm_update);
/* NVM Config Read (indirect 0x0704) */
struct i40e_aqc_nvm_config_read {
__le16 cmd_flags;
-#define ANVM_SINGLE_OR_MULTIPLE_FEATURES_MASK 1
-#define ANVM_READ_SINGLE_FEATURE 0
-#define ANVM_READ_MULTIPLE_FEATURES 1
+#define I40E_AQ_ANVM_SINGLE_OR_MULTIPLE_FEATURES_MASK 1
+#define I40E_AQ_ANVM_READ_SINGLE_FEATURE 0
+#define I40E_AQ_ANVM_READ_MULTIPLE_FEATURES 1
__le16 element_count;
__le16 element_id; /* Feature/field ID */
- u8 reserved[2];
+ __le16 element_id_msw; /* MSWord of field ID */
__le32 address_high;
__le32 address_low;
};
@@ -1820,6 +1824,11 @@ struct i40e_aqc_nvm_config_write {
I40E_CHECK_CMD_LENGTH(i40e_aqc_nvm_config_write);
+/* Used for 0x0704 as well as for 0x0705 commands */
+#define I40E_AQ_ANVM_FEATURE_OR_IMMEDIATE_SHIFT 1
+#define I40E_AQ_ANVM_FEATURE_OR_IMMEDIATE_MASK (1 << I40E_AQ_ANVM_FEATURE_OR_IMMEDIATE_SHIFT)
+#define I40E_AQ_ANVM_FEATURE 0
+#define I40E_AQ_ANVM_IMMEDIATE_FIELD (1 << FEATURE_OR_IMMEDIATE_SHIFT)
struct i40e_aqc_nvm_config_data_feature {
__le16 feature_id;
__le16 instance_id;
@@ -2113,6 +2122,46 @@ struct i40e_aqc_del_udp_tunnel_completion {
I40E_CHECK_CMD_LENGTH(i40e_aqc_del_udp_tunnel_completion);
+struct i40e_aqc_get_set_rss_key {
+#define I40E_AQC_SET_RSS_KEY_VSI_VALID (0x1 << 15)
+#define I40E_AQC_SET_RSS_KEY_VSI_SEID_SHIFT 0
+#define I40E_AQC_SET_RSS_KEY_VSI_SEID_MASK (0x3FF << \
+ I40E_AQC_SET_RSS_KEY_VSI_SEID_SHIFT)
+ __le16 vsi_seid;
+ u8 reserved[6];
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+I40E_CHECK_CMD_LENGTH(i40e_aqc_get_set_rss_key);
+
+struct i40e_aqc_get_set_rss_key_data {
+ u8 standard_rss_key[0x28];
+ u8 extended_hash_key[0xc];
+};
+
+I40E_CHECK_STRUCT_LEN(0x34, i40e_aqc_get_set_rss_key_data);
+
+struct i40e_aqc_get_set_rss_lut {
+#define I40E_AQC_SET_RSS_LUT_VSI_VALID (0x1 << 15)
+#define I40E_AQC_SET_RSS_LUT_VSI_SEID_SHIFT 0
+#define I40E_AQC_SET_RSS_LUT_VSI_SEID_MASK (0x3FF << \
+ I40E_AQC_SET_RSS_LUT_VSI_SEID_SHIFT)
+ __le16 vsi_seid;
+#define I40E_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT 0
+#define I40E_AQC_SET_RSS_LUT_TABLE_TYPE_MASK (0x1 << \
+ I40E_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT)
+
+#define I40E_AQC_SET_RSS_LUT_TABLE_TYPE_VSI 0
+#define I40E_AQC_SET_RSS_LUT_TABLE_TYPE_PF 1
+ __le16 flags;
+ u8 reserved[4];
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+I40E_CHECK_CMD_LENGTH(i40e_aqc_get_set_rss_lut);
+
/* tunnel key structure 0x0B10 */
struct i40e_aqc_tunnel_key_structure {
diff --git a/lib/librte_pmd_i40e/i40e/i40e_common.c b/lib/librte_pmd_i40e/i40e/i40e_common.c
index 9f8d720..b6ca288 100644
--- a/lib/librte_pmd_i40e/i40e/i40e_common.c
+++ b/lib/librte_pmd_i40e/i40e/i40e_common.c
@@ -203,6 +203,168 @@ enum i40e_status_code i40e_aq_queue_shutdown(struct i40e_hw *hw,
return status;
}
+/**
+ * i40e_aq_get_set_rss_lut
+ * @hw: pointer to the hardware structure
+ * @seid: vsi number
+ * @pf_lut: for PF table set true, for VSI table set false
+ * @lut: pointer to the lut buffer provided by the caller
+ * @lut_size: size of the lut buffer
+ * @set: set true to set the table, false to get the table
+ *
+ * Internal function to get or set RSS look up table
+ **/
+STATIC enum i40e_status_code i40e_aq_get_set_rss_lut(struct i40e_hw *hw,
+ u16 seid, bool pf_lut,
+ u8 *lut, u16 lut_size,
+ bool set)
+{
+ enum i40e_status_code status;
+ struct i40e_aq_desc desc;
+ struct i40e_aqc_get_set_rss_lut *cmd_resp =
+ (struct i40e_aqc_get_set_rss_lut *)&desc.params.raw;
+
+ if (set)
+ i40e_fill_default_direct_cmd_desc(&desc,
+ i40e_aqc_opc_set_rss_lut);
+ else
+ i40e_fill_default_direct_cmd_desc(&desc,
+ i40e_aqc_opc_get_rss_lut);
+
+ /* Indirect command */
+ desc.flags |= CPU_TO_LE16((u16)I40E_AQ_FLAG_BUF);
+ desc.flags |= CPU_TO_LE16((u16)I40E_AQ_FLAG_RD);
+
+ cmd_resp->vsi_seid =
+ CPU_TO_LE16((u16)((seid <<
+ I40E_AQC_SET_RSS_LUT_VSI_SEID_SHIFT) &
+ I40E_AQC_SET_RSS_LUT_VSI_SEID_MASK));
+ cmd_resp->vsi_seid |= CPU_TO_LE16((u16)I40E_AQC_SET_RSS_LUT_VSI_VALID);
+
+ if (pf_lut)
+ cmd_resp->flags |= CPU_TO_LE16((u16)
+ ((I40E_AQC_SET_RSS_LUT_TABLE_TYPE_PF <<
+ I40E_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT) &
+ I40E_AQC_SET_RSS_LUT_TABLE_TYPE_MASK));
+ else
+ cmd_resp->flags |= CPU_TO_LE16((u16)
+ ((I40E_AQC_SET_RSS_LUT_TABLE_TYPE_VSI <<
+ I40E_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT) &
+ I40E_AQC_SET_RSS_LUT_TABLE_TYPE_MASK));
+
+ cmd_resp->addr_high = CPU_TO_LE32(I40E_HI_WORD((u64)lut));
+ cmd_resp->addr_low = CPU_TO_LE32(I40E_LO_DWORD((u64)lut));
+
+ status = i40e_asq_send_command(hw, &desc, lut, lut_size, NULL);
+
+ return status;
+}
+
+/**
+ * i40e_aq_get_rss_lut
+ * @hw: pointer to the hardware structure
+ * @seid: vsi number
+ * @pf_lut: for PF table set true, for VSI table set false
+ * @lut: pointer to the lut buffer provided by the caller
+ * @lut_size: size of the lut buffer
+ *
+ * get the RSS lookup table, PF or VSI type
+ **/
+enum i40e_status_code i40e_aq_get_rss_lut(struct i40e_hw *hw, u16 seid,
+ bool pf_lut, u8 *lut, u16 lut_size)
+{
+ return i40e_aq_get_set_rss_lut(hw, seid, pf_lut, lut, lut_size, false);
+}
+
+/**
+ * i40e_aq_set_rss_lut
+ * @hw: pointer to the hardware structure
+ * @seid: vsi number
+ * @pf_lut: for PF table set true, for VSI table set false
+ * @lut: pointer to the lut buffer provided by the caller
+ * @lut_size: size of the lut buffer
+ *
+ * set the RSS lookup table, PF or VSI type
+ **/
+enum i40e_status_code i40e_aq_set_rss_lut(struct i40e_hw *hw, u16 seid,
+ bool pf_lut, u8 *lut, u16 lut_size)
+{
+ return i40e_aq_get_set_rss_lut(hw, seid, pf_lut, lut, lut_size, true);
+}
+
+/**
+ * i40e_aq_get_set_rss_key
+ * @hw: pointer to the hw struct
+ * @seid: vsi seid
+ * @key: pointer to key info struct
+ * @set: set true to set the key, false to get the key
+ *
+ * get the RSS key per VSI
+ **/
+STATIC enum i40e_status_code i40e_aq_get_set_rss_key(struct i40e_hw *hw,
+ u16 seid,
+ struct i40e_aqc_get_set_rss_key_data *key,
+ bool set)
+{
+ enum i40e_status_code status;
+ struct i40e_aq_desc desc;
+ struct i40e_aqc_get_set_rss_key *cmd_resp =
+ (struct i40e_aqc_get_set_rss_key *)&desc.params.raw;
+ u16 key_size = sizeof(struct i40e_aqc_get_set_rss_key_data);
+
+ if (set)
+ i40e_fill_default_direct_cmd_desc(&desc,
+ i40e_aqc_opc_set_rss_key);
+ else
+ i40e_fill_default_direct_cmd_desc(&desc,
+ i40e_aqc_opc_get_rss_key);
+
+ /* Indirect command */
+ desc.flags |= CPU_TO_LE16((u16)I40E_AQ_FLAG_BUF);
+ desc.flags |= CPU_TO_LE16((u16)I40E_AQ_FLAG_RD);
+
+ cmd_resp->vsi_seid =
+ CPU_TO_LE16((u16)((seid <<
+ I40E_AQC_SET_RSS_KEY_VSI_SEID_SHIFT) &
+ I40E_AQC_SET_RSS_KEY_VSI_SEID_MASK));
+ cmd_resp->vsi_seid |= CPU_TO_LE16((u16)I40E_AQC_SET_RSS_KEY_VSI_VALID);
+ cmd_resp->addr_high = CPU_TO_LE32(I40E_HI_WORD((u64)key));
+ cmd_resp->addr_low = CPU_TO_LE32(I40E_LO_DWORD((u64)key));
+
+ status = i40e_asq_send_command(hw, &desc, key, key_size, NULL);
+
+ return status;
+}
+
+/**
+ * i40e_aq_get_rss_key
+ * @hw: pointer to the hw struct
+ * @seid: vsi seid
+ * @key: pointer to key info struct
+ *
+ **/
+enum i40e_status_code i40e_aq_get_rss_key(struct i40e_hw *hw,
+ u16 seid,
+ struct i40e_aqc_get_set_rss_key_data *key)
+{
+ return i40e_aq_get_set_rss_key(hw, seid, key, false);
+}
+
+/**
+ * i40e_aq_set_rss_key
+ * @hw: pointer to the hw struct
+ * @seid: vsi seid
+ * @key: pointer to key info struct
+ *
+ * set the RSS key per VSI
+ **/
+enum i40e_status_code i40e_aq_set_rss_key(struct i40e_hw *hw,
+ u16 seid,
+ struct i40e_aqc_get_set_rss_key_data *key)
+{
+ return i40e_aq_get_set_rss_key(hw, seid, key, true);
+}
+
/* The i40e_ptype_lookup table is used to convert from the 8-bit ptype in the
* hardware to a bit-field that can be used by SW to more easily determine the
* packet type.
@@ -777,6 +939,65 @@ void i40e_pre_tx_queue_cfg(struct i40e_hw *hw, u32 queue, bool enable)
}
/**
+ * i40e_read_pba_string - Reads part number string from EEPROM
+ * @hw: pointer to hardware structure
+ * @pba_num: stores the part number string from the EEPROM
+ * @pba_num_size: part number string buffer length
+ *
+ * Reads the part number string from the EEPROM.
+ **/
+enum i40e_status_code i40e_read_pba_string(struct i40e_hw *hw, u8 *pba_num,
+ u32 pba_num_size)
+{
+ enum i40e_status_code status = I40E_SUCCESS;
+ u16 pba_word = 0;
+ u16 pba_size = 0;
+ u16 pba_ptr = 0;
+ u16 i = 0;
+
+ status = i40e_read_nvm_word(hw, I40E_SR_PBA_FLAGS, &pba_word);
+ if ((status != I40E_SUCCESS) || (pba_word != 0xFAFA)) {
+ DEBUGOUT("Failed to read PBA flags or flag is invalid.\n");
+ return status;
+ }
+
+ status = i40e_read_nvm_word(hw, I40E_SR_PBA_BLOCK_PTR, &pba_ptr);
+ if (status != I40E_SUCCESS) {
+ DEBUGOUT("Failed to read PBA Block pointer.\n");
+ return status;
+ }
+
+ status = i40e_read_nvm_word(hw, pba_ptr, &pba_size);
+ if (status != I40E_SUCCESS) {
+ DEBUGOUT("Failed to read PBA Block size.\n");
+ return status;
+ }
+
+ /* Subtract one to get PBA word count (PBA Size word is included in
+ * total size)
+ */
+ pba_size--;
+ if (pba_num_size < (((u32)pba_size * 2) + 1)) {
+ DEBUGOUT("Buffer to small for PBA data.\n");
+ return I40E_ERR_PARAM;
+ }
+
+ for (i = 0; i < pba_size; i++) {
+ status = i40e_read_nvm_word(hw, (pba_ptr + 1) + i, &pba_word);
+ if (status != I40E_SUCCESS) {
+ DEBUGOUT1("Failed to read PBA Block word %d.\n", i);
+ return status;
+ }
+
+ pba_num[(i * 2)] = (pba_word >> 8) & 0xFF;
+ pba_num[(i * 2) + 1] = pba_word & 0xFF;
+ }
+ pba_num[(pba_size * 2)] = '\0';
+
+ return status;
+}
+
+/**
* i40e_get_media_type - Gets media type
* @hw: pointer to the hardware structure
**/
@@ -2642,6 +2863,77 @@ i40e_aq_read_nvm_exit:
}
/**
+ * i40e_aq_read_nvm_config - read an nvm config block
+ * @hw: pointer to the hw struct
+ * @cmd_flags: NVM access admin command bits
+ * @field_id: field or feature id
+ * @data: buffer for result
+ * @buf_size: buffer size
+ * @element_count: pointer to count of elements read by FW
+ * @cmd_details: pointer to command details structure or NULL
+ **/
+enum i40e_status_code i40e_aq_read_nvm_config(struct i40e_hw *hw,
+ u8 cmd_flags, u32 field_id, void *data,
+ u16 buf_size, u16 *element_count,
+ struct i40e_asq_cmd_details *cmd_details)
+{
+ struct i40e_aq_desc desc;
+ struct i40e_aqc_nvm_config_read *cmd =
+ (struct i40e_aqc_nvm_config_read *)&desc.params.raw;
+ enum i40e_status_code status;
+
+ i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_nvm_config_read);
+ desc.flags |= CPU_TO_LE16((u16)(I40E_AQ_FLAG_BUF));
+ if (buf_size > I40E_AQ_LARGE_BUF)
+ desc.flags |= CPU_TO_LE16((u16)I40E_AQ_FLAG_LB);
+
+ cmd->cmd_flags = CPU_TO_LE16(cmd_flags);
+ cmd->element_id = CPU_TO_LE16((u16)(0xffff & field_id));
+ if (cmd_flags & I40E_AQ_ANVM_FEATURE_OR_IMMEDIATE_MASK)
+ cmd->element_id_msw = CPU_TO_LE16((u16)(field_id >> 16));
+ else
+ cmd->element_id_msw = 0;
+
+ status = i40e_asq_send_command(hw, &desc, data, buf_size, cmd_details);
+
+ if (!status && element_count)
+ *element_count = LE16_TO_CPU(cmd->element_count);
+
+ return status;
+}
+
+/**
+ * i40e_aq_write_nvm_config - write an nvm config block
+ * @hw: pointer to the hw struct
+ * @cmd_flags: NVM access admin command bits
+ * @data: buffer for result
+ * @buf_size: buffer size
+ * @element_count: count of elements to be written
+ * @cmd_details: pointer to command details structure or NULL
+ **/
+enum i40e_status_code i40e_aq_write_nvm_config(struct i40e_hw *hw,
+ u8 cmd_flags, void *data, u16 buf_size,
+ u16 element_count,
+ struct i40e_asq_cmd_details *cmd_details)
+{
+ struct i40e_aq_desc desc;
+ struct i40e_aqc_nvm_config_write *cmd =
+ (struct i40e_aqc_nvm_config_write *)&desc.params.raw;
+ enum i40e_status_code status;
+
+ i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_nvm_config_write);
+ desc.flags |= CPU_TO_LE16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
+ if (buf_size > I40E_AQ_LARGE_BUF)
+ desc.flags |= CPU_TO_LE16((u16)I40E_AQ_FLAG_LB);
+
+ cmd->element_count = CPU_TO_LE16(element_count);
+ cmd->cmd_flags = CPU_TO_LE16(cmd_flags);
+ status = i40e_asq_send_command(hw, &desc, data, buf_size, cmd_details);
+
+ return status;
+}
+
+/**
* i40e_aq_erase_nvm
* @hw: pointer to the hw struct
* @module_pointer: module pointer location in words from the NVM beginning
@@ -3054,6 +3346,45 @@ enum i40e_status_code i40e_aq_get_lldp_mib(struct i40e_hw *hw, u8 bridge_type,
return status;
}
+ /**
+ * i40e_aq_set_lldp_mib - Set the LLDP MIB
+ * @hw: pointer to the hw struct
+ * @mib_type: Local, Remote or both Local and Remote MIBs
+ * @buff: pointer to a user supplied buffer to store the MIB block
+ * @buff_size: size of the buffer (in bytes)
+ * @cmd_details: pointer to command details structure or NULL
+ *
+ * Set the LLDP MIB.
+ **/
+enum i40e_status_code i40e_aq_set_lldp_mib(struct i40e_hw *hw,
+ u8 mib_type, void *buff, u16 buff_size,
+ struct i40e_asq_cmd_details *cmd_details)
+{
+ struct i40e_aq_desc desc;
+ struct i40e_aqc_lldp_set_local_mib *cmd =
+ (struct i40e_aqc_lldp_set_local_mib *)&desc.params.raw;
+ enum i40e_status_code status;
+
+ if (buff_size == 0 || !buff)
+ return I40E_ERR_PARAM;
+
+ i40e_fill_default_direct_cmd_desc(&desc,
+ i40e_aqc_opc_lldp_set_local_mib);
+ /* Indirect Command */
+ desc.flags |= CPU_TO_LE16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
+ if (buff_size > I40E_AQ_LARGE_BUF)
+ desc.flags |= CPU_TO_LE16((u16)I40E_AQ_FLAG_LB);
+ desc.datalen = CPU_TO_LE16(buff_size);
+
+ cmd->type = mib_type;
+ cmd->length = CPU_TO_LE16(buff_size);
+ cmd->address_high = CPU_TO_LE32(I40E_HI_WORD((u64)buff));
+ cmd->address_low = CPU_TO_LE32(I40E_LO_DWORD((u64)buff));
+
+ status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
+ return status;
+}
+
/**
* i40e_aq_cfg_lldp_mib_change_event
* @hw: pointer to the hw struct
diff --git a/lib/librte_pmd_i40e/i40e/i40e_prototype.h b/lib/librte_pmd_i40e/i40e/i40e_prototype.h
index 2629728..7ef441b 100644
--- a/lib/librte_pmd_i40e/i40e/i40e_prototype.h
+++ b/lib/librte_pmd_i40e/i40e/i40e_prototype.h
@@ -78,6 +78,17 @@ void i40e_resume_aq(struct i40e_hw *hw);
bool i40e_check_asq_alive(struct i40e_hw *hw);
enum i40e_status_code i40e_aq_queue_shutdown(struct i40e_hw *hw, bool unloading);
+enum i40e_status_code i40e_aq_get_rss_lut(struct i40e_hw *hw, u16 seid,
+ bool pf_lut, u8 *lut, u16 lut_size);
+enum i40e_status_code i40e_aq_set_rss_lut(struct i40e_hw *hw, u16 seid,
+ bool pf_lut, u8 *lut, u16 lut_size);
+enum i40e_status_code i40e_aq_get_rss_key(struct i40e_hw *hw,
+ u16 seid,
+ struct i40e_aqc_get_set_rss_key_data *key);
+enum i40e_status_code i40e_aq_set_rss_key(struct i40e_hw *hw,
+ u16 seid,
+ struct i40e_aqc_get_set_rss_key_data *key);
+
#ifdef PF_DRIVER
u32 i40e_led_get(struct i40e_hw *hw);
@@ -196,6 +207,14 @@ enum i40e_status_code i40e_aq_read_nvm(struct i40e_hw *hw, u8 module_pointer,
enum i40e_status_code i40e_aq_erase_nvm(struct i40e_hw *hw, u8 module_pointer,
u32 offset, u16 length, bool last_command,
struct i40e_asq_cmd_details *cmd_details);
+enum i40e_status_code i40e_aq_read_nvm_config(struct i40e_hw *hw,
+ u8 cmd_flags, u32 field_id, void *data,
+ u16 buf_size, u16 *element_count,
+ struct i40e_asq_cmd_details *cmd_details);
+enum i40e_status_code i40e_aq_write_nvm_config(struct i40e_hw *hw,
+ u8 cmd_flags, void *data, u16 buf_size,
+ u16 element_count,
+ struct i40e_asq_cmd_details *cmd_details);
enum i40e_status_code i40e_aq_discover_capabilities(struct i40e_hw *hw,
void *buff, u16 buff_size, u16 *data_size,
enum i40e_admin_queue_opc list_type_opc,
@@ -208,6 +227,9 @@ enum i40e_status_code i40e_aq_get_lldp_mib(struct i40e_hw *hw, u8 bridge_type,
u8 mib_type, void *buff, u16 buff_size,
u16 *local_len, u16 *remote_len,
struct i40e_asq_cmd_details *cmd_details);
+enum i40e_status_code i40e_aq_set_lldp_mib(struct i40e_hw *hw,
+ u8 mib_type, void *buff, u16 buff_size,
+ struct i40e_asq_cmd_details *cmd_details);
enum i40e_status_code i40e_aq_cfg_lldp_mib_change_event(struct i40e_hw *hw,
bool enable_update,
struct i40e_asq_cmd_details *cmd_details);
@@ -374,6 +396,8 @@ enum i40e_status_code i40e_aq_configure_partition_bw(struct i40e_hw *hw,
struct i40e_aqc_configure_partition_bw_data *bw_data,
struct i40e_asq_cmd_details *cmd_details);
enum i40e_status_code i40e_get_port_mac_addr(struct i40e_hw *hw, u8 *mac_addr);
+enum i40e_status_code i40e_read_pba_string(struct i40e_hw *hw, u8 *pba_num,
+ u32 pba_num_size);
void i40e_pre_tx_queue_cfg(struct i40e_hw *hw, u32 queue, bool enable);
enum i40e_aq_link_speed i40e_get_link_speed(struct i40e_hw *hw);
/* prototype for functions used for NVM access */
diff --git a/lib/librte_pmd_i40e/i40e/i40e_type.h b/lib/librte_pmd_i40e/i40e/i40e_type.h
index 0293aa7..535694a 100644
--- a/lib/librte_pmd_i40e/i40e/i40e_type.h
+++ b/lib/librte_pmd_i40e/i40e/i40e_type.h
@@ -1296,6 +1296,7 @@ struct i40e_hw_port_stats {
#define I40E_SR_CSR_PROTECTED_LIST_PTR 0x0D
#define I40E_SR_MNG_CONFIG_PTR 0x0E
#define I40E_SR_EMP_MODULE_PTR 0x0F
+#define I40E_SR_PBA_FLAGS 0x15
#define I40E_SR_PBA_BLOCK_PTR 0x16
#define I40E_SR_BOOT_CONFIG_PTR 0x17
#define I40E_SR_NVM_DEV_STARTER_VERSION 0x18
--
1.8.1.4
next prev parent reply other threads:[~2015-04-20 8:23 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-20 8:22 [dpdk-dev] [PATCH 00/18] i40e base driver update Helin Zhang
2015-04-20 8:22 ` [dpdk-dev] [PATCH 01/18] i40e: copyright update Helin Zhang
2015-04-20 8:22 ` [dpdk-dev] [PATCH 02/18] i40e: disable setting phy configuration Helin Zhang
2015-04-20 8:22 ` [dpdk-dev] [PATCH 03/18] i40e: adjustment of register definitions and relevant Helin Zhang
2015-04-27 17:16 ` Thomas Monjalon
2015-04-28 2:29 ` Zhang, Helin
2015-04-20 8:22 ` [dpdk-dev] [PATCH 04/18] i40e: support of CEE DCBX on recent firmware versions Helin Zhang
2015-04-20 8:22 ` [dpdk-dev] [PATCH 05/18] i40e: rework of 'i40e_hmc_get_object_va' Helin Zhang
2015-04-20 8:22 ` [dpdk-dev] [PATCH 06/18] i40e: support of Fortpark device IDs and mac types Helin Zhang
2015-04-20 8:22 ` [dpdk-dev] [PATCH 07/18] i40e: rename 'err' to 'perrno' Helin Zhang
2015-04-20 8:22 ` [dpdk-dev] [PATCH 08/18] i40e: support NVM read on Fortpark, with minor enhancements Helin Zhang
2015-04-20 8:22 ` [dpdk-dev] [PATCH 09/18] i40e: adminq enhancements Helin Zhang
2015-04-20 8:22 ` [dpdk-dev] [PATCH 10/18] i40e: support of firmware build number Helin Zhang
2015-04-20 8:22 ` [dpdk-dev] [PATCH 11/18] i40e: support of building both PF and VF driver together Helin Zhang
2015-04-27 17:25 ` Thomas Monjalon
2015-04-28 2:33 ` Zhang, Helin
2015-04-20 8:22 ` [dpdk-dev] [PATCH 12/18] i40e: enhancements of AQ commands and common interfaces Helin Zhang
2015-04-27 17:26 ` Thomas Monjalon
2015-04-28 2:34 ` Zhang, Helin
2015-04-20 8:22 ` [dpdk-dev] [PATCH 13/18] i40e: replacement of 'i40e_debug_read_register()' Helin Zhang
2015-04-27 17:28 ` Thomas Monjalon
2015-04-28 2:34 ` Zhang, Helin
2015-04-20 8:22 ` Helin Zhang [this message]
2015-04-20 8:22 ` [dpdk-dev] [PATCH 15/18] i40e: support of Fortpark FPGA Helin Zhang
2015-04-20 8:22 ` [dpdk-dev] [PATCH 16/18] i40e: add more virtual channel operations Helin Zhang
2015-04-20 8:22 ` [dpdk-dev] [PATCH 17/18] i40e: support of structure and command length check Helin Zhang
2015-04-20 8:22 ` [dpdk-dev] [PATCH 18/18] i40e: Minor enhancements in i40e_type.h Helin Zhang
2015-04-22 7:26 ` [dpdk-dev] [PATCH 00/18] i40e base driver update Cao, Min
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 00/33] " Helin Zhang
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 01/33] i40e: copyright update Helin Zhang
2015-05-08 3:22 ` Wu, Jingjing
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 02/33] i40e: disable setting of phy configuration Helin Zhang
2015-05-08 3:22 ` Wu, Jingjing
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 03/33] i40e: adjustment of register definitions and relevant Helin Zhang
2015-05-08 3:21 ` Wu, Jingjing
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 04/33] i40e/base: rename 'err' to 'perrno' Helin Zhang
2015-05-08 3:20 ` Wu, Jingjing
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 05/33] i40e/base: support of building both PF and VF driver together Helin Zhang
2015-05-08 3:25 ` Wu, Jingjing
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 06/33] i40e/base: support of CEE DCBX on recent firmware versions Helin Zhang
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 07/33] i40e: replacement of 'i40e_debug_read_register()' Helin Zhang
2015-05-08 3:23 ` Wu, Jingjing
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 08/33] i40e/base: rework of 'i40e_hmc_get_object_va' Helin Zhang
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 09/33] i40e/base: update of shadow RAM read/write functions Helin Zhang
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 10/33] i40e/base: catch NVM write semaphore timeout and retry Helin Zhang
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 11/33] i40e/base: check for AQ timeout in aq_rc decode Helin Zhang
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 12/33] i40e/base: fix up NVM update sm error handling Helin Zhang
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 13/33] i40e/base: enhancement of polling NVM semaphore Helin Zhang
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 14/33] i40e/base: enhancements of NVM checksum calculation Helin Zhang
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 15/33] i40e/base: replacement of DEBUGOUT() with i40e_debug() Helin Zhang
2015-05-08 3:24 ` Wu, Jingjing
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 16/33] i40e/base: add fw build info to AQ data Helin Zhang
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 17/33] i40e/base: define and use i40e_is_vf() Helin Zhang
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 18/33] i40e/base: grab NVM devstarter version not image version Helin Zhang
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 19/33] i40e/base: enhancements on adminq init and sending asq command Helin Zhang
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 20/33] i40e/base: i40e_aq_get_link_info() should be used directly Helin Zhang
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 21/33] i40e/base: add new interfaces for future use Helin Zhang
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 22/33] i40e/base: update of get/set LED functions Helin Zhang
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 23/33] i40e/base: clean up sparse complaint in i40e_debug_aq Helin Zhang
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 24/33] i40e/base: get pf_id from HW rather than PCI function Helin Zhang
2015-05-08 3:20 ` Wu, Jingjing
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 25/33] i40e/base: find partition_id in npar mode, and disable FCOE by default Helin Zhang
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 26/33] i40e/base: Reassign incorrect PHY type as a workaround for a FW issue Helin Zhang
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 27/33] i40e/base: add AOC phy types to case statement in get_media_type Helin Zhang
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 28/33] i40e/base: support for iSCSI capability Helin Zhang
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 29/33] i40e/base: set FLAG_RD when sending driver version to FW Helin Zhang
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 30/33] i40e/base: future proof some sizeof calls Helin Zhang
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 31/33] i40e/base: add more virtual channel operations for future use Helin Zhang
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 32/33] i40e/base: rework of structures and macros " Helin Zhang
2015-04-30 15:03 ` [dpdk-dev] [PATCH v2 33/33] i40e/base: modifications " Helin Zhang
2015-05-07 1:17 ` [dpdk-dev] [PATCH v2 00/33] i40e base driver update Cao, Min
2015-05-08 5:54 ` Liu, Jijiang
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