From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id A9FC6C3FE for ; Mon, 20 Apr 2015 10:23:07 +0200 (CEST) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga102.jf.intel.com with ESMTP; 20 Apr 2015 01:22:52 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.11,608,1422950400"; d="scan'208";a="712055228" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by fmsmga002.fm.intel.com with ESMTP; 20 Apr 2015 01:22:50 -0700 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id t3K8MlFl013114; Mon, 20 Apr 2015 16:22:47 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id t3K8MiPQ028175; Mon, 20 Apr 2015 16:22:46 +0800 Received: (from hzhan75@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id t3K8Mi4I028171; Mon, 20 Apr 2015 16:22:44 +0800 From: Helin Zhang To: dev@dpdk.org Date: Mon, 20 Apr 2015 16:22:18 +0800 Message-Id: <1429518150-28098-7-git-send-email-helin.zhang@intel.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1429518150-28098-1-git-send-email-helin.zhang@intel.com> References: <1429518150-28098-1-git-send-email-helin.zhang@intel.com> Cc: monica.kenguva@intel.com, steven.j.murray@intel.com, chiu-pi.shih@intel.com Subject: [dpdk-dev] [PATCH 06/18] i40e: support of Fortpark device IDs and mac types X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 20 Apr 2015 08:23:08 -0000 Support of Fortpark device IDs and mac types which includes FPGA were added. Signed-off-by: Helin Zhang --- lib/librte_pmd_i40e/i40e/i40e_common.c | 17 +++++++++++++++++ lib/librte_pmd_i40e/i40e/i40e_type.h | 16 ++++++++++++++++ 2 files changed, 33 insertions(+) diff --git a/lib/librte_pmd_i40e/i40e/i40e_common.c b/lib/librte_pmd_i40e/i40e/i40e_common.c index e7b70c9..2256de9 100644 --- a/lib/librte_pmd_i40e/i40e/i40e_common.c +++ b/lib/librte_pmd_i40e/i40e/i40e_common.c @@ -36,6 +36,7 @@ POSSIBILITY OF SUCH DAMAGE. #include "i40e_prototype.h" #include "i40e_virtchnl.h" + /** * i40e_set_mac_type - Sets MAC type * @hw: pointer to the HW structure @@ -55,6 +56,8 @@ STATIC enum i40e_status_code i40e_set_mac_type(struct i40e_hw *hw) if (hw->vendor_id == I40E_INTEL_VENDOR_ID) { switch (hw->device_id) { + case I40E_DEV_ID_BVL_I40Q: + case I40E_DEV_ID_FPGA_A: case I40E_DEV_ID_SFP_XL710: case I40E_DEV_ID_QEMU: case I40E_DEV_ID_KX_A: @@ -66,6 +69,20 @@ STATIC enum i40e_status_code i40e_set_mac_type(struct i40e_hw *hw) case I40E_DEV_ID_10G_BASE_T: hw->mac.type = I40E_MAC_XL710; break; + case I40E_DEV_ID_FPK_LBG_NS: + case I40E_DEV_ID_FPK_LBG_SD: + case I40E_DEV_ID_FPK_FPGA: + hw->mac.type = I40E_MAC_FPK; + break; + case I40E_DEV_ID_FPK_VF_LBG_NS: + case I40E_DEV_ID_FPK_VF_LBG_SD: + case I40E_DEV_ID_FPK_VF_HV_LBG_NS: + case I40E_DEV_ID_FPK_VF_HV_LBG_SD: + case I40E_DEV_ID_FPK_FPGA_VF: + case I40E_DEV_ID_FPK_FPGA_VF_HV: + hw->mac.type = I40E_MAC_FPK_VF; + break; + case I40E_DEV_ID_BVL_I40Q_VF: case I40E_DEV_ID_VF: case I40E_DEV_ID_VF_HV: hw->mac.type = I40E_MAC_VF; diff --git a/lib/librte_pmd_i40e/i40e/i40e_type.h b/lib/librte_pmd_i40e/i40e/i40e_type.h index 78b6a85..1565095 100644 --- a/lib/librte_pmd_i40e/i40e/i40e_type.h +++ b/lib/librte_pmd_i40e/i40e/i40e_type.h @@ -63,6 +63,20 @@ POSSIBILITY OF SUCH DAMAGE. #define I40E_DEV_ID_10G_BASE_T 0x1586 #define I40E_DEV_ID_VF 0x154C #define I40E_DEV_ID_VF_HV 0x1571 +#define I40E_DEV_ID_FPK_LBG_NS 0x374C +#define I40E_DEV_ID_FPK_LBG_SD 0x37CC +#define I40E_DEV_ID_FPK_VF_LBG_NS 0x374D +#define I40E_DEV_ID_FPK_VF_LBG_SD 0x37CD +#define I40E_DEV_ID_FPK_VF_HV_LBG_NS 0x3759 +#define I40E_DEV_ID_FPK_VF_HV_LBG_SD 0x37D9 +#define I40E_DEV_ID_FPK_FPGA 0xF0A2 +#define I40E_DEV_ID_FPK_FPGA_VF 0xF0A3 +#define I40E_DEV_ID_FPK_FPGA_VF_HV 0xF0A4 +#define I40E_DEV_ID_BVL_I40Q 0xFAFA +#define I40E_DEV_ID_BVL_I40Q_VF 0xFAFB +/* the A0 support needs the FPGA defines for now */ +#define I40E_DEV_ID_FPGA_A 0x154B +#define I40E_DEV_ID_FPGA_A_VF 0x154C #define i40e_is_40G_device(d) ((d) == I40E_DEV_ID_QSFP_A || \ (d) == I40E_DEV_ID_QSFP_B || \ @@ -194,6 +208,8 @@ enum i40e_mac_type { I40E_MAC_X710, I40E_MAC_XL710, I40E_MAC_VF, + I40E_MAC_FPK, + I40E_MAC_FPK_VF, I40E_MAC_GENERIC, }; -- 1.8.1.4