From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id F3DF8A00C2; Wed, 2 Nov 2022 08:01:34 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3917040693; Wed, 2 Nov 2022 08:01:34 +0100 (CET) Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by mails.dpdk.org (Postfix) with ESMTP id 63BC840223 for ; Wed, 2 Nov 2022 08:01:32 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1667372491; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=RZwLL9S9SftdQdLgt7oFZX53yad3MF2FzGbmoKbxNn0=; b=EOV7l+qThehBjA70L63yOZZA3rSIAflNQPb1970qfCB596UCnBozI0A8q1MglzkJXb+/1F G4KPr59QwelPf+VqsZ0g4bEAS6p58OjnGlVZ65cxh2lSZSVvLKPHNq91v1SPqX1uwfhFzZ YHG0F9/n7GDQYqvoJOmDNrSps52kFwg= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-593-h76V2q1vP-qfZKULR2HzNg-1; Wed, 02 Nov 2022 03:01:30 -0400 X-MC-Unique: h76V2q1vP-qfZKULR2HzNg-1 Received: from smtp.corp.redhat.com (int-mx09.intmail.prod.int.rdu2.redhat.com [10.11.54.9]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 18BA088646D; Wed, 2 Nov 2022 07:01:30 +0000 (UTC) Received: from [10.39.208.11] (unknown [10.39.208.11]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 1FF2149BB60; Wed, 2 Nov 2022 07:01:28 +0000 (UTC) Message-ID: <1430d7ea-bbbc-a4eb-df77-7facbb92e999@redhat.com> Date: Wed, 2 Nov 2022 08:01:27 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.0 Subject: Re: [PATCH v1 4/6] baseband/acc: fix PMON register values To: Nicolas Chautru , dev@dpdk.org, gakhil@marvell.com, hernan.vargas@intel.com References: <20221101230459.50891-1-nicolas.chautru@intel.com> <20221101230459.50891-5-nicolas.chautru@intel.com> From: Maxime Coquelin In-Reply-To: <20221101230459.50891-5-nicolas.chautru@intel.com> X-Scanned-By: MIMEDefang 3.1 on 10.11.54.9 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On 11/2/22 00:04, Nicolas Chautru wrote: > From: Hernan Vargas > > Enable properly the PMon for ACC100. > Previous commit was missing actual implementation > and using incorrect register values. > > Fixes: b4bd57b74c8 ("baseband/acc100: configure PMON control registers") > > Signed-off-by: Hernan Vargas > --- > drivers/baseband/acc/acc100_pmd.h | 6 ++++-- > drivers/baseband/acc/rte_acc100_pmd.c | 5 +++++ > 2 files changed, 9 insertions(+), 2 deletions(-) > > diff --git a/drivers/baseband/acc/acc100_pmd.h b/drivers/baseband/acc/acc100_pmd.h > index 8c0aec5ed8..a48298650c 100644 > --- a/drivers/baseband/acc/acc100_pmd.h > +++ b/drivers/baseband/acc/acc100_pmd.h > @@ -146,8 +146,8 @@ static const struct acc100_registry_addr pf_reg_addr = { > .depth_log1_offset = HWPfQmgrGrpDepthLog21Vf, > .qman_group_func = HWPfQmgrGrpFunction0, > .ddr_range = HWPfDmaVfDdrBaseRw, > - .pmon_ctrl_a = HWVfPmACntrlRegVf, > - .pmon_ctrl_b = HWVfPmBCntrlRegVf, > + .pmon_ctrl_a = HWPfPermonACntrlRegVf, > + .pmon_ctrl_b = HWPfPermonBCntrlRegVf, > }; > > /* Structure holding registry addresses for VF */ > @@ -177,6 +177,8 @@ static const struct acc100_registry_addr vf_reg_addr = { > .depth_log1_offset = HWVfQmgrGrpDepthLog21Vf, > .qman_group_func = HWVfQmgrGrpFunction0Vf, > .ddr_range = HWVfDmaDdrBaseRangeRoVf, > + .pmon_ctrl_a = HWVfPmACntrlRegVf, > + .pmon_ctrl_b = HWVfPmBCntrlRegVf, > }; > > #endif /* _RTE_ACC100_PMD_H_ */ > diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c > index b6e500c6bc..2999a6a81a 100644 > --- a/drivers/baseband/acc/rte_acc100_pmd.c > +++ b/drivers/baseband/acc/rte_acc100_pmd.c > @@ -479,6 +479,11 @@ acc100_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id) > /* Read the populated cfg from ACC100 registers */ > fetch_acc100_config(dev); > > + for (value = 0; value <= 2; value++) { > + acc_reg_write(d, reg_addr->pmon_ctrl_a, value); > + acc_reg_write(d, reg_addr->pmon_ctrl_b, value); > + } > + > /* Release AXI from PF */ > if (d->pf_device) > acc_reg_write(d, HWPfDmaAxiControl, 1); Reviewed-by: Maxime Coquelin Thanks, Maxime