From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id A4EA2B38D for ; Fri, 29 May 2015 10:10:59 +0200 (CEST) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga103.fm.intel.com with ESMTP; 29 May 2015 01:10:59 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,515,1427785200"; d="scan'208";a="702004026" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by orsmga001.jf.intel.com with ESMTP; 29 May 2015 01:10:58 -0700 Received: from shecgisg003.sh.intel.com (shecgisg003.sh.intel.com [10.239.29.90]) by shvmail01.sh.intel.com with ESMTP id t4T8AuIY010752; Fri, 29 May 2015 16:10:56 +0800 Received: from shecgisg003.sh.intel.com (localhost [127.0.0.1]) by shecgisg003.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id t4T8AsiG024832; Fri, 29 May 2015 16:10:56 +0800 Received: (from jingche2@localhost) by shecgisg003.sh.intel.com (8.13.6/8.13.6/Submit) id t4T8AsEB024828; Fri, 29 May 2015 16:10:54 +0800 From: "Chen Jing D(Mark)" To: dev@dpdk.org Date: Fri, 29 May 2015 16:10:41 +0800 Message-Id: <1432887044-24777-4-git-send-email-jing.d.chen@intel.com> X-Mailer: git-send-email 1.7.12.2 In-Reply-To: <1432887044-24777-1-git-send-email-jing.d.chen@intel.com> References: <1432887044-24777-1-git-send-email-jing.d.chen@intel.com> Cc: shaopeng.he@intel.com Subject: [dpdk-dev] [PATCH 3/6] fm10k: Fix data integrity issue with multi-segment frame X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 29 May 2015 08:11:00 -0000 From: "Chen Jing D(Mark)" In TX side, bit FM10K_TXD_FLAG_LAST in TX descriptor only is set in the last descriptor for multi-segment packets. But current implementation didn't set all the fields of TX descriptor, which will cause descriptors processed now to re-use fields set in last scroll. If FM10K_TXD_FLAG_LAST bit was set in the last round and it happened this is not the last descriptor of a multi-segnment packet, HW will send out the incomplete packet out and leads to data intergrity issue. Signed-off-by: Chen Jing D(Mark) --- drivers/net/fm10k/fm10k_rxtx.c | 15 +++++++++++++-- 1 files changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/net/fm10k/fm10k_rxtx.c b/drivers/net/fm10k/fm10k_rxtx.c index 56df6cd..f5d1ad0 100644 --- a/drivers/net/fm10k/fm10k_rxtx.c +++ b/drivers/net/fm10k/fm10k_rxtx.c @@ -402,9 +402,9 @@ static inline void tx_xmit_pkt(struct fm10k_tx_queue *q, struct rte_mbuf *mb) q->nb_used = q->nb_used + mb->nb_segs; } - q->hw_ring[last_id].flags = flags; q->nb_free -= mb->nb_segs; + q->hw_ring[q->next_free].flags = 0; /* set checksum flags on first descriptor of packet. SCTP checksum * offload is not supported, but we do not explicitly check for this * case in favor of greatly simplified processing. */ @@ -415,16 +415,27 @@ static inline void tx_xmit_pkt(struct fm10k_tx_queue *q, struct rte_mbuf *mb) if (mb->ol_flags & PKT_TX_VLAN_PKT) q->hw_ring[q->next_free].vlan = mb->vlan_tci; + q->sw_ring[q->next_free] = mb; + q->hw_ring[q->next_free].buffer_addr = + rte_cpu_to_le_64(MBUF_DMA_ADDR(mb)); + q->hw_ring[q->next_free].buflen = + rte_cpu_to_le_16(rte_pktmbuf_data_len(mb)); + if (++q->next_free == q->nb_desc) + q->next_free = 0; + /* fill up the rings */ - for (; mb != NULL; mb = mb->next) { + for (mb = mb->next; mb != NULL; mb = mb->next) { q->sw_ring[q->next_free] = mb; q->hw_ring[q->next_free].buffer_addr = rte_cpu_to_le_64(MBUF_DMA_ADDR(mb)); q->hw_ring[q->next_free].buflen = rte_cpu_to_le_16(rte_pktmbuf_data_len(mb)); + q->hw_ring[q->next_free].flags = 0; if (++q->next_free == q->nb_desc) q->next_free = 0; } + + q->hw_ring[last_id].flags = flags; } uint16_t -- 1.7.7.6