From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id AEA78C692 for ; Fri, 19 Jun 2015 08:35:37 +0200 (CEST) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga102.fm.intel.com with ESMTP; 18 Jun 2015 23:35:35 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,643,1427785200"; d="scan'208";a="749461899" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by orsmga002.jf.intel.com with ESMTP; 18 Jun 2015 23:35:34 -0700 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id t5J6ZVge025791; Fri, 19 Jun 2015 14:35:31 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id t5J6ZSlP003274; Fri, 19 Jun 2015 14:35:30 +0800 Received: (from wujingji@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id t5J6ZRqR003270; Fri, 19 Jun 2015 14:35:27 +0800 From: Jingjing Wu To: dev@dpdk.org Date: Fri, 19 Jun 2015 14:35:25 +0800 Message-Id: <1434695725-3240-1-git-send-email-jingjing.wu@intel.com> X-Mailer: git-send-email 1.7.4.1 Subject: [dpdk-dev] [PATCH] ixgbe: fix the flow director flexbytes offset issues X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 19 Jun 2015 06:35:38 -0000 The flexbytes offset can not be set, because the value is over written when fdir is enabled. This patch fixes this issue, and also removes some reduplicate lines. Reported-by: David Marchand Signed-off-by: Jingjing Wu --- drivers/net/ixgbe/ixgbe_fdir.c | 24 ++++++++---------------- 1 file changed, 8 insertions(+), 16 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_fdir.c b/drivers/net/ixgbe/ixgbe_fdir.c index 40b144e..d294f85 100644 --- a/drivers/net/ixgbe/ixgbe_fdir.c +++ b/drivers/net/ixgbe/ixgbe_fdir.c @@ -109,7 +109,7 @@ static int fdir_erase_filter_82599(struct ixgbe_hw *hw, uint32_t fdirhash); static int fdir_set_input_mask_82599(struct rte_eth_dev *dev, const struct rte_eth_fdir_masks *input_mask); static int ixgbe_set_fdir_flex_conf(struct rte_eth_dev *dev, - const struct rte_eth_fdir_flex_conf *conf); + const struct rte_eth_fdir_flex_conf *conf, uint32_t *fdirctrl); static int fdir_enable_82599(struct ixgbe_hw *hw, uint32_t fdirctrl); static int ixgbe_fdir_filter_to_atr_input( const struct rte_eth_fdir_filter *fdir_filter, @@ -247,13 +247,6 @@ configure_fdir_flags(const struct rte_fdir_conf *conf, uint32_t *fdirctrl) *fdirctrl |= IXGBE_FDIRCTRL_PERFECT_MATCH; *fdirctrl |= (conf->drop_queue << IXGBE_FDIRCTRL_DROP_Q_SHIFT); } - /* - * Continue setup of fdirctrl register bits: - * Set the maximum length per hash bucket to 0xA filters - * Send interrupt when 64 filters are left - */ - *fdirctrl |= (0xA << IXGBE_FDIRCTRL_MAX_LENGTH_SHIFT) | - (4 << IXGBE_FDIRCTRL_FULL_THRESH_SHIFT); return 0; } @@ -370,18 +363,17 @@ fdir_set_input_mask_82599(struct rte_eth_dev *dev, */ static int ixgbe_set_fdir_flex_conf(struct rte_eth_dev *dev, - const struct rte_eth_fdir_flex_conf *conf) + const struct rte_eth_fdir_flex_conf *conf, uint32_t *fdirctrl) { struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); struct ixgbe_hw_fdir_info *info = IXGBE_DEV_PRIVATE_TO_FDIR_INFO(dev->data->dev_private); const struct rte_eth_flex_payload_cfg *flex_cfg; const struct rte_eth_fdir_flex_mask *flex_mask; - uint32_t fdirctrl, fdirm; + uint32_t fdirm; uint16_t flexbytes = 0; uint16_t i; - fdirctrl = IXGBE_READ_REG(hw, IXGBE_FDIRCTRL); fdirm = IXGBE_READ_REG(hw, IXGBE_FDIRM); if (conf == NULL) { @@ -398,8 +390,9 @@ ixgbe_set_fdir_flex_conf(struct rte_eth_dev *dev, if (((flex_cfg->src_offset[0] & 0x1) == 0) && (flex_cfg->src_offset[1] == flex_cfg->src_offset[0] + 1) && (flex_cfg->src_offset[0] <= IXGBE_MAX_FLX_SOURCE_OFF)) { - fdirctrl &= ~IXGBE_FDIRCTRL_FLEX_MASK; - fdirctrl |= (flex_cfg->src_offset[0] / sizeof(uint16_t)) << + *fdirctrl &= ~IXGBE_FDIRCTRL_FLEX_MASK; + *fdirctrl |= + (flex_cfg->src_offset[0] / sizeof(uint16_t)) << IXGBE_FDIRCTRL_FLEX_SHIFT; } else { PMD_DRV_LOG(ERR, "invalid flexbytes arguments."); @@ -423,10 +416,9 @@ ixgbe_set_fdir_flex_conf(struct rte_eth_dev *dev, return -EINVAL; } } - IXGBE_WRITE_REG(hw, IXGBE_FDIRCTRL, fdirctrl); IXGBE_WRITE_REG(hw, IXGBE_FDIRM, fdirm); info->mask.flex_bytes_mask = flexbytes ? UINT16_MAX : 0; - info->flex_bytes_offset = (uint8_t)((fdirctrl & + info->flex_bytes_offset = (uint8_t)((*fdirctrl & IXGBE_FDIRCTRL_FLEX_MASK) >> IXGBE_FDIRCTRL_FLEX_SHIFT); return 0; @@ -476,7 +468,7 @@ ixgbe_fdir_configure(struct rte_eth_dev *dev) return err; } err = ixgbe_set_fdir_flex_conf(dev, - &dev->data->dev_conf.fdir_conf.flex_conf); + &dev->data->dev_conf.fdir_conf.flex_conf, &fdirctrl); if (err < 0) { PMD_INIT_LOG(ERR, " Error on setting FD flexible arguments."); return err; -- 1.9.3